H-Band Inp HBT Frequency Tripler Using the Triple-Push Technique

electronics

Article H-Band InP HBT Frequency Tripler Using the Triple-Push Technique

Jinho Jeong * , Jisu Choi, Jongyoun Kim and Wonseok Choe Department of Electronic Engineering, Sogang University, Seoul 04107, Korea; [email protected] (J.C.); [email protected] (J.K.); [email protected] (W.C.) * Correspondence: [email protected]; Tel.: +82-2-705-8934

Received: 3 November 2020; Accepted: 3 December 2020; Published: 6 December 2020

Abstract: A broadband H-band (220 GHz–325 GHz) frequency tripler using the triple-push technique is presented in 250-nm InP heterojunction bipolar transistors (HBT) technology. It consisted of three identical unit-cell multipliers, which were individually pumped by the W-band input signals with 120◦ phase diﬀerence. For this purpose, a 120◦ 3-way power divider was proposed using the 1:2 and 1:1 Lange couplers with 30◦ phase delay lines. The fundamental and 2nd harmonic signals of each unit-cell multiplier were added out-of-phase at the output, allowing an eﬀective harmonic suppression. On the contrast, the 3rd harmonic components were combined in-phase at the output, so that the entire circuit successfully did the function of the frequency multiplier-by-3. The fabricated frequency tripler exhibited a broadband output power of 7.4 1.4 dBm from 225 GHz to 330 GHz at − ± an input power of 9.6 0.8 dBm, with an average conversion gain of 16.8 dB. ± − Keywords: frequency multiplier; InP heterojunction bipolar transistor (HBT); Lange coupler; submillimeter wave; terahertz

1. Introduction Recently, there has been extensive research developing sub-millimeter-wave and terahertz (THz) oscillator and power amplifier integrated circuits (ICs) using advanced transistor technologies [1–4]. Frequency multipliers are also widely used to generate THz frequency signals in ICs. They allow wide tuning range and low phase noise performance, compared to the fundamental oscillators at THz frequencies [5]. Active H-band (220 GHz–325 GHz) frequency multipliers have been reported in the form of IC using high-speed transistor technologies, such as GaAs metamorphic high electron mobility transistors (mHEMTs) or InP HEMTs and SiGe or InP heterojunction bipolar transistors (HBTs) [6–8]. They can offer highly-integrated and low-cost THz signal sources, because they can be integrated with other circuits in the same semiconductor process [7]. In H-band, the low-order frequency multipliers, such as doublers, are usually designed to achieve high output power and high conversion gain [6,7]. The H-band frequency doubler was designed in 90-nm SiGe HBTs in [6], which consists of the balun and common-emitter pair. It exhibits an output power of about 0.5 dBm for an input power of 16 dBm–17 dBm from 200 GHz to 245 GHz. A higher-order (>2) multiplier in a single stage can reduce the input frequency and chip size. However, it results in low output power with low conversion gain. The H-band frequency tripler was designed in a single common-source configuration using 35-nm mHEMTs, providing an average output power of 6 dBm for an input power of 6 dBm over a frequency range of 235 GHz–285 GHz [8]. − In this paper, we present the H-band broadband frequency tripler in 250-nm InP HBT technology. The triple-push technique was applied in order to obtain high output power at 3rd harmonic component, as well as sufficient fundamental and 2nd harmonic suppression. In addition, a W-band 3-way power divider was proposed, using the 1:2 and 1:1 Lange couplers with phase delay lines. Input and output

Electronics 2020, 9, 2081; doi:10.3390/electronics9122081 www.mdpi.com/journal/electronics Electronics 2020, 9, x FOR PEER REVIEW 2 of 7 harmonic component, as well as sufficient fundamental and 2nd harmonic suppression. In addition, a W-band 3-way power divider was proposed, using the 1:2 and 1:1 Lange couplers with phase delay Electronics 2020, 9, 2081 2 of 7 lines. Input and output matching networks were designed to allow for high output power and high conversion gain with sufficient spurious rejection. Full-wave electromagnetic (EM) simulations were performedmatching networks to design were all the designed passive to components, allow for high such output as microstrip power and lines, high conversionLange couplers, gain withand capacitors.sufficient spurious rejection. Full-wave electromagnetic (EM) simulations were performed to design all the passive components, such as microstrip lines, Lange couplers, and capacitors. 2. Design of H-band Frequency Tripler 2. Design of H-Band Frequency Tripler Figure 1 illustrates the operating principle of the proposed frequency tripler using the triple- push Figuretechnique.1 illustrates A 120° the3-way operating power principledivider genera of theted proposed three signals frequency with tripler equal using amplitude the triple-push and 120° phasetechnique. difference A 120 from◦ 3-way the input power signal divider at a frequency generated of three 𝑓, that signals is, 𝑣, with(𝑡) equal = 𝑉 cos(𝜔 amplitude𝑡 − 120°(𝑘 and 120 −◦, 1)) phase difference from the input signal at a frequency of f0, that is, vi,k(t) = Vi cos(ω0t 120◦(k 1)), where 𝑘 = 1, 2, 3, 𝜔 =2π𝑓, and 120° is equal to 2π/3 radians. Unit-cell multipliers −implemented− where k = 1, 2, 3, ω = 2π f , and 120 is equal to 2π/3 radians. Unit-cell multipliers implemented by a transistor, as shown0 in Figure0 1b, ◦produced output currents at various harmonic frequencies or by a transistor, as shown in Figure1b, produced output currents at various harmonic frequencies or ∑ 𝑖,(𝑡) = P 𝑎𝑣n, , where 𝑎 represents the 𝑛th-order nonlinearity of the transistor. The total i (t) = ∞ a v , where a represents the nth-order nonlinearity of the transistor. The total output outputo,k currentn=1 k wasi,k a sumk of three output currents, 𝑖 (𝑡) = ∑ 𝑖 (𝑡) . The 𝑛 th harmonic P3 , ( ) = ( ) componentscurrent was aof sum 𝑖 (𝑡 of) were three given output as currents, ∑ 𝐼 cosio t 𝑛(𝜔 𝑡k= −1 i120°(𝑘o,k t . The − 1)), nwhichth harmonic is 0 for components 𝑛=1,2 and of P3 io(t) were given as Io cos n(ω0t 120◦(k 1)), which is 0 for n = 1, 2 and 3Io cos 3ω0t, for n = 3. 3𝐼cos3𝜔𝑡, for 𝑛=3k. =This1 result implies− that− the three output currents at the fundamental and 2nd harmonicThis result frequencies implies that were the threeadded output with currents120° phase at the differences, fundamental leading and 2ndto signal harmonic cancellation. frequencies In were added with 120◦ phase differences, leading to signal cancellation. In contrast, the three currents contrast, the three currents at the 3rd harmonic frequency (3𝑓) were combined in phase at the output. at the 3rd harmonic frequency (3 f0) were combined in phase at the output. Therefore, this triple-push Therefore, this triple-push technique allowed for power combining at 3𝑓, leading to high output technique allowed for power combining at 3 f0, leading to high output power. It also effectively power. It also effectively suppressed the signals at 𝑓 and 2𝑓 (and 4𝑓 and 5𝑓 as well), simplifyingsuppressed or the removing signals at thef0 outputand 2 f 0band-pass(and 4 f0 andfilters.5 f0 as well), simplifying or removing the output band-pass filters.

Vcc

𝑣, 𝑖, 0˚ Unit-cell Input 0˚ multiplier λ4⁄ @3f (f ) 𝑣 𝑖, 𝑖 0 0 90˚ 0˚ , Unit-cell 30˚ 120˚ multiplier 1:2 Lange Output coupler 90˚ 𝑣 , Unit-cell (3f0) 30˚ 240˚ multiplier Output matching 1:1 Lange 𝑖, coupler network 120o 3-way power divider A

(a)

Vbb Combining line

1 finger, 6 μm

Input matching network

(b)

FigureFigure 1. 1. DesignedDesigned HH-band-band frequency frequency tripler tripler based based on on the the triple-push triple-push technique. technique. (a) Entire (a) Entire tripler; tripler; (b) unit-cell(b) unit-cell multiplier. multiplier.

The unit-cell multiplier shown in Figure1b was designed using the common-emitter HBT with an emitter length of 6 µm. It was biased at the base-emitter voltage around 0.7 V. The input matching network was designed to provide conjugate match at the input frequency ( f0). The combining line at Electronics 2020, 9, 2081 3 of 7

the collector was used to present reactive impedances at f0 and 2 f0, where the combining node A was Electronics 2020, 9, x FOR PEER REVIEW 3 of 7 virtually short-circuited. The output matching network was designed to present a load impedance at 3 f to obtain high output power. The coupled line was employed in the output matching network to 0 The unit-cell multiplier shown in Figure 1b was designed using the common-emitter HBT with further suppress the fundamental and second harmonic components. an emitter length of 6 μm. It was biased at the base-emitter voltage around 0.7 V. The input matching A W-band 120◦ 3-way power divider was required at the input, generating three input signals network was designed to provide conjugate match at the input frequency (𝑓). The combining line at with 120◦ phase diﬀerences. It was designed by using the 1:2 and 1:1 Lange couplers with phase delay the collector was used to present reactive impedances at 𝑓 and 2𝑓, where the combining node A lines, with an electrical length of 30 at f (~ 90 GHz), as illustrated in Figure1a. The ratio, 1:2 and 1:1, was virtually short-circuited. The◦ output0 matching network was designed to present a load indicates the power division ratio between the coupled and through ports. These passive components impedance at 3𝑓 to obtain high output power. The coupled line was employed in the output were implemented in the form of inverted microstrip lines, using four frontside metal layers (M1–M4) matching network to further suppress the fundamental and second harmonic components. on the 75 µm-thick InP substrate. The bottom metal layer M1 was used as a signal line and the third A W-band 120° 3-way power divider was required at the input, generating three input signals metal layer M3 was used as a ground plane. Each metal layer had about 1 µm-thickness, except for with 120° phase differences. It was designed by using the 1:2 and 1:1 Lange couplers with phase delay the 3 µm-thick M4 (top metal layer). The 1 µm-thick dielectric layers were placed between metal lines, with an electrical length of 30° at 𝑓 (~ 90 GHz), as illustrated in Figure 1a. The ratio, 1:2 and layers. The coupled lines in the Lange couplers were implemented in the M1 layer, where the M3 1:1, indicates the power division ratio between the coupled and through ports. These passive ground plane was removed (M3 opening in Figure2a) in order to increase the coupling factor. On the components were implemented in the form of inverted microstrip lines, using four frontside metal contrary, the M3 opening was partially connected to reduce the coupling factor in the 1:2 Lange coupler. layers (M1–M4) on the 75 μm-thick InP substrate. The bottom metal layer M1 was used as a signal The 30 -long inverted microstrip lines were inserted to accomplish 120 phase delay, together with 90 line and◦ the third metal layer M3 was used as a ground plane. Each◦ metal layer had about 1 μm-◦ phase shift by the Lange coupler. The Lange couplers and phase delay lines were meandered in order thickness, except for the 3 μm-thick M4 (top metal layer). The 1 μm-thick dielectric layers were placed to reduce the circuit size. between metal layers. The coupled lines in the Lange couplers were implemented in the M1 layer, EM simulations were carried out using Advanced Design System (ADS) Momentum from Keysight where the M3 ground plane was removed (M3 opening in Figure 2a) in order to increase the coupling Technologies to optimize the dimensions of the power dividers, and the results are given in Figure2b,c. factor. On the contrary, the M3 opening was partially connected to reduce the coupling factor in the The designed power divider exhibited almost equal power division and 120 phase diﬀerence between 1:2 Lange coupler. The 30°-long inverted microstrip lines were inserted to◦ accomplish 120° phase three output ports, with good return loss at the center frequency around 90 GHz. The phase error delay, together with 90° phase shift by the Lange coupler. The Lange couplers and phase delay lines increased as the frequency deviated from the center frequency, which may have limited the bandwidth were meandered in order to reduce the circuit size. performance of the frequency tripler. Return loss and isolation were better than 14 dB in the entire W-band.

Port 2 Port 1 (output 1) (input)

1:2 Lange Coupled coupler lines in M1 M3 (1 μm)

dielectric (3.2 μm)

M1 (0.8 μm)

Port 3 InP substrate (75 µm) 104 µm (output 2) Backside ground M3 Metal layer stack opening 30o phase delay line

Port 4 M3 (output 3) (ground plane)

(a)

Figure 2. Cont.

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-4 0 180 S21 -6 -5 160 between port 3 and 2 S31 S -8 41 -10 140

-10 S22 -15 120

-12 S11 -20 100 Electronics 2020,, 99,, 2081xS FOR44 PEER REVIEW between port 4 and 3 4 of 7 -14 -25

Return Return loss (dB) 80 Phase difference (°) difference Phase Inserion loss (dB) S33 -16 -30 -4 0 18060 75 80 85S21 90 95 100105110 75 80 85 90 95 100 105 110 -6 -5 160 Frequency (GHz) betweenFrequency port (GHz) 3 and 2 S31 S -8 41 -10 140 (b) (c) -10 S -15 120 Figure 2. Designed22 120° 3-way power divider. (a) Layout; (b) simulated insertion and return loss; (c)

-12simulated phase differenceS11 between output-20 ports. 100 S44 between port 4 and 3 -14 -25

Return Return loss (dB) 80 Phase difference (°) difference Phase Inserion loss (dB) EM simulations were Scarried33 out using Advanced Design System (ADS) Momentum from Keysight-16 Technologies to optimize the dimensions-30 of the power60 dividers, and the results are given in Figure 2b,c.75 The 80 designed 85 90 95power 100105110 divider exhibited almost equal75 80 power 85 division 90 95 100and 105120° 110 phase difference betweenFrequency three output (GHz) ports, with good re turn loss at the centerFrequency frequency (GHz) around 90 GHz. The phase error increased as the frequency deviated from the center frequency, which may have (b) (c) limited the bandwidth performance of the frequency tripler. Return loss and isolation were better

thanFigure 14 dB 2. in DesignedDesigned the entire 120° 120 W◦ 3-way-band.3-way power power divider. divider. (a) ( aLayout;) Layout; (b) ( bsimulated) simulated insertion insertion and and return return loss; loss; (c) (simulatedcThe) simulated EM phasesimulation phase difference diﬀ erencewas between also between performed output output ports. ports.for the input matching network, combining lines and output matching network, to optimize the performance of the tripler. The designed tripler exhibited The EM simulation was also performed for the input matching network, combining lines and a maximumEM simulations conversion were gain carried of −10.2 out dB using at an Advanced input power Design of 3.5 SystemdBm at (ADS)𝑓 = 90 Momentum GHz, as shown from in outputKeysightFigure matching 3a. Technologies Figure network, 3b shows to optimize to the optimize output the dimensions the power performance at eaofch the harmonic of power the tripler. dividers, frequency The and designed at the an results input tripler arepower exhibited given of in3.5 aFigure maximum 2b,c. conversionThe designed gain power of 10.2 divider dB at exhibi an inputted poweralmost ofequal 3.5 dBm power at fdivision0 = 90 GHz, andas 120° shown phase in dBm. It achieves a wideband performance− with output power greater than −9.1 dBm (conversion gain Figuredifference> −12.63a. dB) Figurebetween at3 b75 shows threeGHz–105 output the output GHz ports, power(3 withdB atbandwidthgood each re harmonicturn ofloss conversion frequencyat the center atgain). anfrequency input It also power around shows of 3.5 90 that dBm.GHz. the ItThe achieves phase error a wideband increased performance as the frequency with output deviated power from greater the center than frequency,9.1 dBm (conversionwhich may have gain fundamental and 2nd harmonic components were sufficiently suppressed− by more than 30 dB from >limited12.6 dB)theat bandwidth 75 GHz–105 performance GHz (3 dB bandwidth of the frequency of conversion tripler. gain). Return It also loss shows and isolation that the fundamental were better 87− to 93 GHz, compared to the 3rd harmonic component, due to the phase cancellation by the triple- andthanpush 2nd14 technique. dB harmonic in the entire components W-band. were suﬃciently suppressed by more than 30 dB from 87 to 93 GHz, comparedThe EM to thesimulation 3rd harmonic was also component, performed due for to the phaseinput matching cancellation network, by the triple-pushcombining technique.lines and output matching network, to optimize the performance of the tripler. The designed tripler exhibited a maximum0 conversion gain of −10.2 dB at an input power0 of 3.5 dBm at 𝑓 = 90 GHz, as shown in Figure 3a. Figure 3b shows the output power at each harmonic frequency at an input power of 3.5 -10 3f0 -10 3f dBm. It achieves a wideband performance with output power greater than −9.1 0dBm (conversion gain > −12.6 dB)-20 at 75 GHz–105 GHz (3 dB bandwidth of-20 conversion gain). It also2f 0shows that the 4f fundamental and 2nd harmonic components4f 2f 0were sufficiently suppressed0 by more than f300 dB from -30 0 -30 87 to 93 GHz, compared to the 3rd harmonic component, due to the phase cancellation by the triple- 5f0 push technique.-40 6f -40 f 0

Output Output power (dBm) 0 Output Output power (dBm) -50 -50 -10 -5 0 5 10 75 80 85 90 95 100 105 110 0 0 Input power (dBm) Input frequency (GHz) -10 3f0 -10 (a) (b3)f 0 -20 -20 2f FigureFigure 3. 3.Simulated Simulated performance performance of of the the designed designed frequency frequency tripler. tripler. (a ()a Output) Output power power as 0as a a function function of of 4f 𝑓 4f 2f0 0 f0 inputinput-30 power power at atf0 = 90= GHz;90 GHz; (b) ( output0b) output power power as a functionas a function-30 of frequency of frequency at an inputat an powerinput power of 3.5 dBm. of 3.5 dBm. 5f0 3. Experimental-40 Results 6f -40 f 0

Output Output power (dBm) 0 Output Output power (dBm) 3. ExperimentalFigure-50 4 shows Results the fabricated H-band frequency-50 tripler in Teledyne Scientiﬁc’s 250-nm InP HBT process,-10 which -5 oﬀers high-speed 0 5 transistors 10 with maximum75 80 oscillation 85 90 frequency 95 100 105 (fmax 110) around

700 GHz [2]. The chipInput size power was 790(dBm)µm 535 µm, including directInput current frequency (DC) and (GHz) radio frequency × (RF) pads. The performance(a) of the frequency tripler was measured by on-wafer (b) probing, as illustrated in Figure5. The W-band signal (75 GHz–110 GHz) was generated by the frequency multiplier-by-6 moduleFigure and 3. applied Simulated to theperformance chip by a of WR-10 the designed waveguide frequency probe. tripler. The H (a-band) Output output power power as a function was measured of by usinginput a power WR-3.4 at waveguide𝑓 = 90 GHz; probe (b) output (by GGB power Industries, as a function Inc. (Naples,of frequency FL, at USA)) an input and power a H-band of 3.5 power meterdBm. (PM5 by Virginia Diodes, Inc. (Charlottesville, VA, USA)). The loss of each component in the measurement setup (such as the probes and waveguide sections) was measured and calibrated out. 3. Experimental Results

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Figure 4 shows the fabricated H-band-band frequencyfrequency triplertripler inin TeledyneTeledyne Scientific’sScientific’s 250-nm250-nm InPInP HBTHBT process, which offers high-speed transistors with maximum oscillation frequency (ffmaxmax)) aroundaround 700700 GHz [2]. The chip size was 790 μm × 535 μm, including direct current (DC) and radio frequency (RF) pads. The performance of the frequency tripler was measured by on-wafer probing, as illustrated in Figure 5. The W-band-band signalsignal (75(75 GHz–110GHz–110 GHz)GHz) waswas generatedgenerated byby thethe frequencyfrequency multiplier-by-6multiplier-by-6 module and applied to the chip by a WR-10 waveguide probe. The H-band-band outputoutput powerpower waswas measured by using a WR-3.4 waveguide probe (by GGB Industries, Inc. (Naples, FL, USA)) and a H-- band power meter (PM5 by Virginia Diodes, Inc. (Charlottesville, VA, USA)). The loss of each componentcomponent inin thethe measurementmeasurement setupsetup (such(such asas ththe probes and waveguide sections) was measured Electronics 2020, 9, 2081 5 of 7 and calibrated out.

FigureFigure 4. 4. PhotographPhotograph of of the the fabricated fabricated HH-band-band-band frequencyfrequency frequency triplertripler tripler integratedintegrated circuitcircuit (IC).(IC).

Power Supply WR-10 Supply WR-3.4 Probe Probe W-band Probe Probe PM5 SignalSignal WR-10 WR-3.4, -10 Module DUT Power Generator Waveguide DUT Waveguide ((×× 6)6) Meter

FigureFigure 5. 5. PhotographPhotograph of of the the fabricated fabricated HH-band-band-band frequencyfrequency frequency triplertripler IC.IC.

Figure6 shows the measured output power and conversion gain of the frequency tripler as a Figure 6 shows the measured output power and conversion gain of the frequency tripler as a function of output frequency at an input power around 9.6 dBm. Measured output power was between functionfunction ofof outputoutput frequencyfrequency atat anan inputinput powerpower aroundaround 9.69.6 dBm.dBm. MeasuredMeasured outputoutput powerpower waswas 8.8 dBm and 6.0 dBm at 225 GHz–330 GHz, where the conversion gain was between 18.7 dB between− −8.8 dBm− and −6.0 dBm at 225 GHz–330 GHz, where the conversion gain was between− −18.7 and 14.8 dB. Figure7 shows the measured output power and spectrum at an input frequency of dB and− −14.8 dB. Figure 7 shows the measured output power and spectrum at an input frequency of 91 GHz. As shown in Figure7a, there was a discrepancy in the measured and simulated output 91 GHz. As shown in Figure 7a, there was a discrepancyscrepancy inin thethe measuredmeasured andand simulatedsimulated outputoutput powers, for example, there was about 6 dB diﬀerence at high input power. It was believed to be caused powers, for example, there was about 6 dB difference at high input power. It was believed to be by the inaccurate non-linear model of the transistor at very high frequency provided by the process causedcaused byby thethe inaccurateinaccurate nonon-linear model of the transistor at very high frequency provided by the company. The output spectrum was also on-wafer, measured by down-converting the tripler output process company. The output spectrum was also on-wafer, measured by down-converting the tripler signal to low frequency using the H-band 2nd harmonic mixer, D-band power source (frequency output signal to low frequency using the H-band-band 2nd2nd harmonicharmonic mixer,mixer, D-band-band powerpower sourcesource multiplier-by-12 module) for local oscillator (LO), and spectrum analyzer. Figure7b shows the (frequency(frequency multiplier-by-12multiplier-by-12 module)module) forfor locallocal oscioscillatorllator (LO),(LO), andand spectrumspectrum analyzer.analyzer. FigureFigure 7b7b measured down-converted spectrum around 3.0 GHz with a span of 2 GHz, showing a spurious-free showsshows thethe measuredmeasured down-converteddown-converted spectrumspectrum aroundaround 3.03.0 GHzGHz withwith aa spanspan ofof 22 GHz,GHz, showingshowing aa output spectrum. Table1 compares the performance of active frequency multipliers reported in the spurious-freespurious-free outputoutput spectrum.spectrum. TableTable 11 comparescompares thethe performanceperformance ofof activeactive frequencyfrequency multipliersmultipliers H-band, showing that the frequency tripler designed in this work exhibited a comparable output power reportedreported inin thethe H-band,-band, showingshowing thatthat thethe frequencyfrequency triptriplerler designeddesigned inin thisthis workwork exhibitedexhibited aa and conversion gain with excellent bandwidth performance. comparablecomparableElectronics 2020 output,output 9, x FOR powerpower PEER REVIEW andand conversionconversion gagainin withwith excellentexcellent bandwidthbandwidth performance.performance. 6 of 7 0 20 output power (simulation)

-5 output power 15

-10 10 input power

-15 5 (dBm) power Input conversion gain (dB) gain conversion Output power (dBm), power Output conversion gain -20 0 220 240 260 280 300 320 340 Output frequency (GHz) Figure 6. Measured output power and conversion gain gain of the frequency tripler at an input power around 9.6 dBm.

0 -60 Simulation -70 -10 -80

-90 -20 Measurement -100 Output (dBm)Output power Output Output power (dBm) -30 -110 -5 0 5 10 2.02.53.03.54.0 Input power (dBm) Frequency (GHz) (a) (b)

Figure 7. Measured output power at the output frequency of 273 GHz. (a) Output power versus input power; (b) output spectrum (after frequency down-conversion, using a harmonic mixer).

Table 1. Comparison of active frequency multipliers reported in H-band.

Output Input Multiplication Output Power Reference Frequency Power Technology Factor (dBm) (GHz) (dBm) [6] Doubler 200–245 0 16.5 90 nm SiGe HBT 130 nm SiGe [7] Doubler 317–328 −8 (peak) - HBT 35 nm GaAs [5] Tripler 255–330 −8.8 9 mHEMT 35 nm GaAs [8] Tripler 235–285 −6 6 mHEMT This work Tripler 225–330 −7.4 9.6 250 nm InP HBT

4. Conclusions We designed an H-band frequency tripler IC using the triple-push technique in the 250-nm InP HBT technology. The 3-way power divider was proposed to generate W-band input signals with a 120° phase difference. The triple-push technique allowed the frequency tripler with a 3rd harmonic power combination and sufficient suppression of fundamental and second harmonic power. The measurement shows that the designed tripler presented a broadband output power performance in

Electronics 2020, 9, x FOR PEER REVIEW 6 of 7

0 20 output power (simulation)

-5 output power 15

-10 10 input power -15 5 Input power (dBm) power Input conversion gain (dB) gain conversion Output power (dBm), power Output conversion gain -20 0 220 240 260 280 300 320 340 Output frequency (GHz)

ElectronicsFigure2020 ,6.9, Measured 2081 output power and conversion gain of the frequency tripler at an input power6 of 7 around 9.6 dBm.

0 -60 Simulation -70 -10 -80

-90 -20 Measurement -100 Output (dBm)Output power Output Output power (dBm) -30 -110 -5 0 5 10 2.02.53.03.54.0 Input power (dBm) Frequency (GHz) (a) (b)

FigureFigure 7. 7.Measured Measured outputoutput power power at at the the output output frequency frequency of of 273 273 GHz. GHz. ((aa)) Output Output power power versus versus input input power;power; ( b(b)) output output spectrum spectrum (after (after frequency frequency down-conversion, down-conversion, using using a a harmonic harmonic mixer). mixer).

H TableTable 1. 1.Comparison Comparison of of active active frequency frequency multipliers multipliers reported reported in in H-band.-band. Multiplication Output Frequency Output Power Input Power Reference Output Input Technology MultiplicationFactor (GHz) (dBm)Output Power(dBm) Reference Frequency Power Technology [6] DoublerFactor 200–245 0(dBm) 16.5 90 nm SiGe HBT (GHz) (dBm) [7] Doubler 317–328 8 (peak) - 130 nm SiGe HBT [6] Doubler 200–245 − 0 16.5 90 nm SiGe HBT [5] Tripler 255–330 8.8 9 35 nm GaAs mHEMT − 130 nm SiGe [7][8 ] TriplerDoubler 235–285317–328 6−8 (peak) 6 - 35 nm GaAs mHEMT − HBT This work Tripler 225–330 7.4 9.6 250 nm InP HBT − 35 nm GaAs [5] Tripler 255–330 −8.8 9 mHEMT 4. Conclusions 35 nm GaAs [8] Tripler 235–285 −6 6 We designed an H-band frequency tripler IC using the triple-push technique in themHEMT 250-nm InP HBTThis technology. work The Tripler 3-way power divider 225–330 was proposed to− generate7.4 W-band 9.6 input signals 250 nm with InP aHBT 120◦ phase difference. The triple-push technique allowed the frequency tripler with a 3rd harmonic power combination4. Conclusions and sufficient suppression of fundamental and second harmonic power. The measurement showsWe that designed the designed an H tripler-band presentedfrequency a tripler broadband IC using output the power triple-push performance technique in H in-band. the 250-nm Therefore, InP theHBT designed technology. frequency The 3-way tripler power IC can divider be effectively was proposed applied forto generateH-band signal W-band generation. input signals with a Author120° phase Contributions: difference.Conceptualization, The triple-push J.J. technique and W.C.; methodology,allowed the J.C.;frequency software, tripler J.C.; validation, with a 3rd J.K. harmonic and W.C.; formalpower analysis, combination J.J.; investigation, and sufficient J.C.; resources,suppression J.J.; of data fundamental curation, J.K.; and writing—original second harmonic draft preparation,power. The J.J.;measurement writing—review shows and that editing, the designed J.J.; visualization, tripler pres J.K.;ented supervision, a broadband J.J.; project output administration, power performance J.J.; funding in acquisition, J.J. All authors have read and agreed to the published version of the manuscript. Funding: This work was partly supported by the Institute for Information & Communications Technology Planning & Evaluation (IITP) grant, funded by the Korean government (MSIT) (No. 2016-0-00185, Development of ultra-wideband terahertz CW spectroscopic imaging systems based on electronic devices). This work was also partly supported by a grant to the Terahertz Electronic Device Research Laboratory, funded by Defense Acquisition Program Administration and by the Agency for Defense Development (UD180025RD). Conflicts of Interest: The authors declare no conflict of interest.

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