Design and Modeling of 4X4-Bit RAM Using Memristor

Journal of Switching Hub Volume 4 Issue 3

Design and Modeling of 4x4-bit RAM using Memristor

Garima Kulshreshtha* Assistant Professor, Department of Electronics and Communication Engineering, IILM Academy of Higher Learning, College of Engineering and Technology, Greater Noida, Uttar Pradesh, India Email: *[email protected] DOI: http://doi.org/10.5281/zenodo.3574045

Abstract The memristor is a non-linear resistor which changes its state relative to the net electric flux passing through its two terminals. It saves its state after an electrical bias is removed. Hewlett Packard is credited for the large deal of efforts which has been spent in the research community to derive a suitable model able to capture the nonlinear dynamics of the nanoscale structures, based on titanium dioxide (TiO2) thin film. When more than one memristors are connected together than the behavior of the device is difficult to predict because the polarity-dependent nonlinear variation in the memristance of individual memristor. The relationships among flux, charge and memristance of diverse composite Memristor, using the HP-TiO2 model has been studied, and the characteristics of complex memristor circuits are analyzed. In this work, we are implementing a 4x4-bit RAM using memristor which works as an EPROM.

Keywords: D-flip-flop, memristor, RAM, titanium dioxide

INTRODUCTION performance of digital circuits without the System performance based on some basic need of further reduction of transistor features like interactivity, interactional, dimensions [2]. The memristors are and reflexionality; which can’t be achieved currently under development and without the involvement of time and improvement by various teams memory-related concepts and constructs. including Hewlett-Packard, SK Hynix, and Therefore, a great chance to develop HRL Laboratories. A team belongs to HP interaction-based computing systems Labs found missing element memristor arrives with the invention of the memristor based on the thin film of titanium dioxide and memristive systems opened up by in 2008. The applications of memristors these new possibilities of nano-electronic are noelectronic memories, computer design. The memristor was originally logic, and neuromorphic computer visualized in 1971 by circuit theorist Prof. architectures. The HP team also Leon Chua as a missing non-linear passive announced the commercial applications of two-terminal electrical component relating memristor technology will be Flash, SSD, electric charge and magnetic flux linkage DRAM, and SRAM in 2011. A i.e. the time integrals of current and researcher’s team from HRL Laboratories voltage [1]. According to the governing and the University of Michigan announced mathematical relations, the memristor's the first functioning memristor array built electrical resistance depends upon its on a CMOS chip in the year 2012. previous state and present electrical biasing conditions, and when combined In this paper, we will discuss that the with transistors in a hybrid chip, memristor is a necessary and useful memristors could radically improve the building block in circuit theory for the

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future semiconductor industry. We will voltage v to the current i, R = dv/di. As a first introduce the history of memristor and strictly mathematical exercise, he explored then explain the TiO2 structure of the properties of this potentially new memristor and their functioning in sections nonlinear circuit element, and found that it 2 and 3. Then, we will analyze the was essentially a resistor with memory– it characteristics of complex memristor was a device that changed its resistance circuits in section 4 by using MATLAB depending on the amount of charge that Simulation. 4-bit RAM and 4x4 memory flowed through the device, and thus he using non-volatile memristive concepts are called this hypothetical circuit element M explained here. All the discussions on a “MEMRISTOR”. This conclusion was memristor-based memory design are given independent of any physical mechanism in section 5. Finally, Section 6 concludes that might couple the flux and charge and this paper. in fact, he did not postulate any mechanism at all. Moreover, the memristor Memristor definition did not even require causality. According to the general mathematical model, a memristor is any passive In other words, the mathematical electronic circuit element that displays a relationship between flux and charge could pinched hysteresis loop in its i-v be the result of some other cause – any characteristic, independent of what the mechanism that led to the constraint physical mechanism is that causes the embodied by the equation dφ = Mdq hysteresis. The model is useful because it would lead to a device with the properties provides quantitative means to predict the of a memristor. He published these initial properties of such a device in an electronic findings [1] essentially as a curiosity; it circuit. However, no mathematical model was not obvious at that time that such a is perfect- it is only an approximation to circuit element existed. In the beginning it real behavior- this is as true for a resistor may be hard to see the potential of a newly as a memristor. introduced fourth element and difficult to use properly, often mixing it up with the As a result of Prof. Leon Chua’s work on other three; however, if it turns out to be nonlinear circuit elements, he made an more suitable to certain tasks, who knows interesting observation, for traditional how useful it might be in the end? Fig. 1 linear circuits; there are only three shows the electronic symbol representation independent two-terminal passive circuit of a memristor element. From the elements: the resistor R, the capacitor C symmetry diagram in Fig. 2, we see how and the inductor L. However, when he the memristor finds its natural place in the generalized the mathematical relations to circuit theory along with the five other be nonlinear, there was another combinations of pairs of circuit variables. independent differential relationship that in principle coupled the charge q that flowed through a circuit and the flux φ in the circuit, M = dφ/dq, that was mathematically different from the Figure 1: Symbol representing a nonlinear resistance that coupled the memristor in an electric circuit.

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Figure 2: Symmetry diagram showing the 6 distinct possible realizations based on the four circuit variables symbol.

As per Chua, it is not possible to panel shows an applied voltage sine implement an equivalent circuit for a wave (gray) versus time with the memristor using any combination of corresponding current for a resistor only passive nonlinear components like- (blue), a capacitor (red), an inductor resistors, capacitors and inductors. (green) and memristor (purple). The Fig. Thus, the memristor represents an 3 shows the I-V characteristics of all the independent 'basis function' for four devices, with the characteristic constructing passive nonlinear circuits pinched hysteresis loop of the [3], so it has a status similar to the memristor. It is also presented by nonlinear resistor, capacitor, and inspection that the memristor curve inductor. The Fig. 3 below is an cannot be implemented by combining illustration of this argument. The upper the others.

Figure 3: Characteristics of passive components.

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Structure of TiO2 Memristor memristor as a function of time [4]. M(q) In the TiO2 memristor, a thin undoped is physically restricted to be positive for all titanium dioxide (TiO2) layer and a thin values of q. A negative value would mean oxygen-deficient doped titanium dioxide that it would perpetually supply energy (TiO2-x) layer are sandwiched between when operated with alternating current. two platinum electrodes. When a voltage (or current) is applied to the device, the DIGITAL CIRCUIT width of the TiO2 and TiO2-xlayer changes IMPLEMENTATION as a function of the applied voltage (or Memristor Model current). Memristor is the basic and precious part of the more extensive newly developed system model, so it is useful to try to model it in the MATLAB Simulink environment [5]. However, the basic environment offers to model in the input- output form, though this it is not possible to be seen memristor as a two-terminal element but as a black box with one input (voltage) and one output (current). If this limitation does not obstruct the user then Figure 4: Cross-section of the first HP MATLAB Simulink is very suitable for TiO2-memristor [4]. the model construction. Fig. 5 shows a functional memristor model. We need to The total resistance (memristance) of this give more attention on the adjustment of system is the addition of the doped and the separate blocks and simulation parameters. undoped part. This gives the dynamic state The exciting harmonic voltage source we of high and low conductance between the used here with the amplitude of 1V and the boundaries. The state variable (w(t)-in this frequency of 1Hz. Thus, the model could particular case) describes how the be finished but if the vectors of voltage memristance of the element evolves with and course are known it is very handy to time try to calculate the charge and flux vectors, for which they describe the memristor The variable w is proportional to the explicitly. charge q. When the current I is passing through the boundary between the higher The hysteresis loops are formed since the and lower conductive states, the current is current through the memristor does not shifted either to the right or to the left with vary linearly with the applied voltage, respect to time factor. Fig. 4 shows the unlike a resistor that follows Ohm’s law. structure of the TiO2 memristor. This justifying by the fact that boundary, w, between the high conductive state and Memristance of this system described as: the low conductive state of the device is moved by the charge carriers as current is ( ) ( ( )) (1) passed the memristor in the Fig. 4. It Here, R1 and R2 are the low and high means that current is increasing at an resistive part of the memristor, Roff and Ron increasing rate compared to the voltage. are the highest and lowest possible This is not linear and i-v curve curves resistance, k is a constant, D is the length upward, as seen on the right side in Fig. 6. of the direction of the charge flow, and q(t) When, the V starts to decrease, the I is the electric charge passing through the increase for a short while since the charge

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carriers still push the boundary towards a depending on the direction of motion the low conductive state [16]. This feedback charge carriers. can be either positive or negative

Figure 5: Memristor model in simulink system.

-4 x 10 Voltage vs Current Charge vs Flux 1.2 1 1

0.8

0.6

0 Flux Current 0.4

0.2

0 -1 -0.2 -1 -0.5 0 0.5 1 -2 0 2 4 6 8 10 12 Voltage Charge -5 x 10 (a) (b) Figure 6: Elementary memristor characteristics (a) Voltage v/s Current (b) Charge v/s Flux.

Memristor-based flip-flop at the state it crashed after the power is re- The use of memristor as a memory creates established and thus, to alter the design of revolutions in the field of the a volatile flip-flop to make it non-volatile semiconductor memory to fulfill the as a basic unit of non-volatile processor property of the “freezing resistance” at design. This is the elementary requirement zero input voltage. The basic concept of to achieve CMOS circuits with this approach is to save the states of a flip- memristors. The Schematic model for a flop device after a power crash and memristive flip-flop is given below in Fig. enabling the flip-flop to continue to work 7.

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In1

Sine Wave

I V Q F

Product

Pulse Generator >= 1e-006 boolean

Compare Data Type Conversion To Constant1 Product1 boolean

>= 1e-005 Data Type Conversion1 Scope Product2 D Compare Q To Constant

CLK

Clock !Q 1 !CLR

Constant D Flip-Flop

Figure 7: Memristive flip-flop schematic.

Voltage of Memristor 1 0.5 0 10 20 30 40 50 60 -5 x 10 Charge of Memristor 10 5 0 10 20 30 40 50 60 D-Flip-Flop Input 1 0.5 0 10 20 30 40 50 60 D-Flip-Flop Output 1 0.5 0 10 20 30 40 50 60 CLK 1 0.5 0 10 20 30 40 50 60

Figure 8: Memristor-based D flip-flop features.

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Here, Sine-wave is to provide continuous 1-bit RAM time input. The pulse generator is used To design one bit RAM a D flip-flop is show the power down signal. The required. Memory cell is a device which amplitude of the pulse is 2V and the pulse can store a one bit of data. Flip-Flop is largely synonymous with "memory cell" as width is 25% of the input sine signal. The well as "Latch". A Set/Reset Flip-Flop, a memristor simulated by the window Toggle Flip-Flop, and a Data Flip-Flop all function technique is used as a sub-circuit are memory cells, but with varying control with one input and four outputs viz. flux, interfaces. D Flip-flop is the most useful charge, current and voltage. A comparator for storing Data and is set up so that on is used to convert the continuous signal to command it stores whatever value is on its a digital signal to be fed as input to the "Data Input" line. The operation of Delay (D) flip-flop is similar to D-latch except flip-flop. It compares the charge to a -5 -6 that the output of Flip-Flop takes the state threshold constant value of 1e and 1e of the input at the moment of a positive Columbus. The product of comparators edge at the clock pin (or negative edge if passes to data type conversion system. It is the clock input is active low) and delays it observed that the input voltage and the by one clock cycle Fig. 9 shows the write output voltage through the memristor are signal as WR and read signal as RD. These identical in Fig. 8. Moreover, the charge in are the active high signals that are given to 1-bit D flip-flop together with the clock the memristor saturates or freezes when pulse. Input supply as Vin is applied. Then the power down signal is encountered. logic is applied and that gives logic 1 When the input is applied again, it starts when 1 is given and gives 0 when 0 is from its previously held value. When the given. All these signals are applied to 1-bit clock goes from 0 to 1, D-Flip-flop output D flip-flop and give the output to the scope attains the same value of the input. as shown in Fig. 10.

WR WR-In RD WR-Out CLK RD-In Inp Logic RD-Out 1-Bit D-Flip Flop 1

Scope 1

Clock

Vin

For Logic Figure 9: 1-bit memristor based RAM Model on MATLAB.

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WR-IN 1 0.5 0 10 20 30 40 50 60 70 WR-OUT 1 0.5 0 10 20 30 40 50 60 70 RD-IN 1 0.5 0 10 20 30 40 50 60 70 RD-OUT 1 0.5 0 10 20 30 40 50 60 70 CLK 1 0.5 0 10 20 30 40 50 60 70 Figure 10: 1-bit memristor based RAM Model on MATLAB.

4-bit RAM Fig. 11 shows the MATLAB Simulink By using the above mention concept here based 4-bit Memristor RAM and Fig. 12 author builds 4-bit RAM by increasing the shows its results. number of D Flip-flop used previously.

1 WR O0 WR RD CLK 1 O1 IN0

RD IN1 O2 IN2

IN3 O3 Clock VIN 4-Bit RAM

1 Scope Vin

I3 Figure 11: 4-bit memristor based RAM on MATLAB.

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Output : O0 1 0.5 0 10 20 30 40 50 60 70 Output : O1 1 0.5 0 10 20 30 40 50 60 70 Output : O2 1 0.5 0 10 20 30 40 50 60 70 Output : O3 1 0.5 0 10 20 30 40 50 60 70 CLK 1 0.5 0 10 20 30 40 50 60 70 Figure 12: Graphs of 4-bit memristor based RAM.

4x4-bit RAM from its previously held value. When For designing a 4x4-bit memory (RAM), 4 the clock goes from 0 to 1, D-Flip-flop blocks of 4-bit RAM are used, developed output attains the same value of the by memristor based D flip-flops. There input. And this behavior of memristor MATLAB Simulink based circuit shown remains continues till 4x4-bit memory in Fig. 13 and their input and output and for other complex memory models signals are represented in Fig. 14. It is to preserve the previous information observed previously that the charge in the during the power off. Using memristor memristor saturates or freezes when the as a single memristive system reduces power down signal is encountered. So, the complexity of all the discussed whenever input is applied again, it starts models.

1 WR O0 WR RD CLK 1 O1 IN0 RD D00 IN1 O2 IN2 D01 D0

Clock IN3 D02 O3 VIN D03 4-Bit RAM D10 1 WR D11 I0 O0 RD D12 D1 1 CLK O1 D13 I1 IN0 D20 IN1 1 O2 IN2 D21 I2 IN3 D22 O3 0 VIN D23 D2 4-Bit RAM1 I3 Scope2 D30

D31 1 WR O0 A0 RD D32 D0 CLK A0 D33 O1 D1 IN0 A0 D3 D2 IN1 A1 O2 D3 A1 IN2

2-4 Decoder IN3 1 O3 VIN 18-4 Decoder A1 4-Bit RAM2

WR O0 RD

CLK O1 IN0

IN1 O2 IN2

IN3 O3 VIN 4-Bit RAM3

Figure 13: 4x4-bit memristor based Memory model on MATLAB.

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Output : O0 1 0.5 0 10 20 30 40 50 60 Output : O1 1 0.5 0 10 20 30 40 50 60 Output : O2 1 0.5 0 10 20 30 40 50 60 Output : O3 1 0.5 0 10 20 30 40 50 60 Address : A0 1 0.5 0 10 20 30 40 50 60 Address : A1 1 0.5 0 10 20 30 40 50 60 CLK 1 0.5 0 10 20 30 40 50 60

Figure 14: Graphs of 4x4-bit Memory.

DISCUSSION is not a single advantage of memristors; For over thirty years, the memristor was they have a long list of benefits which not significant in circuit theory. In 2008, are very valuable for the future Stan Williams and others [2] fabricated semiconductor industry. If someone a solid-state implementation of the considers their size, it is smaller than memristor and thereby cemented its transistors and generates less heat; this place as the fourth circuit element [2, 4]. is the best feature of memristors which The characteristics of all these elements make it suitable component for the relate the four variables in electrical development of system memory. engineering (voltage, current, flux, and Memristors based devices storing charge) intimately. Memristor has some capability is around 100GB in a square properties which cannot be duplicated centimeter. Memristors required less by the other circuit elements like operating voltage; so the reduction in resistors, capacitors, and inductors. The overall power consumption is easily memristor-based circuit is the possible. The quicker boot-ups property replacement of both DRAM and hard makes it favorable for semiconductor- drives. Memristors are able to convert based circuit designers. volatile RAM to non-volatile RAM, this

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Table 1: A detailed comparison between memristor-based memory, traditional memories, and other emerging memories according to the 2011 ITRS report [7]. Particular Traditional Memories Other Emerging Technologies Redox NOR NAND Including DRAM SRAM FeRAM MRAM PCRAM Flash Flash Memristor Cell 1T1C 6T 1T 1T 1T1C 1(2)T1R 1T(D)1R (1D)(1T)1R Element Feature Size 36-65 45 90 22 180 65 45 9 (nm) Density 0.8-13 0.4 1.2 52 0.14 1.2 12 154-309 (Gbit/cm2) Read Time 2-10 0.2 15 100 45 35 12 <50 (ns) Write Time 2-10 0.2 107 104 65 35 100 0.3 (ns) Retention 10 4-64ms N/A 10 years 10 years >10 years >10 years >10 years Time Years

The abbreviations used are: T – transistor, Table 1. These numbers show that C – capacitor, R – resistor, and D – diode. memristors could easily replace flash However every researcher of this field memories, while further speed want to develop semiconductor devices enhancement is required for replacing based on memristors to discover high CMOS memories. HP Labs are currently performance-based systems, but there is reporting a fast switching time of less than some circumspection which restricts them 2ns [12]. Elpida Memory Inc. already to do that. Currently, memristors are not reported the development of a high-speed commercially available. Recently non-volatile resistance memory [13]. It is developed versions of memristor are to be noted that any resistor with a capable to work only at 1/10th the speed of hysteresis curve is considered a memristor DRAM. It has the ability to learn but can [14]. But still, a market waiting for HP also learn the wrong patterns in the Labs memristor-based memory chip beginning. According to some scientist, it replacing flash and solid-state drives is suspected that the performance and (SSD) [15] to commercialize it. speed will never match DRAM and transistors. After a long discussion of CONCLUSIONS advantages and disadvantages of In this paper, we discussed different memristors here we show a detailed models of memristor-based memory and comparison between memristor-based tested them from different perspectives. memory, traditional memories, and other The paper is proposing RAM memory emerging memories. The memristor model that can utilize memristor as a memory is 4x as dense as the hard disk storage element. Our analysis is based on drive (HDD) [11] and 23x as dense as MATLAB simulations of proposed DRAM. As a result, memristor-based memristors based RAM and to develop memories are a good candidate for their Simulink based model. That accounts replacing both the permanent and running for non-volatile effects observed in storages, therefore approaching the ideal practical RAM devices. Random access model of having one flat memory instead memory (RAM) is a form of computer of the memory hierarchy. The current data storage associated with volatile types reading and writing speeds are slower than of memory, where the stored information DRAM and SRAM, but are very fast is lost if the power is removed. We compared to flash memories, as shown in implemented the 4×4-bit RAM using

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memristor. Design of memristor, 7. International technology roadmap for memristive flip-flop, 1-bit RAM, 4-bit semiconductors. URL RAM was implemented on MATLAB http://www.itrs.net/ Simulink. This model can be used in 8. Leon O Chua, Sung-Mo Kang calculators, computers and other electronic (February 1976), “Memristive Devices devices to save the previous value after a & Systems”, Proceedings of IEEE, power crash and enabling to continue to Volume 64, Issue 2, pp. 209−223. work at the state it crashed after the power 9. Robinson E Pino, James W Bohl, is re-established. The future scope of the Nathan McDonald, Bryant Wysocki, work will provide an opportunity for Peter Rozwood, Kristy A Campbell, refining the memristor-based RAM. Once Antonio Oblea, Achyut Timilsina robust, compact memristor models are in (June 2010), “Compact Method for place, circuit level simulations will allow Modeling and Simulation of Memristor for applications to non-volatile computing Devices - Ion conductor chalcogenide- architecture development. based memristor devices”, IEEE - ACM International Symposium on REFERENCES Nanoscale Architectures, pp. 1−4. 1. Leon O Chua (September 1971), 10. Bharathwaj Muthuswamy (2010), “Memristor-the missing circuit “Implementing Memristor Based element”, IEEE Transactions on Chaotic Circuits”, International Circuit Theory, Volume CT-18, Issue Journal of Bifurcation and Chaos, 5, pp. 507−519. Volume 20, Issue 5, pp. 1335−1350. 2. R Stanley Williams (December 2008), 11. M Kryder, C Kim (October 2009), “How We Found the Missing “After hard drives-what comes next”, Memristor: the memristor - the IEEE Transactions on Magnetics, functional equivalent of a synapse - Volume 45, pp. 3406−3413. could revolutionize circuit design”, 12. F Miao, JP Strachan, JJ Yang, MX IEEE Spectrum, pp. 29−35. Zhang, I Goldfarb, AC Torrezan, P 3. Zdenek Biolek, Dalibor Biolek, Viera Eschbach, RD Kelley, G Medeiros- Biolkova (June 2009), “SPICE Model Ribeiro, RS Williams (2011), of Memristor with Nonlinear Dopant “Anatomy of a nanoscale conduction Drift”, Radio engineering, Volume 18, channel reveals the mechanism of a Issue 2, pp. 210−214. high-performance memristor”, 4. Dmitri B Strukov, Gregory S Snider, Advanced Materials, Volume 23, pp. Duncan R Stewart, R Stanley Williams 5633−5640. (May 2008), “The missing memristor 13. “Elpida Memory develops resistance found”, Nature, Volume 453, Issue 1, RAM prototype”, Available from pp. 80−83. http://www.elpida.com/en/news/2012/ 5. Karel Zaplatilek, “Memristor modeling 01-24r.html in MATLAB & Simulink”, 14. L Chua (April 2011), “Resistance, Proceedings of the European Switching memories are memristors”, Computing Conference, pp. 62−67. Applied Physics A: Materials Science 6. Mohammed Affan Zidan, Hossam Aly & Processing, Volume 102, pp. Hassan Fahmy, Muhammad Mustafa 765−783. Hussain, Khaled Nabil Salama (29 15. D Manners (2011), “IEF2011: HP to October, 2012), “Memristor-based replace flash and SSD in 2013”, Memory: The Sneak Paths Problem Electronics Weekly, and Solutions”, Microelectronics 16. AK Maurya, Shilpi Saxena, Shivangi Journal, pp. 1−9. Saxena, Suneeta Singh, Supriya

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Kushwaha (7-8 Feb, 2014), “Digital Intelligent Computing Techniques Arithmetic Circuit and Elimination of (ICICT), pp. 340−343. Improper Shutdown of PC using Memristor”, IEEE International Conference on Issues & Challenges in