System-On-Chip Photonic Integrated Circuits (Invited)

Fred Kish, Fellow IEEE, Vikrant Lal, Peter Evans, Scott Corzine, Mehrdad Ziari, Tim Butrie, Mike Reffle, Huan-Shang Tsai, Andrew Dentai, Fellow IEEE, Jacco Pleumeekers, Mark Missey, Matt Fisher, Sanjeev Murthy, Randal Salvatore, Parmijit Samra, Scott Demars, Naksup Kim, Adam James, Amir Hosseini, Pavel Studenkov, Matthias Lauermann, Ryan Going, Mingzhi Lu, Jiaming Zhang, Jie Tang, Jeff Bostak, Thomas Vallaitis, Matthias Kuntz, Don Pavinski, Andrew Karanicolas, Babak Behnia, Darrell Engel, Omer Khayam, Nikhil Modi, Mohammad R. Chitgarha, Pierre Mertz, Wilson Ko, Robert Maher, John Osenbach, Jeff Rahn, Han Sun, Kuang-Tsan Wu, Matthew Mitchell, David Welch, Fellow IEEE

 electronic IC concept to photonics. This photonic integrated Abstract—Key advances which enabled the InP photonic circuit, or PIC, was first proposed by Miller [6] in 1969. Over integrated circuit (PIC) and the subsequent progression of InP the past 47 plus years since this publication, there have been PICs to fully integrated multi-channel DWDM system-on-chip numerous research demonstrations of PICs; however, the (SOC) PICs are described. Furthermore, the current state-of-the- ability for the economic value derived from an integrated art commercial multi-channel SOC PICs are reviewed as well as key trends and technologies for the future of InP-based PICs in component to outweigh the cost of the integration itself has optical communications. limited their commercial success as well as the investment in their development. To date, the application that has primarily Index Terms— Photonic Integrated Circuit, optical receivers, driven the introduction and scaling of PICs has been their use optical transmitters. for optical communications. This paper will review the many seminal contributions, inventions and discoveries that were critical to the development I. INTRODUCTION of PICs in the field of optical communications. The progression he modern electronics era began with the invention of the from the first PICs to today’s fully integrated system-on-chip Ttransistor and the discovery of minority carrier injection (SOC) state-of-the-art devices used in optical communications [1]. The amazing advances of modern electronics are applications will also be examined. Furthermore, promising underpinned by the scalable nature of semiconductor technologies for future generations of PICs will be discussed to technology and the invention of the integrated circuit (IC) further enable PIC scaling and more ubiquitous use of PICs in [2, 3]. The IC has had unparalleled impact on our modern world optical communications. as a result of the ability of semiconductor and transistor II. PRE-HISTORY OF PHOTONIC INTEGRATED CIRCUITS technology to continually increase the functionality, performance, and reliability of solid-state circuits, while A. Foundational Work reducing their size, power, and costs. This IC scaling has been The invention of the transistor [1] and electronic IC [2,3] laid exponential, resulting in chips today that contain over a billion the foundation for the photonic IC. In this section, we recognize transistors at a cost per transistor of <0.1 microcents. An the essential role of many contributions in science and essential value of the IC is the ability to realize many of the technology that built upon this foundation to realize the first aforementioned improvements by eliminating the need to photonic IC and the progression of PICs used in optical discretely package and assemble individual devices or smaller communications. circuits by providing the device and circuit connections via Table I shows a list of some key foundational advances that semiconductor batch and wafer scale processing. enabled photonic ICs. One of the most significant such The development of the semiconductor laser [4], the advances was the invention of the laser in 1960 [7]. As semiconductor alloy laser [5], and the associated viability of referenced previously, the transistor enabled the discovery of compound semiconductor alloys [5] (which enabled device minority carrier injection. This phenomenon, applied to direct structures with “tunable” bandgaps), led the groundwork for gap semiconductors [8], led to the study of band-to-band light modern optoelectronics and the possibility of extending the generation from carrier recombination, and ultimately, in

Manuscript received September 22, 2016. Authors are with Infinera Corporation, Sunnyvale, CA 94089 USA (corresponding author: Fred A. Kish: 408-572-5200; e-mail: [email protected]).

Digital Object Identifier 10.1109/JSTQE.2017.2717863 1077-260X © 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications standards/publications/rights/index.html for more information. JSTQE-INV-IPIP2018-06851-2017 2 conjunction with the invention of the laser, led to the realization Several points were essential in the statement of the proposal of the semiconductor laser [4]. Almost coincidentally, the first for the photonic IC by Stewart. First, was the statement “…if III-V alloy laser was demonstrated by Holonyak and Bevaqua realized”. This is important to underscore as by 1969, while the [5]. This work was foundational in that it demonstrated alloy most of the key science concepts were established, many of the disorder and defects were not intrinsic to III-V alloys. Thus, underlying technologies to realize a photonic IC had not been III-V alloy materials were viable to make semiconductor developed. Secondly, was the phrase “….economy should devices (including optoelectronic devices) wherein the bandgap ultimately result”. Even after their realization, PICs have been could be “tuned’ by varying the alloy composition. A further generally economically challenged to provide the same value seminal invention in the development of semiconductor lasers proposition as electronic integrated circuits for a number of was the proposal to utilize heterojunctions to simultaneously reasons as described by Kaminow [14], including: provide optical and carrier confinement [9]. This advance enabled the development of the first room-temperature (RT) 1) Active photonic devices require a much more diverse set continuous wave (cw) operation of a semiconductor laser [10] of semiconductor materials (binary, ternary, quaternary) by virtue of employing a double heterostructure (DH) device that are harder to control and manufacture than electronic design. The III-V alloy and hetorojunction are the basis for ICs; virtually all III-V optoelectronic commercial devices deployed 2) The fundamental size limit for photonic device sizes is today. significantly larger than that of electrical devices (photon versus electron wavelength) and hence are not subject to TABLE I the same level of dimensional scaling; SOME KEY FOUNDATIONAL ADVANCES ENABLING PHOTONIC ICS (PICS) 3) PICs require a more diverse set of building blocks than electronic ICs (lasers, detectors, modulators, Year Technology Break-Through Reference multiplexers, demultiplexers, attenuators, amplifiers, 1883 Light detection in a semiconductor [12] polarization management devices, phase adjusters, etc.); 1947 Transistor (including the discovery of minority [1] 4) Applications and circuit designs are not as scalable (using carrier injection) repeated blocks); 1959 Electronic integrated circuit (IC) [2], [3] 5) Progressively complex and sizeable applications have not 1960 Invention of the LASER [7] 1961 Light modulation in a III-V semiconductors [11] emerged to fund continuous investment in the technology 1962 Semiconductor injection laser [4] and manufacturing. 1962 III-V alloy injection laser [5] 1963 Heterojunction semiconductor laser proposal [9] In order to overcome these challenges, a new set of fabrication 1966 Low-loss fiber-optic transmission [13] processes and set of optical device building blocks needed to be 1969 Double heterojunction injection laser (RT, cw) [10] 1969 Photonic IC proposal [6] developed to realize practical photonic ICs. Table II shows some of the key process technologies that were required to be RT = room temperature; cw = continuous wave. developed to realize viable photonic ICs for optical communications. Around this time, it was also shown that a III-V semiconductor could modulate [11] light with an external TABLE II applied voltage. This phenomenon, combined with the ESSENTIAL NEW FABRICATION PROCESSES FOR PHOTONIC ICS previously known light-detectivity of semiconductors [12] laid Year Technology Break-Through Reference the science foundation for the key functionality required to 1956 Bulk Czochralski crystal growth of III-V materials [15] build a photonic IC. The invention of low-loss glass fibers in 1961 Vapor phase epitaxy (VPE) of III-V alloys [18] the optical frequency spectrum by Kao and Hockham [13] 1962 Bulk crystal growth of InP [16] 1962 Cleaved optical facets [27] established the application space for what has been the “killer 1970 Viability of III-V quaternary alloys [29] application” for photonic ICs: optical communications. The (III-V quaternary alloy injection laser) culmination of these seminal advances was the proposal of the 1974 DFB injection laser demonstration [28] (integrated mirrors) photonic IC by Miller [6] in The Bell System Technical Journal: 1976 InGaAsP / InP laser demonstration (RT, cw) [30] 1977 Viability of Metal Organic Vapor Phase Epitaxy [19] “This paper outlines a proposal for a miniature form of (MOVPE) laser beam circuitry…Photolithographic techniques may 1981 Butt-coupled regrowth for photonic ICs [32] 1987 InAlGaAs / InP laser demonstration (RT, cw) [31] permit the simultaneous construction of complex circuit 1991 Selective area epitaxy for photonic integration [33] patterns…if realized…economy should ultimately result”. 1992 High-volume MOVPE tools [25] DFB = distributed feedback; RT = room temperature; cw = continuous wave; Thus, by the end of the 1960’s, the science foundations for the ICs = integrated circuits. photonic IC, as well as its concept were established. The development of direct bandgap materials required a lattice matched III-V substrate. Techniques were developed for B. PIC Building Blocks – Technology and Processes the bulk crystal growth using the Czochralski technique for III-V materials (GaAs) in 1956 [15]. This work was extended JSTQE-INV-IPIP2018-06851-2017 3 to InP in 1962 [16]. However, it was not until approximately lattice-matched to a high-quality, low-defect density binary 1980/1984/1987 that 1.25”/2”/3” diameter substrates were substrate while simultaneously permitting the selection of the commercially available [17]. The ability to realize this scale of desired energy gap (and index of refraction). The quaternary substrate was important for photonic ICs in order to enable alloy enabled the development and realization of long- leveraging the investment in the development of fabrication wavelength (1.1Pm – 1.6Pm) photonic devices operating in the tool capability of the electronic IC industry (including fine-line low-loss, low-dispersion spectral region of glass fiber. The lithography, dry-etching, interconnect metallization and InGaAsP / InP and InAlGaAs / InP quarternary alloys have dielectric deposition). Furthermore, the ability to make a become the mainstay materials utilized for photonic ICs for sufficiently large diameter substrate is important to ensure that optical communications. The first cw RT operation of an enough “good die” per fabricated wafer are generated to enable InGaAsP / InP quaternary semiconductor laser was realized by iterative learning for the improvement of devices and yields. a team at Lincoln Laboratories in 1976 [30]. Later, in 1987, The realization of the semiconductor alloy injection laser lasers based on the InAlGaAs / InP system were demonstrated relied upon the development of another critical technology – to operate cw RT [31]. The InAlGaAs materials system enabled vapor phase epitaxial (VPE) growth of III-V alloys. The VPE improved device performance by virtue of its somewhat wider process was developed by Holonyak and co-workers to realize bandgap and desirable band offsets as well as improved growth the first high-quality III-V alloys (GaAsP) [18]. The process uniformity (by virtue of a single column V constituent), consisted of a closed-tube process relying upon halide vapor expanding the design and fabrication options for photonic ICs. transport. This process was extended by others at Monsanto One of the essential remaining elements for the realization of Corporation in the late 1960’s to open tube VPE processes [19- photonic ICs was a means to integrate a multiplicity of different 21], resulting in the dominant technique utilized for decades to photonic elements onto a chip. Such integration required the produce commercial LEDs. A modification to this technique means for creating variations in bandgap and device structures was made to utilize metalorganic sources in a cold-wall reactor in the two-dimensional plane parallel to the substrate. Several [22-23]. In the late 1970’s, Dupuis and Dapkus at Rockwell techniques were developed that enabled this capability. demonstrated that this technique was capable of growing highly Methods for the etching and subsequent regrowth of a second precise and uniform III-V alloys and high-performance laser optical device structure / waveguide adjacent to a first optical diodes [24]. Today, this metalorganic vapor phase epitaxial device structure have been developed [32] and today are a (MOVPE) technique is the dominant technique utilized to grow mainstay of the photonic IC industry. Furthermore, techniques high-quality, ultra-thin, high-precision layers (with thickness, for selective area epitaxy were also developed [33] and utilized composition, and strain control), and high volumes of photonic widely commercially today. Such techniques enable the crystal ICs. Technology for the simultaneous growth on multiple composition, strain, and thickness to be locally tailored by wafers was introduced for the production of commercial virtue of masking and / or etching the substrate. optoelectronic devices in the early 1990’s [25]. Today, such Thus, as evidenced by Table II, it took another ~20 years to tools are capable of growing > 1 sq. ft. of epitaxial material per develop the requisite fabrication processes and technologies to growth with very precise control of epitaxial layer composition realize viable photonic ICs after their conceptual proposal by and thicknesses required for photonic ICs [26]. Miller. This development time is attributed to the need to A further essential technology that arose from the develop the necessary materials capabilities and integration development of the III-V alloy injection laser was the ability to techniques to realize the wide variety of device “building cleave a crystalline plane to create a mirror (an atomically blocks” that were required for photonic ICs. smooth surface) to facilitate both optical access to the crystal and form the laser resonator [27]. This technique is widely C. PIC Building Blocks – Devices utilized in photonic ICs to provide access to the photonic circuit. However, in photonic ICs, an alternate method of forming internal mirrors for feedback from the gain region is A suite of devices is required to build photonic ICs that fulfill required for laser operation. The development of the distributed the vision of Miller of being sufficiently functional and feedback (DFB) laser diodes enabled the formation of integrated so that “…economy should ultimately result”. A integrated mirrors within the laser wherein a periodic complete optical communication system minimally requires corrugation of a material with a different index of refraction is sources (lasers), modulators, waveguides, and photodetectors. fabricated in close proximity to the gain region, providing an In addition, other functions such as optical amplifiers, integrated and distributed mirror, and path for laser diode multiplexers, demultiplexers, phase-shifters, and variable integration within a PIC [28]. optical attenuators as well as tunable devices are required for In order to develop the complex photonic circuit patterns and today’s most sophisticated communication systems (e.g., those full suite of devices referred to by Miller, additional flexibility utilized for coherent communications). Table III shows the in the III-V alloy materials was essential. Specifically, there realization and technological advances that have established the was a need to extend the III-V ternary alloys to quaternary device “building blocks” for the construction of photonic ICs. alloys. Holonyak et al., demonstrated the first quaternary The oldest solid-state optical device is the photodetector. semiconductor lasers (AlGaAsP DH laser diodes) in 1971 [29]. The first III-V photodetector (InSb) was developed in 1959. The quaternary alloy permitted a host of materials to be both [34]. This was followed by the development of InP-based JSTQE-INV-IPIP2018-06851-2017 4 photodetectors (made from the quaternary InGaAsP system) in [19]. Together, with Holonyak and co-workers, they developed 1978 [35], and ultimately, led to the realization of waveguide the first QW MOVPE injection lasers (cw, RT) [41]. Today, photodetectors by Bowers and Burrus in 1986 [36]. the vast majority of all semiconductor lasers (including those in The development of a semiconductor laser capable of being photonic ICs) consist of QW MOVPE lasers. Work by Laidig integrated into a photonic IC was an essential need for realizing et al. [42], demonstrated that the QW may consist of a strained photonic ICs. This need was satisfied with the proposal [37] of layer, thus enabling a larger degree of “tunability” (compared a distributed feedback (DFB) laser utilizing repeated and to lattice-matched structures). Such strained QWs opened the periodic index of refraction variations to form integral mirrors. possibility for significant band-structure engineering that Working semiconductor DFB laser diodes were first yielded additional improved laser performance (higher optical demonstrated in 1974 [28], with cw, RT operation following in power, lower dissipated power, improved transmission 1975 [38]. The first InP-based long-wavelength distributed characteristics) and reliability [43], [44]. Quantum wells (and feedback lasers (cw, RT) were demonstrated in 1981 [39]. In their associated quantum size effects) as well as strained layers addition to enabling the integration of lasers, DFB devices for band-structure engineering have also been utilized to realize enable improved performance characteristics (e.g., single significant improvements in optical modulators, including frequency operation, reduced phase noise) that are critical for improved modulation efficiency and reduced optical loss. long-distance optical communications. The first III-V optical modulator utilizing the electroabsorption effect was demonstrated in 1966 in GaAs TABLE III [45]. These structures were later developed in InP-based SOME KEY DEVICE DEMONSTRATIONS AND PIC “BUILDING BLOCKS” materials [46] in 1984. Such devices have been important to DEVELOPMENT MILESTONES realize high-speed modulation for on-off keying (OOK) at Year Technology Break-Through Reference speeds > 2.5 Gb/s (for long-distance links) as they enabled the 1959 III-V photodetector [34] 1966 III-V electroabsorption (EA) modulator [45] ability for both low and negative frequency chirp of the 1971 DFB laser proposal [37] modulated signal. Furthermore, an important contribution on 1974 DFB injection laser demonstration [28] the road to the photonic IC was the demonstration of the 1975 DFB injection laser (RT, cw) [38] formation of self-images in multimode optical waveguides [47], 1975 Self-imaging in planar optical waveguides [47] resulting in the ability to form a variety of couplers, splitters, 1977 Quantum well (QW) injection laser [40] 1979 QW MOVPE injection lasers (RT, cw) [41] and filters. These effects were later combined with the ability 1978 InGaAsP/InP photodetectors [35] to modulate the phase of the light in the crystal to form a III-V 1981 InP-based DFB injection laser (RT,cw) [39] Mach-Zehnder modulator (MZM) in 1984 in GaAs [48]. InP- 1984 Strained QW injection laser [42] 1984 III-V Mach-Zehnder modulator [48] based MZ modulators were later developed in 1989 [49]. While 1984 InP-based electroabsorption (EA) modulator [46] these devices have been utilized in OOK-based systems, their 1986 Strained QW laser band-structure engineering [43], [44] dominant use has been in devices to optically encode the signal 1986 Waveguide photodetector [36] in phase for coherent communications. 1988 Phased array waveguides [50] 1989 InP-based Mach-Zehnder modulator [49] Multiplexers (and demultiplexers) are important elements in 1991 Arrayed waveguide gratings (AWGs) [51] photonic ICs to combine (and decombine) multi-wavelength 1992 III-V AWG devices [52] signals, especially in wavelength division multiplexing (WDM) DFB = distributed feedback; RT = room temperature; cw = continuous wave; applications. The dispersion and focusing properties of a phased MOVPE = Metal organic vapor phase epitaxy; Al = Aluminum. array of optical waveguides [50] can be utilized to create an In the late 1970’s, the performance of semiconductor lasers NxN multiplexer (also known as an arrayed waveguide grating was drastically improved by the discovery that ultra-thin layers (AWG)) as proposed by Dragone in 1991 [51]. The first III-V (quantum wells, QWs) could be employed for the active (gain) AWG was realized in InP-based materials in 1992 [52] as a region in these devices, thus yielding dramatic improvements demultiplexing filter in a receiver PIC. in the performance of the laser, including higher output power Thus, a period of ~40 years was required to develop the and lower power dissipation. Such improvements were requisite suite of devices to realize a sufficient toolkit for the important for photonic ICs in order to enable the integration of development of photonic ICs. This slow progression was a additional elements (which add loss to the circuit) while result of the many different device types, designs, and maintaining manageable thermal characteristics. These integration challenges. By the early 1990’s, all of the improved QW laser results are achieved by the ability of the technological tools (materials, fabrication processes, devices quantum wells (via quantum size effects) to substantially structures, and integration techniques) had been developed to reduce the laser threshold current, free-carrier loss, and realize photonic ICs to meet the growing need for increased temperature sensitivity of threshold current. The first quantum bandwidth in the network. well semiconductor injection lasers were demonstrated by Holonyak et al., in 1977 [40]. Roughly at the same time, III. PHOTONIC IC HISTORY: PAST TO PRESENT Dupuis and Dapkus developed MOVPE growth tools and A. Early Photonic ICs techniques that offered a superior degree of control and precision while simultaneously realizing high-quality crystals The first research demonstration of semiconductor-based JSTQE-INV-IPIP2018-06851-2017 5 transmitters (LEDs) was reported in 1962 [53]. However, the [59]. Amongst the first commercial applications of these first telecommunications networks utilizing semiconductor devices was their implementation in the first wavelength devices were not deployed until 1980 for LEDs [54] and 1984 division multiplexed (WDM) systems [60, 61]. for directly modulated lasers [55]. The progression of data In the late 1990s, optical network architects sought to capacity per transmitter chip for commercially deployed develop dynamic WDM optical networks wherein a tunable devices in optical networks is shown in Fig. 1. For over the laser would enable wavelength switching and routing in next 10 years, commercial implementations focused on conjunction with recon¿JXUDEOHoptical add / drop multiplexers incrementally higher data rates in discrete devices, doubling at (ROADMs). This, in combination with the desire to eliminate a rate of approximately every 2.2 years (dashed line, fit to the the stocking and sparing of many fixed wavelength lasers and data). associated line cards required in a WDM system led to the next major advancement in photonic ICs in optical communications: the widely tunable laser (with a tuning capability over the full C or L-Band). Over the last 30 years, a variety of widely tunable laser technologies have been developed (see [62] for a comprehensive review). However, the main PIC technology that has met with commercial success is the sampled-grating distributed Bragg UHÀHFWRU (SG-DBR) laser which employs four distinct sections to tune the gain, phase, and front and back mirror sections [63, 64]. The mirror sections each employ a different sampled grating structure. A sampled grating is a conventional grating with the grating elements removed periodically, ZKLFK OHDGV WR UHÀHFWLRQ VSHFWUD ZLWK SHULRGLF maxima in a limited wavelength region. These devices operate by having different widely-spaced and independently tuned sampled grating UHÀHFWLRQ combs at each end of the cavity. The overlap of the reflection spectrum serves to select a single mode within the gain bandwidth of the laser (due to a small diơerence Fig. 1: Scaling of the data capacity per chip in commercial optical networks for LQSHULRGLFLW\EHWZHHQWKHUHÀHFWLRQ spectra). The phase tuning InP-based transmitter chips. The data capacity per chip has doubled an average section is utilized to tune the mode to the resonance condition of every~2.2 years (fit to the data) for the last 30+ years enabled by the selected by the overlap of the tuned sampled grating mirrors. employment of photonic ICs. Since 2004, commercial system-on-chip (SOC) DWDM PICs have been essential to this scaling (dark blue). The most recent The diơering pitches of the front and back sampled gratings research result demonstrating a SOC DWDM PIC capable of 4.9 Tb/s capacity lead to large changes in lasing wavelength with small changes is also shown (light blue) in tuning of the mirrors relative to standard DBR lasers. Thus, this device architecture results in a wide-tunability (full C or L- In his proposal for the photonic IC [6], Miller highlights that Band) with an excellent side mode suppression ratio. a primary motivation for photonic integration is economics. In order to improve output power, further integration of a Over the past 40 plus years since this publication, there have semiconductor optical amplifier (SOA) has been employed in been numerous research demonstrations of PICs, however, only these devices [65]. Commercial devices incorporating this limited commercial success. Applications are required wherein structure are capable of > 16dBm fiber coupled output power the benefit of the integration outweighs its costs. In 1986, the [66]. Furthermore, a fully integrated transmitter has been work of Kawamura and co-workers realized what was to be the developed by the additional integration of a modulator (with the first commercial photonic IC, the electroabsoption modulated SG-DBR and SOA). First generation versions of this device laser (EML), integrating two functions on a single chip (a utilized an EAM [67] and were deployed in live networks in distributed feedback laser and an electroabsorption modulator 2003. However, due to the limited operating wavelength or EAM) [56]. A key design criterion for this device that bandwidth of the EAM, second generation devices have dictates the required integration techniques (typically butt-joint integrated Mach-Zehnder modulators (MZMs) with the SG- regrowth or selective area growth) is detuning the active region DBR and SOA to achieve an integrated transmitter PIC capable of the electroabsorption modulator to a more transparent region of tuning over the entire C-Band at 10 Gb/s [68.,69]. Fromthebeginningofthe¿UVWoptical network deployment (bandgap) than that of the lasing wavelength (typically 20- until 2004, thescaling of bandwidth wasachievedbyscaling 150nm detuning from the lasing wavelength [57, 58]). This thebandwidthofasingletransmitter/receiveropticalchannel. detuning provides a good trade-oơ between modulator However,inthelate1990sscalingbeyond10Gb/sstalledasa extinction ratio, chirp, loss, and drive voltage. The need and resultofincreased ¿EHUtransmissionimpairments (chromatic success of this device was driven by the scaling of bandwidth and polarization mode dispersion) at higher serial data rates. In (>2.5 Gb/s) and overcoming chromatic dispersion transmission 2004,thisbottleneckwasovercomewiththeintroduction ofƚhe impairments for intermediate and long-haul applications while ¿UVW commercial SOC DWDM 100 Gb/s PIC transmitter and simultaneously providing a better cost than comparable discrete receiver chips which were enabled by simultaneous serial components. Commercial EMLs were first deployed in 1996 at (within achannel)andparallel(multiplechannels)integration 2.5 Gb/s and in 1998 at 10 Gb/s in long-haul terrestrial networks [70]. JSTQE-INV-IPIP2018-06851-2017 6

The integration level scaling for transmitter photonic ICs ICs for improved economy and scalability. In 1993, a 16- deployed in commercial networks is shown in Fig. 2. In this channel integrated transmitter consisting of distributed Bragg figure, we define an optical function as any one of the reflector (DBR) lasers, 2.5 Gb/s EAMs, a star-coupler following: light detection, light emission, laser frequency multiplexer, and a single output optical amplifier was tuning, optical amplitude amplification, optical amplitude demonstrated [79] as well as a 4- and 8-channel integrated attenuation, optical phase tuning, optical modulation, optical receiver consisting of an arrayed waveguide grating (AWG) multiplexing, and optical demultiplexing. In 2004, 100 Gb/s demultiplexer and waveguide photodiodes [80, 81]. These DWDM system-on-chip transmitter and receiver PICs were demonstrations were important feasibility proofs of using first deployed [70]. These developments resulted in an photonic ICs for WDM applications; however, the PICs inflection point in the scaling of the number and breadth of demonstrated lacked the performance (including loss, output integrated optical functions, integrating 51 functions onto a power, sensitivity, polarization dependent loss, etc.), control single SOC DWDM transmitter chip. Second generation capability and control functions, economics, scalability, and 100 Gb/s SOC transmitter PICs added per-channel semiconductor optical amplifiers enabling ultra-long haul reach manufacturability necessary for a commercial impact. In 2004, and moderate tunability by virtue of integrating 61 optical the first commercially viable SOC DWDM PICs (100 Gb/s functions [71, 72]. Third generation devices were architected transmitters and receivers utilizing on-off keying (OOK)) were for coherent transmission (polarization multiplexed quadrature developed and deployed [70]. These photonic ICs required new phase-shift keying, PM QPSK). These photonic ICs were first architectures and designs. The 100 Gb/s (10-channel x 10 Gb/s deployed in 2012 and consisted of 500 Gb/s DWDM SOC per channel) SOC DWDM transmitter integrated 51 individual multi-channel transmitters [73-75] and receivers [75-77]. The optical functions on a monolithic single chip as shown in Fig. 3 500 Gb/s multi-channel transmitter devices integrate over 440 (schematic left, image right). These transmitter photonic ICs functions, including tunable lasers, nested MZ modulators, consist of a 10-channel array with each channel consisting of a arrayed waveguide grating (AWG) multiplexers / thermally tuned DFB laser integrated with a 10 Gb/s EAM, a demultiplexers, photodetectors (PDs), variable optical variable optical attenuator (VOA) for power flattening and attenuators (VOAs), phase adjusters (PAs), and multi-mode balancing, and a power monitor. Each of the 10 channels is interference (MMI) couplers. The introduction of SOC III-V multiplexed into a monolithically integrated AWG multiplexer PICs resulted in a significant increase in the scaling rate of which provides a single output for fiber-coupling in a hermetic integrated optical functions. In 2014, the scalability of the package. The 10 channels for the 100 Gb/s transmitter PIC are InP-based PIC platform to substantially higher integration arranged on a standard 200GHz (International levels was demonstrated in the realization of a 2.25 Tb/s 40- Telecommunications Union) ITU grid in the C-band. The channel transmitter PIC integrating >1700 functions [78]. system implementation of these PICs utilizes downstream multiplexing of additional transmitter PICs (which are tuned to adjacent wavelengths) in order to achieve a system-level 25GHz grid. The thermally tuned DFB lasers are utilized to compensate for manufacturing variations and over life wavelength drifts. These SOC DWDM transmitter PICs were the first commercially deployed devices to: operate at 100 Gb/s, to integrate multiple channels on a PIC, to utilize arrayed- waveguide gratings (AWGs), and to utilize arrays of tunable lasers.

Fig. 2. Scaling of the number of optical functions per chip for commercial photonic ICs deployed in optical networks. The SOC DWDM photonic ICs (dark blue) integrated >440 optical functions into a single InP-based chip. Transmitter PICs with a capacity of 2.25 Tb/s integrating >1700 optical functions (light blue) have been demonstrated in the research lab and demonstrate the scaling capability of the platform.

B. System-on-chip (SOC) DWDM Photonic ICs

1) 100 Gb/s On-Off-Keyed (OOK) DWDM Transmitter and Receiver Photonic ICs Fig. 3: Schematic (left) of the architecture of first and second generation 100 Gb/s (10 channels x 10 Gb/s) transmitter PICs. First generation PICs monolithically integrate 51 functions and utilizes variable optical attenuators at The successful development and deployment of WDM the output of each channel (picture right). Second generation PICs integrate 61 optical networks led to the investigation of utilizing photonic functions per chip, adding semiconductor optical amplifiers on a per-channel basis. JSTQE-INV-IPIP2018-06851-2017 7

A companion 100 Gb/s (10 channels x 10 Gb/s) SOC optical transport networks using these 100 Gb/s SOC PICs have DWDM receiver PIC was also developed and deployed with the been very successful. From 2007 to 2011, these systems 100 Gb/s transmitter. The receiver photonic IC consists of a captured >43% of all long-haul DWDM 10 Gb/s port shipments single input channel routed through a waveguide to a [84]. 1 x 10-channel polarization independent AWG demultiplexer to per-channel 10 Gb/s waveguide PIN photodetectors [70] as 2) 500 Gb/s Coherent Transmitter and Receiver Photonic ICs shown in Fig. 4 (schematic left, picture right). The transmitter and receiver PICs are packaged with a 10-channel analog ASIC In the mid to late 1980s, an interest in coherent optical EAM modulator driver chip (transmitter) and a 10-channel communications utilizing a local oscillator (LO) in the coherent transimpedance amplifier (TIA) chip (receiver) in a hermetic receiver as an amplifier [85] led to the research and hybrid metal-ceramic package with a thermoelectric cooler development of coherent receiver PIC technology. These early (TEC) for temperature control of the photonic ICs [70, 75]. A PICs [86, 87] were designed for binary phase-shift keying single mode fiber (SMF) is coupled to the output (input) of the (BPSK), wherein the symbols are separated by 180°. Work on Tx (Rx) PIC in the transmitter (receiver) module. coherent receivers was eclipsed by the successful deployment of the erbium doped fiber amplifier (EDFA) which has come to dominate optical communication deployments by providing low-noise optical gain throughout optical networks. In the mid- 2000s, the field of coherent optical communications was revived by needs for higher spectral efficiency and improved transmission performance in the presence of significant chromatic and polarization mode dispersion impairments manifested in > 40 Gb/s OOK transmission. These needs coupled with the availability of high-speed Si ASICs and advanced digital signal processing (DSP) algorithms led to the development [88] and deployment [89] of .40 Gb/s and 100 Gb/s coherent systems. These systems employed polarization

Fig. 4: Schematic (left) of the architecture of first generation multiplexed (PM) quadrature phase-shift keying (PM QPSK) 100 Gb/s (10 channels x 10 Gb/s) receiver PICs. These SOC PICs integrate an with a spectral efficiency of 4 bits/symbol and utilized discrete AWG demultiplexer and 10 high-speed PIN waveguide photodetectors (picture optical components in combination with DSP ASICs. The DSP shown at right). ASICs are enabling for coherent communications in that they eliminate the requirement for ultra-stable optical sources and A second generation 100 Gb/s SOC DWDM transmitter PIC analog phase/frequency/polarization tracking of the optical capable of ultra-long-haul and submarine reaches (>6000km) signal at the receiver. [71] has also been developed and deployed. Thus, the 100 Gb/s Despite their advantages in spectral efficiency and transmitter and receiver PIC-modules have more than sufficient transmission performance, coherent optical systems require ~4x performance to close all long-haul and many ultra-long-haul the number of optical components compared to a comparable links in commercial carrier class networks. This second OOK system. This requirement makes photonic ICs a natural generation 100 Gb/s transmitter PIC adds per-channel fit for the realization of SOC coherent transmitters and semiconductor optical amplifiers (SOAs) as shown in Fig. 3 receivers. In 2008, a 10-channel PM differential QPSK (left). The addition of the SOAs also enables tuning over 75 transmitter PIC was demonstrated [73, 74]. This SOC GHz in product form by providing the necessary power and transmitter chip was the first fully integrated QPSK coherent performance margins, reducing sparing costs for customers transmitter and the first fully integrated multi-channel coherent [71-71, 75]. transmitter and is the basis for the 500 Gb/s coherent PM QPSK The 100-Gb/s transmitter and receiver PIC modules are both commercial DWDM SOC transmitters [75, 90]. A schematic integrated onto a single dense-wavelength-division multiplexed of the 500 Gb/s SOC transmitter PIC which integrates over 440 (DWDM) linecard for implementation in an optical transport functions is shown in Fig. 5 (top). The device consists of system capable of 1.6-Tb/s (C-band) total capacity per fiber. 10 channels with a per-channel thermally tunable DFB laser and The integration of a WDM system onto a pair of monolithic optical power monitor. The light output from each DFB laser chips and modules and then a single linecard provides unique is split into two paths: one path for TE mode data, and one for architecture advantages and economic benefits. These benefits “TM-to-be” mode data (TE mode on chip). The light for each are realized at the component, system, and network levels and data stream feeds a nested MZ modulator (where each nested include reduced space and power dissipation, higher reliability, MZ modulator has an in-phase (I) and quadrature (Q) and lower component costs. Furthermore, the reduced size of component). Each MZM is modulated at 15.87 Gbaud to the 100 Gb/s SOC PICs enables the integration of a cross-point enable 50 Gb/s data capacity bandwidth per channel. The switch onto the system linecard for bandwidth management and nested I-Q MZ modulator contains a number of sense control flexibility in provisioning a wide variety of client services. The elements to ensure the appropriate bias is maintained over life. SOC PICs also facilitate significant advantages in the The outputs of the nested MZ modulators are routed into one of installation, turn-up, and operational expenses as described in two AWGs (one for each polarization). The light output from [75, 82-83]. As a result of the benefits of photonic integration, each AWG is combined off-chip with a polarization rotator and JSTQE-INV-IPIP2018-06851-2017 8 combiner. A photograph of the the active block of the PIC is and V (vertical) polarization components with one polarization shown in Fig. 5 (bottom). This PIC pioneered the use of rotated such that both inputs are launched into the chip in the InP-based MZMs for use in commercial coherent TE orientation. An input TE polarizer on both paths on the chip communications systems. These devices showed that for the first strips any remaining TM components. Furthermore, VOAs first time, sufficiently low distortion could be achieved from the are also deployed to equalize the amplitude of the various MZM modulator to enable performance comparable to discrete signals within the chip. The H and V signal components are lithium niobate (LiNbO3) modulators with commercially subsequently wavelength demultiplexed into 10 distinct outputs available DSP chips, closing long-haul and ultra-long haul links as shown in the figure using a single AWG. Each channel in real live deployments of 4600km (PM QPSK) and 9700 km output is then mixed with a local oscillator (LO) consisting of a (PM BPSK), respectively (data not shown). thermally tunable DFB using a 90϶ optical hybrid. The LO is

tuned to the incoming signal frequencies and is split and mixed with both the H and V polarizations. The mixed outputs are then fed to high-speed, balanced photodetector pairs with 3-dB bandwidths of >25 GHz (4 pairs per channel, 80 PDs per PIC).

Fig. 6. Schematic diagram of the InP-based 500 Gb/s PM-QPSK DWDM SOC receiver PIC integrating over 170 functions onto a monolithic chip. After demultiplexing, the incoming signal is mixed with a local oscillator (implemented via a thermally tuned DFB laser) and fed to two pairs of balanced photodetectors per polarization.

The 500 Gb/s SOC DWDM transmitter and receiver PICs are each hermetically packaged in a stacked ceramic package using land grid array (LGA) interconnects capable of >1000 electrical interconnects (I/O). The transmitter (receiver) PIC chip is Fig. 5: Schematic diagram (top) of an InP-based 500 Gb/s PM-QPSK DWDM SOC transmitter PIC integrating over 440 functions onto a single chip. Each hybrid packaged with a SiGe MZM driver (TIA) ASIC that channel of the monolithic PIC consists of a thermally tunable DFB laser with a drives (amplifies) 40 bit streams at 15.87 Gbaud. Further backside power monitor (PM), and a TE/”TM-to-be” splitter sending light to a integrated inside the transmitter module is a TEC and control nested pair of MZ modulators. Two AWGs separately combine the 10 TE/”TM- ASIC with >1M gates for biasing the 40 MZMs and all of the to-be” channels into two output waveguides. These waveguides feed an off- chip polarization rotator (Rot) and polarization beam combiner (PBC). A sense and control elements on the PIC (>300 control signals). photograph (below) of the active block of the 500 Gb/s PIC which integrates: Two polarization maintaining (PM) fibers are coupled to the 10 tunable distributed feedback lasers, 20 nested Mach-Zehnder modulators two outputs / inputs of the transmitter / receiver PIC modules. (MZMs) (40 total MZMs), and all of the sense and control functions required Commercial systems utilizing the 500-Gb/s coherent SOC for the PIC. DWDM PIC modules utilize real-time DSP and forward error A companion 500 Gb/s coherent PM-QPSK receiver PIC correction (FEC) ASICs that are used to implement linecards architecture was developed in 2011 [75-77] integrating over with 500 Gb/s data throughput. These linecards are the heart of the commercial superchannel optical transport system capable 170 optical functions onto a monolithic chip. This chip is the of a total fiber capacity of 8 Tb/s in the C-band. Each individual basis for the 500 Gb/s coherent PM QPSK commercial DWDM chassis is capable of with 5 Tb/s of DWDM transport capacity receiver and was the first fully integrated QPSK coherent and 5 Tb/s of non-blocking OTN (optical transport network) receiver (integrating the local oscillator (LO) as well as the 90° switching which is made feasible by the reduced size and power hybrid and high-speed detectors) as well as the first fully enabled by photonic integration. The system exhibits similar integrated multi-channel coherent receiver. A schematic of the types of benefits afforded by the earlier generation OOK PIC- 500 Gb/s DWDM SOC coherent receiver PIC is shown in based system, described in Section III.B.1, including increased Fig. 6. The dual polarization that is launched from the network bandwidth efficiency, reduced power consumption, transmitter and scrambled throughout the fiber transmission is and reduced capital and operating costs. These systems have split via discrete components off-chip. The light is then been shipping since mid-2012 and from 2012-2016 have ranked launched into the SOC receiver PIC-Module as H (horizontal) JSTQE-INV-IPIP2018-06851-2017 9 second in worldwide market share for 100 Gb/s long-haul DWDM ports shipped [91].

3) 1.2 Tb/s Widely Tunable Coherent Transmitter and Receiver Photonic ICs

The development of coherent modules with variable modulation formats and implementation of optical switching (via reconfigurable optical add drop multiplexers (ROADMs)) compels the ability to implement channels in a coherent system that are tunable across the entire extended C-Band. Previous generations of SOC DWDM PICs utilize thermally tuned DFB lasers with a moderate tuning range; however, SOC DWDM coherent transmitter and receiver PICs with widely (extended Fig. 7. 1.2 Tb/s transmitter PIC architecture integrating widely tunable lasers, C-band) tunable lasers enable the realization of fully flexible I-Q Mach-Zehnder modulators, and per-polarization VOAs and SOAs. Six and sliceable super-channels. This capability greatly reduces channels are integrated and employ 33 Gbaud PM 16 QAM modulation to network cost while at the same time maximizing network achieve 200 Gb/s per channel and a total of 1.2 Tb/s total data throughput utilization, by allowing the network to be fully reconfigurable capacity. within the optical domain. Both 1.2 Tb/s (6 channels x 200 Gb/s per channel) transmitter and receiver PICs with independent widely tunable lasers per channel over the extended C-band have been developed and transferred into manufacturing in 2016 [92-93]. These photonic ICs were the first commercial fully integrated coherent transmitter and receiver PICs with a widely tunable laser, the first multi-channel coherent transmitter and receiver PICs with integrated widely tunable lasers, and the first commercial multi-channel PICs operating at 16 QAM. The 1.2 Tb/s 6-channel DWDM SOC transmitter PIC architecture is shown in Fig. 7. The transmitter photonic IC integrates an independent widely tunable laser on each channel. The laser signal is split and fed into two nested I-Q MZMs. Direct current (DC) controls in each of the four arms of the nested MZM are used for biasing, followed by radio frequency (RF) electrodes for high-speed modulation. The I-Q MZM is designed for a Vpi of 2.5V and linear operation at 33 Gbaud to enable PM 16 QAM (quadrature amplitude) modulation. At the output of the MZM, a VOA and SOA provide additional power balancing and amplification before the signals from all channels are combined to a single waveguide bus using a multi-stage multi-mode interference (MMI) power combiner designed to provide a flat response across the C-band. The two outputs from Fig. 8. 1.2 Tb/s receiver PIC architecture integrating 1x6 MMI-based power the PIC are then polarization multiplexed off chip to realize a splitters for the two orthogonal polarization data streams, per-channel widely dual polarization transmitter. tunable lasers with taps as local oscillators, 90° optical hybrids, and The 1.2 Tb/s 6-channel DWDM SOC receiver PIC photodetector arrays for coherent detection. Six channels are integrated to architecture is shown in Fig. 8. Two orthogonal polarization detect 33 Gbaud PM 16 QAM modulation to achieve 200 Gb/s per channel and a total of 1.2 Tb/s total data throughput capacity. inputs are rotated to TE with off-chip optics, subsequently 1x6

MMI power splitters distribute the incoming signals which is The widely tunable transmitter and receiver PICs are mixed with a widely-tunable laser local oscillator via 90° hermetically co-packaged in a stacked ceramic transceiver optical hybrids and then detected by high speed photodiode package using LGA interconnects capable of >1000 electrical arrays capable of 33Gbaud operation (4 PDs per polarization). I/O resulting in a 1.2 Tb/s coherent transceiver module as Additionally, a low-loss MMI power tap on the output of each shown in Fig. 9. The transmitter (receiver) photonic ICs are tunable laser is used to probe spectral properties, including assembled with MZM driver (TIA) array ASICs integrating 24 wavelength, power spectral density and linewidth during device high-speed bit streams in SiGe BiCMOS technology, and a characterization. compact multi-chip module (MCM) with control ASIC drivers

drivers for the Tx PIC. The transceiver also integrates free- space optics for polarization multiplexing/de-multiplexing the JSTQE-INV-IPIP2018-06851-2017 10 polarization multiplexed signals and TE coolers for temperature power flattening on the PIC (the laser gain section and SOAs control of the photonic ICs. The transceiver operates 6 channels set to constant bias; VOAs were unbiased). The output power at 33Gbd × 2 polarizations × 16QAM, for a total data from the PIC can be flattened to a constant level across all throughput capacity of 1.2Tb/s (after FEC overhead). channels and wavelengths using active control of the SOAs/VOAs. Measurements on standalone tunable laser test chips, fabricated with the same laser designs and process as used on the fully integrated PICs, showed that the lasers are capable of >16dBm total optical output power (on-chip) under nominal bias conditions (data not shown).

Fig. 9. 1.2 Tb/s coherent transceiver module (6 channels x 200 Gb/s per channel) achieved via PM 16-QAM modulation at 33 Gbaud. The transceiver integrates 6-channel Tx and Rx PICs, a 24 bit stream MZMD and TIA array, TE coolers, and stacked control ASIC drivers. Free space optics implements Fig. 10. Widely tunable laser wavelength tuning maps vs. estimated mirror polarization multiplexing/de-multiplexing of the polarization multiplexed effective index for mirrors A and B for each of 6 channels on the 1.2 Tb/s signals and couples light to the input and output single-mode fibers. transmitter PICs.

The widely tunable lasers integrated in the coherent transmitter and receiver PICs are based on a four-section DBR type design, incorporating differentially tuned grating mirrors consisting of reflection combs of different spectral spacing to achieve continuous tuning over the entire extended C-band (see for example [62]). The wavelength tuning maps vs. estimated change in effective index for bias applied to mirrors A and B are measured for each of 6 channels from the 6-channel widely tunable transmitter PIC (Fig. 10.) The change in the effective index of the mirror waveguide is estimated from the bias induced wavelength shift:

݀O ݀݊ ൌ݊ത௚ ൗ (1) O௖

where ݊ത௚ is the waveguide group effective index, dO is the wavelength shift on the mirror and Oc is the center wavelength over the tuning range. The color indicates the output wavelength of the tunable laser. All channels on the PIC show uniform and reproducible behavior, and span the extended C- Fig. 11. Optical spectra at the output of the PIC for an exemplary channel showing performance over the entire extended C-band. Over 45 dB of side- band (1526.6 – 1566.9 nm) with margin in the central free mode suppression ratio (SMSR) is maintained over the tuning range. spectral range (FSR). Each mirror on the tunable laser requires less than 100mW of power while the phase section requires less A key requirement for lasers employed in coherent than 50mW of maximum power in order to achieve tuning communication systems is low spectral phase noise (narrow across the entire C-band. linewidth). Measured FM noise spectra for all 6-channels Figure 11 shows the measured output spectra for an integrated on a 1.2 Tb/s coherent transmitter PIC are shown in exemplary channel for the 1.2 Tb/s 6-channel transmitter PIC. Fig. 12. The data were extracted from offline processing of The spectra demonstrate a side-mode suppression ratio high speed oscilloscope measurements with the RF circuit capability of >45 dB across the extended C-band tuning range. under modulation [18]. The mid-band phase noise spectra Furthermore, the spectra demonstrate < 2 dB power non- shows that all channels integrated on the PIC have an average uniformity across the extended C-band without any active phase noise power spectral density (PSD) of less than JSTQE-INV-IPIP2018-06851-2017 11

6x104 Hz2/Hz corresponding to an inferred linewidth of < 200 KHz (ʌ™PSD level between 10 MHz and 100 MHz) [95]. Similar performance (inferred linewidth < 200 KHz) is exhibited across the extended C-band tuning range for all channels (data not shown). The resulting linewidth was also measured to be consistent with the demands of ultra-long haul links operating at 33 and 44 Gbaud at 16-QAM modulation, as described in section III. RF measurements are taken at 33 Gbaud using fully packaged transceiver modules. Both DC and RF signals were provided by a linecard with a commercial coherent DSP chip. The constellation diagrams show QPSK, 8-QAM and 16-QAM constellations at 33GBaud in Fig. 13 (a) in loopback mode. The

modulation format utilized sub-carrier modulation in order to reduce non-linear transmission penalties [96, 97]. The data in Fig. 13. (a) Outer subcarrier constellations for modulation QPSK, 8-QAM and Fig. 13 (a) and (b) show only the outermost subcarrier signal, 16-QAM modulation formats for a representative channel, and (b) Outer which is the subcarrier with the highest impairment due to subcarrier constellations for all 6-channels for PM 16-QAM operation. bandwidth roll-off effects of the transmitter/receiver. The signal quality (Q vs. OSNR) was also measured for 6 transceiver module channels running simultaneously. The 6-channel IV. SOC PHOTONIC IC MANUFACTURING AND RELIABILITY pre-FEC constellations were extracted from the receiver DSP A. Photonic IC Manufacturability engine and are shown in Fig. 13(b). The measured link OSNR margins (to maintain post-FEC error free performance) for the 1) Fabrication Yields 1.2 Tb/s transceiver modules were sufficient for being able to transmit over >8000 km (QPSK), 4200 km (8-QAM), and 1750 Essential to the success of the integrated circuit (IC) is that km (16-QAM), in a commercial DWDM 50GHz spaced the economic value derived from the integrated component optically amplified link with 20dB spans. Included in these must outweigh the cost of the integration itself. This precept reach distances are penalties for non-linear transmission plus has limited the commercial success of InP PICs over the first 2dB margin for additional penalties in real world deployment few decades since their inception as the lack of both commercial scenarios. drivers and InP PIC fabrication capability have been insufficient to drive their widespread success. Advances in silicon and III-V semiconductor fabrication technologies have enabled a highly capable fabrication platform for InP-based PIC manufacturing. The wafer fabrication yields that can be achieved in a state-of-the-art InP PIC fab (at Infinera Corporation) are now equivalent to that of Si CMOS circa mid 1990’s [98, 99]. This is shown in Fig. 14 which compares the line yield (normalized per 10 mask layers) for a Si CMOS fab circa 1990s and four generations of transmitter SOC InP-based Photonic ICs. The line yield (LY) is calculated as:

୛୓ ܮܻ ൌ (2), ୛୓ାୗେ

where WO is the number of wafers completed during the period and SC is the number of wafers scrapped during the same period. In order to compare disparate fabrication processes, the Fig. 12. Measured tunable laser phase noise spectra with operating current > line yield is normalized to yield per 10 mask levels by the 3x Ith on the integrated tunable lasers for all channels on a 6-channel 1.2 Tb/s transmitter PIC at 1547nm. relation:

భబ ሺ ሻ ܮܻଵ଴ ൌܮܻಾಽ (3),

where LY is the overall line yield, ML is the number of masking layers, and LY10 is the calculated line yield per ten layers.

JSTQE-INV-IPIP2018-06851-2017 12

larger chip [103]. As the SOC PICs are not constructed from a repeated unit cell across the entire chip, the methodology utilized herein using an overall yield and total chip area for determination of the killer random defect density assumes an effective average defect density arising from different failure modes (which each have their own defect density) for a given chip design. This effective average defect density is appropriate to measure learning rate as well as project how a given architecture will scale. The defect density numbers for InP-based PICs in maturity in Fig. 15 compare well with those in the Si industry circa early 1990’s, and have a rate of decrease (defect reduction learning) similar to what the Si industry achieved in 1975–1995. Of particular note, is that the 1.2 Tb/s transmitter PICs have an improved yield compared to previous generation 500 Gb/s PICs

Fig. 14. Wafer fabrication yield (normalized to ten mask levels) for multiple as they are largely an extension of the 500 Gb/s platform (and generations of transmitter Photonic IC wafers compared to a benchmark Si hence, leverage the same volume learning curve). InP-based CMOS fab (1989–1994) [98]. photonic IC manufacturing has matured from a field of discrete devices to one that is capable of realizing economically viable Furthermore, for direct comparison purposes, the line yield sophisticated SOC architectures with integration levels excludes the crystal growth steps (the yields of the PIC crystal approaching 500 optical functions. Such capability enables the growth processes are comparable to the cumulative wafer development of next-generation devices with even higher fabrication yields). Like those for Si electronic ICs, the data functionality and integration levels. show that line yields for four generations of InP-based PIC products are in the high 90%’s (per ten mask levels). In order to achieve the photonic IC manufacturing capability, it was necessary to adopt a methodology for InP PICs similar to electronic ICs, where designers are given a fixed (albeit limited) tool set to design within, resulting in a manufacturable (cost- effective) manufacturing process. Thus, both highly capable fabrication capability and device performance have been simultaneously achieved.

2) Killer Random Defects

State-of-the-art PIC fabrication technology has been essential in enabling sufficiently low killer defect densities to realize fully integrated system-on-chip photonic ICs. Fig. 15 shows killer random defect densities versus time for Si CMOS ICs [100] in comparison with those achieved for four Fig. 15. Trends for ‘‘killer’’ random defect density versus time for Si ICs and for four generations of InP-based SOC transmitter PICs (100 Gb/s, 500 Gb/s generations of InP-based SOC transmitter PICs. Yield and 1.2 Tb/s). modeling theory uses the rate at which yield varies with varying die size to determine both systematic and random yield contributions, and allows the killer random defect density to be 3) Performance Yields quantified [100-102]. Assuming a symmetrical triangular distribution for the defect density probability, the Murphy yield The successful manufacturing of SOC DWDM PICs requires model for random defects is obtained: two distinct, yet coupled, problems to be solved. First is the 2 ability to realize sufficient performance and yield in each §1 e AD0 · Y ¨ ¸ DWDM channel to close all requisite spans in the network. r ¨ ¸ Second is the ability to deliver this performance across multiple © AD0 ¹ (4), channels without incurring a substantial yield penalty. The result of these requirements is a systematic yield capability that arises from the design capability of the PIC design and where Y is the yield due to random defects, A is the die size r manufacturing process. Typically, over one hundred area, and D is the average defect density per unit area. Yield o parametric performance parameters are tested on a given PIC; calculations were performed on DC test data for four however, only a small number of parameters have yields that generations of SOC DWDM transmitter PICs (as outlined in are not in the high 90th percentile for yielding all channels on Section III.B). Fits to the Murphy model result in the killer the PIC. Previously, we have shown excellent yields for key random defect densities shown in Fig. 15. Larger chip areas challenging specifications (threshold current, wavelength were generated by analyzing chip multiples as an effectively targeting, output power, and Q) for 100 Gb/s OOK transmitter JSTQE-INV-IPIP2018-06851-2017 13

PICs [75]. The DFB laser yield capability also translates for the billion (2.1 B) field hours with a failure rate of <0.5 failures in 500 Gb/s coherent transmitter and receiver PICs as the tunable time (FIT) (data not shown) [60% confidence level (CL)]. This DFB lasers integrated in these devices are evolved from the failure rate is comparable to discrete pump lasers [105, 106]. those of the 100 Gb/s PICs. However, the widely tunable laser However, we highlight that these failure statistics are for >60 utilized in the 1.2 Tb/s transmitter and receiver PICs is a optical functions integrated on a pair of photonic ICs. fundamentally different laser design. Despite these design The sense and control elements integrated into the PIC and changes, the widely tunable laser has been demonstrated to module offer the unique ability to access and monitor the have very high yields in manufacturing. Figure 16 presents variation of key performance parameters during operation in yield statistics for threshold current and continuous tuning the field. Such data is periodically collected from deployed range for the worst channel tested on each PIC. The data was devices and allows the monitoring of the reliability of devices gathered from all fourth generation transmitter production PICs as well as confirmation / refinement of reliability models. The produced from 2016 to present (March, 2017). The figure plots long term operating stability for one of the earliest deployed the cumulative probability of the measurement, and first generation 100 Gb/s 10-channel transmitter PICs is shown demonstrates better than 99% yield (on a per PIC basis) to the in Fig. 17 for each of the 10 channels on the PIC. The threshold current specification (left) and the continuous tuning transmitter module has operated for over 100k field hours range (right). Furthermore, yields to linewidth on the worst (equivalent to >11 years). The change in optical output power channel on the transmitter and receiver PICs as measured over from each channel is calculated relative to the initial power the entire extended C-Band to meet the reach capability from data recorded at deployment and shown overlaid in the described in III.B.3 are >99% during this time period (data not plot (green). All 10 channels exhibit stable performance that is shown). These manufacturing results demonstrate the highly within +/-0.05dB. Similar data from the integrated sense capable design of the widely tunable lasers integrated into the elements for the applied per-channel VOA attenuation (data not coherent photonic IC platform. shown) and DFB power change (green) are within this variation. Thus, the resulting output power stability results from the stability of each element within the PIC. The frequency stability (prior to correction from controls) from the same PIC shown in Fig 17 is within a 5 GHz range and is <10% of the range which can be compensated by the tunable DFB and corresponding control circuits. The data presented herein help establish that like electrical ICs, reliability of the photonic IC is far superior to that that of the equivalent implementation using discrete components.

Fig. 16. Cumulative probability distribution plots for the worst channel performance for 1.2 Tb/s transmitter photonic ICs manufactured from 2016 to present. Data for threshold current (normalized to specification, left) and continuous tuning range (right) show very high performance yields (>99% for each specification).

B. SOC DWDM Reliability

Each of the four generations of commercial SOC DWDM PICs and modules have undergone extensive reliability testing and are qualified to Telcordia GR-468 standards. An important value of SOC DWDM PICs is the elimination of optical couplings from a DWDM optical system, resulting in a substantial cost savings and reliability improvement (as the opto-mechanical fiber coupling joint is typically one of the least reliable elements of a photonic component). First and second Fig. 17. Plots of reliability data from 100,000 hours (>11 years) for a field generation 100 Gb/s transmitter and receiver PICs enable a deployed 10-channel 100 Gb/s first generation PIC transmitter module. The PIC power change is <0.05dB; the uncorrected frequency change is < 5GHz ~20-30x reduction in the number fiber couplings, while third which is less than 10% of the range that can be compensated by the tunable (500 Gb/s) and fourth (1.2 Tb/s) generation coherent transmitter DFB and corresponding control circuits. and receiver PICs enable >100x reduction in fiber couplings. Thus, the reliability of systems employing these SOC modules is greatly improved by virtue of the elimination of a substantial number of fiber couplings in the system. First and second generation 100 Gb/s OOK SOC DWDM PIC pairs (transmitter and receiver) have accumulated over 2.1 JSTQE-INV-IPIP2018-06851-2017 14

V. FUTURE SOC PHOTONIC IC SCALING diagrams for both polarizations of the widely tunable 14- channel transmitter PIC which integrates >570 optical functions are shown in Fig. 19. The data was recovered using a A. Photonic IC Chip Scaling corresponding multi-channel extended C-band per channel tunable receiver PIC with 44 Gbaud capable high speed Photonic integration enables substantial improvements in photodetectors. All channels on the PIC achieved performance cost, size, power, and reliability of a DWDM optical system. above the required FEC limit, demonstrating the scalability of Furthermore, photonic integration, by virtue of being a the widely tunable PIC to higher channel counts (integrated semiconductor manufacturing technology that leverages the optical functions) and baud rates. vast investment in electronic ICs, is a scalable technology The widely tunable coherent SOC DWDM multi-channel enabling exponential gains by building on cumulative PIC platform is also capable of scaling to significantly higher investment and learning. As discussed in Section IV.A, state- baud and QAM rates. This capability is demonstrated in of-the-art InP-based fabrication processes and device designs Fig. 20 for 2-channel transmitter and receiver PICs employing have driven down ‘killer’ defects to densities comparable with architectures that are an extension of those shown in Fig. 7 and that of Si CMOS circa early 1990s. This reduction in defect Fig. 8. Figure 20 (a)-(c) shows transmission characteristics density has increasingly enabled integration of commercial over 80 km of SMF for a widely tunable transmitter PIC to a PICs with a larger number of integrated functions as described reference receiver for (a) 66 Gbaud, 64-QAM, (b) 88 Gbaud, in Section III.B. Furthermore, in the research laboratory, we 16-QAM, and (c) 99 Gbaud, QPSK. The electrical signal at have demonstrated a ~4x higher integration level (in the number these higher baud rates to drive the transmitter PIC was of wavelengths and functions monolithically integrated on a generated with a digital-to-analog converter, using root raised- single InP-based transmitter PIC): a 2.25 Tb/s SOC DWDM cosine (RRC) pulse shaping. Linear driver amplifiers were transmitter [78]. This photonic IC integrates >1700 optical used to amplify the signal before feeding it to the Tx chip via a functions on 40 channels (wavelengths) using an extension of custom microwave probe. The signal is received into a the DFB-based coherent transmitter architecture described in reference (discrete component) receiver and is processed offline Section III.B.2. Figure 18 shows the optical spectra for this to recover the signal and evaluate performance. For the 88 2.25 Tb/s transmitter PIC. The integrated DFB lasers are Gbaud 16-QAM modulation (Fig. 20 (b)), the recovered signal tuned to within ± 2 GHz of a 25 GHz grid to form a Q 2 -factor is measured to be >8dB. Fig. 20(d) also shows the 2.25 Tb/s superchannel covering 1 THz of spectral bandwidth. transmission over 80 km of SMF from a 2-channel widely The precision in wavelength targeting demonstrates the tight tunable transmitter PIC to a 2-channel widely tunable receiver manufacturing capability of the InP-based PIC platform to emit PIC wirebonded to a 2-channel SiGe BiCMOS TIA. The signal over a narrow range of initial wavelengths across all 40 performance, (Q2-factor measured from BER) was 6.6dB. We channels on a 25 GHz grid. believe much of the degradation in performance seen in Fig. 20 is due to the limitations of the test setup and high speed probes that were utilized in the measurements. Despite these impairments, the data demonstrate multi-channel PIC-PIC

Fig. 18. Optical spectrum for a 40-channel 2.25 Tb/s coherent SOC DWDM transmitter PIC. The 2.25 Tb/s superchannel spectra shows 40 wavelengths on a 25 GHz grid (resolution bandwidth = 0.05nm) while occupying 1 THz of spectral bandwidth.

The widely tunable photonic IC platform has also been shown to be capable of scaling significantly beyond the current commercial products. In the research laboratory, 14-channel widely tunable SOC DWDM transmitter and receiver photonic ICs have been demonstrated employing the architectures Fig. 19. Back-to-back 44 Gbaud constellations for PM 16-QAM modulation for all 14 channels on a SOC DWDM coherent transmitter PIC (measured using described in Section III.B.3 (Figs. 7 and 8) [92, 93]. The a companion widely tunable multi-channel receiver PIC). The figure shows 14-channel SOC DWDM widely tunable transmitter and only the outermost sub-carrier on each polarization for a dual-pol 16-QAM receiver PICs operate at 44 Gbaud PM 16-QAM modulation, signal. The total capacity of this photonic IC is > 4.9 Tb/s. for a total capacity of 4.9 Tb/s. The recovered constellation

JSTQE-INV-IPIP2018-06851-2017 15 transmission capability over an 80km unamplified link at >700 compatible with an environment with significant temperature Gb/s per-channel (payload plus overhead). gradients (~50-100°C) between the photonic IC and electronic ICs within the package. Furthermore, these designs must be compatible with optomechanical stability for any optical joints within the package that is consistent with 20 year reliability.

Fig. 20. Constellation diagrams for transmission over 80 km of SMF demonstrating scaling of the baud rate and QAM format of multi-channel widely tunable transmitter and receiver PICs. (a) Recovered constellations at (a) 66 Gbaud x 64-QAM, (b) 88 Gbaud x 16-QAM, and (c) 99 Gbaud, QPSK from a Tx PIC to a Rx reference receiver. (d) Constellation diagrams at 88 GBaud, 16-QAM for transmission from a Tx PIC to a Rx PIC wire-bonded to a TIA receiver (over 80km of SMF).

Future commercial generations of SOC DWDM PICs will utilize a combination of higher order modulation formats (e.g. 64-QAM), higher baud rate (>66 Gbaud), and more transmission channels to meet the exponential bandwidth Fig. 21. Scaling of four generations of multi-channel DWDM SOC photonic growth in the network. Technical feasibility proofs have IC modules. From their first commercial deployment in 2004 to 2016 (12 years), the data capacity of these modules has scaled 24x in roughly the same alreadydemonstrated that the existing photonic IC platforms are footprint (images shown to scale). well positioned to meet these demands.

B. Photonic IC Module Scaling

The scaling of InP-based photonic ICs must be complemented by the associated scaling of the module ecosystem (packaging, analog electronics, controls). Figure 21 shows the scaling of SOC DWDM photonic IC modules from their commercial inception in 2004 to 2016 (images shown are to relative scale). During this time period, the total bandwidth Fig. 22. Image of the interconnects within a 500 Gb/s coherent transmitter IC capacity of a module pair increased 24x (from 100 Gb/s to 2.4 module. A 10-channel PIC attached and wirebonded to a ceramic carrier and Tb/s) in a footprint that was nominally unchanged. Essential integrated with a control ASIC and package with five layers of nested wire- to this scaling was the increase in baud rate from 14.1 Gbaud to bonds, for DC bias control. RF interconnects are made via wirebonding to a high speed SiGe MZM driver ASIC which then interconnects to the package 33 Gbaud as well as the development of photonic IC and hybrid wall via a fanout. packaging architectures that supported coherent modulation. The success of the scaling shown in Fig. 21 is critically The successful scaling of module pair bandwidth by 24x over dependent on the co-design and optimization of the key the last 12 years required a ~8-10x scaling in number of technologies critical to the SOC DWDM optical module electrical input / output (I/O), number of wirebonds, and total (optical interconnect, high-speed electrical interconnect, DC wire-bond length in a module pair from first generation (100 control / bias interconnect, thermal management, analog driver Gb/s modules) in 2004 to current generation modules (1.2 Tb/s / amplifier ICs, control ICs). The complexity of the electrical transceivers) in 2016. A pair of 1.2 Tb/s transceivers (2.4 Tb/s interconnect inside a 500 Gb/s coherent SOC DWDM total bandwidth) thus utilizes 2000 electrical I/O, ~6000 transmitter module is shown in Fig. 22. The DC control bias wirebonds and >7.5m of Au wire. This scaling has been interconnect extends to the right of the PIC to the control ASIC essential in enabling the operation of photonic ICs whose and package wall and utilizes five layers of nested wirebonds integration level has scaled by >11x in the same time period. for an effective wire-bonding pitch of <30μm. The high-speed Although it is unlikely that future generations of photonic ICs RF interconnect extends to the left of the PIC to the driver will approach the integration density of electronic ICs, future ASIC, to a fanout, and then the package wall. More than 5m of generations of PICs will need to continue to scale their optical Au wire is utilized to wirebond interconnect the elements within integration density and baud rate. These trends will likely drive the module. This interconnect must be designed to be at photonic IC packaging to utilize advanced packaging sufficient density to minimize any size (cost) penalty on the technologies from the electrical IC industry (including 2.5 and InP-based photonic IC while maintaining the requisite number 3D integration technologies). of interconnects and RF signal integrity. This design must be JSTQE-INV-IPIP2018-06851-2017 16

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Fred Kish (M’93, SM’01, F’11) received his B.S., M.S., and contributed a chapter to a book on quantum well lasers. He was Ph.D. degrees in electrical engineering from the University of with HP/Agilent Laboratories, Palo Alto, CA, from 1995-2005, Illinois at Urbana-Champaign in 1988, 1989, and 1992, working on the design and fabrication of various optoelectronic respectively. In 2001, he joined Infinera as Vice President of devices. In 2006, he joined Infinera, Sunnyvale, CA, working photonic integrated circuit (PIC) development and on current and next-generation photonic integrated circuits. manufacturing and later as Sr. Vice-President of the Integrated Optical Components Group. Previously, he held the position of Mehrdad Ziari (M’95) received his Bachelor of Science with R&D and Manufacturing Department Manager for Agilent Suma Cum Laude honors, Master of Science and Ph.D. degrees Technologies wherein he managed the III-V optoelectronic in Electrical Engineering in 1986, 1987 and 1992 respectively component organization for Agilent's fiber-optics business. Dr. from the University of Southern California in Los Angeles, Kish formerly held several positions in senior management at CA. Upon completing his Ph.D. studies in nonlinear optics, he Agilent/Hewlett-Packard wherein he was responsible for the joined the USC Center for Photonic Technology and conducted development of visible light emitter technology and was one of post-doctoral research in nonlinear optics and organic polymer the core inventors of transparent-substrate AlInGaP light- waveguide devices. He joined SDL Inc. in 1995 where he emitting diodes. He has coauthored 150 peer-reviewed journal worked on various laser diode and optical component and conference publications and over 100 patents in the area of technologies. He managed InP R&D activities at SDL and led III-V optoelectronic devices. Dr. Kish is a Fellow of the OSA the development of Raman pump laser diode products at and IEEE and a member of the National Academy of SDL. He joined Infinera in 2002 and is currently Sr. Director Engineering. His awards include the IEEE David Sarnoff of Product Development and responsible for product Award, the IEEE LEOS Engineering Achievement Award, the development and engineering of photonic integrated circuits OSA Adolph Lomb Award, and the International Symposium (PIC) and modules. He has published over 75 papers, two book on Compound Semiconductors Young Scientist Award. chapters and is named on over 30 patents.

Vikrant Lal received his B.S. degree in electrical engineering Tim Butrie received his Bachelor of Science degree in from the Indian Institute of Technology Delhi, India, Masters mechanical engineering from Lehigh University in 1981, and in electrical engineering from the Electrical and Computer M.S. degree in mechanical engineering from Lehigh University Engineering Department, University of Maryland, College in 1983. His previous employment includes: Member of Park, and Ph.D. in electrical and computer engineering from the Technical Staff and Technical Manager at AT&T Bell University of California at Santa Barbara, Santa Barbara, in Laboratories/Lucent Technologies where he was responsible 1999, 2001, and 2006, respectively. As a graduate student at for product design & process development for optoelectronic UCSB he designed and demonstrated monolithically integrated components and sub-systems. He also served as Director at tunable laser and SOA-MZI devices, which were among the Agility Communications where he had responsibility for most complex photonic integrated circuits at the time. He is product development for tunable laser modules. Currently, he current the Director of Advanced Development in the Optical is Senior Director of Hardware Development at Infinera Integrated Circuit Group at Infinera where he has been working Corporation in Allentown, PA. on the development of key components and processes for Infinera’s commercially deployed 500Gb/s Photonic Integrated Mike Reffle earned a BS in electrical engineering from Drexel Circuits. He has authored/co-authored over 50 publications in University in 1989, and an MS in engineering management journals and conferences, and has been the co-author on 3 US from the University of Dayton in 1996. His previous patents. employment includes: Member of Technical Staff, Technical Manager and Senior Manager at Lucent Technologies where he Peter Evans was born in St. Louis, MO. He received the B.S., had responsibility over all manufacturing operations at the M.S. and Ph.D. degrees in electrical engineering from the Manufacturing Realization Center (MRC) in Breinigsville, PA. University of Illinois, Urbana-Champaign in 1994, 1996, and He also served as Vice President and General Manager at 1998, respectively. From 1998-1999, he developed fabrication Agility Communications where he had responsibility for processes for AlGaAs VCSELs at Hewlett-Packard. From package assembly and test process development, manufacturing 1999-2002, he developed InP VCSELs and SOAs, and grew and procurement. Currently he is the VP of Product epitaxy at GenOA. From 2002-present, he held a variety of Development and Operations in the Optical Integrated positions at Infinera to help develop Photonic Integrated Component Group where he oversees PIC-based Product Circuits, and is presently Director of Advanced PIC Development; and PIC, Module and Line Module Development at Infinera focusing on receiver PICs. He has co- manufacturing operations. Mr. Reffle is a member of IEEE and authored numerous journal articles, a book chapter, and over 20 IMAPs. issued U.S. patents. Huan-Shang Tsai received the B.S. degree in mechanical Scott W. Corzine, received his Ph.D. degree from the engineering from National Taiwan University, in 1990, and the Department of Electrical and Computer Engineering, Ph.D. degree in electrical and computer engineering from the University of California at Santa Barbara in 1993. His graduate University of California, Santa Barbara, in 1995. He joined the work involved the theoretical and experimental investigation of High Speed Electronics Research Department of Lucent Bell vertical-cavity surface-emitting lasers. He has co-authored a Laboratories in 1996 where he was working on circuits for graduate-level textbook on semiconductor lasers and has also wireless and fiber optic applications. In 2001, he joined JSTQE-INV-IPIP2018-06851-2017 20

Infinera as a member of technical staff. His current interest is electrical engineering from the University of California, Los in high-speed circuits for optical communication. Angeles in 1999 and 2004 respectively. His graduate work was on optical and RF designs for high speed, high power and high Andrew Dentai received his Bachelor of Science from the responsivity distributed photodetectors. In 2002, he joined University of Veszprem, Hungary in 1966. After joining Bell Infinera, where he has since been working on several aspects of Labs in Murray Hill NJ in 1968, he attended Rutgers University photonic integrated circuit design for transmitter and receiver and received his MS in 1972 and PhD in 1974, both in Ceramic applications. Science. In 1974 he re-joined Bell Labs, where he worked on epitaxial crystal growth, first employing LPE, later switching to Randal Salvatore (S’89–M’96–SM’10) was born in Dearborn, MOPVPE. He worked on material development for long Michigan, in 1967. He received the B.S.E. (summa cum laude) wavelength LEDs, SAGM APDs, LED pumped Nd: YAG fiber from the University of Michigan, Ann Arbor, in 1990 and the lasers, tunable Y-branch lasers, long wavelength photodiodes, M.S. and Ph.D. degrees in electrical engineering from high speed photodiodes, InP based SHBT and DHBT California Institute of Technology, Pasadena, in 1991 and 1996, transistors, and OEIC receivers based on HBTs among other respectively, all in electrical engineering. His Ph.D. research devices. He retired from Lucent, Bell Labs in 2001 and joined focused on femtosecond and high-repetition rate sources, and the Technical Staff of Infinera where he is the Senior Principal resulted in the demonstration of the first adjustable chirp, Engineer of Epi operations, working on developing materials passively mode-locked semiconductor laser. for Photonic Integrated Circuits. From 1996 to 1997, he worked as a Visiting Researcher at Dr. Dentai has over 300 publications and talks, and 30 the University of California at Santa Barbara. From 1997 to patents spanning 31 years at Bell Labs and 15 years at Infinera. 2002, he worked at Lasertron, Inc., Bedford, MA, on high- He was named a Distinguished Member of Technical Staff of power pump lasers, DFB lasers and optical modulators. Since Bell Labs in 1987, was elected a Fellow of the IEEE in 1993 2002, he has been with Infinera, Inc., Sunnyvale, CA. He is and became a Fellow of the Optical Society of America in 2013. Principal Engineer working on the development and reliability of PICs. He has authored over 60 papers and conference Jacco Pleumeekers received the M.S. and Ph.D. degrees in presentations and is named on seven patents. electrical engineering from Delft University of Technology, The Netherlands, in 1992 and 1997, respectively. From 1996 Parmijit Samra was born in Selma, California, in 1975. He to 1999, he held a Post-Doctoral research position at the EPFL received the B.S. degree in electrical engineering from the in Lausanne, Switzerland. From 1999 to 2001, he was a University of California, Davis, in 1999 and the M.S. degree in Member of Technical Staff at Lucent Technologies - Bell Labs electrical engineering from University of Massachusetts, in Holmdel, NJ, where he worked on a variety of projects in the Amherst, in 2005. From 2000 to 2005, he was with Agilent field of all-optical signal processing with integrated Technologies in the Test and Measurement Business Unit in optoelectronic devices. In 2001, he joined Infinera Corporation Santa Rosa, California. From 2005 to 2007, he was with the in Sunnyvale, CA to develop advanced photonic integrated Advanced Technology Center of Lockheed Martin Corporation circuits, where he is currently Director of PIC Integration in Sunnyvale, California. Since 2007 he has been with Infinera Engineering, responsible for photonic device integration, Corporation in the Optical Integrated Components group. manufacturing yields, and production quality. Dr. Pleumeekers has co-authored over 70 papers and Scott Demars received his B.S. in physics from the University conference contributions. of Minnesota, Minneapolis, in 1988 and Ph.D. in electophysics from the University of Southern California, Los Angeles, in Mark Missey received his B.S. degree in Physics from 1995. From 1995 to 1998, he was a research and development St. Louis University, and M.S. and Ph.D. degrees in Electro scientist at SDL, Inc., San Jose, CA working on semiconductor Optics from the University of Dayton. From 2000-2001 he lasers for industrial and telecommunications applications. researched microelectromechanical systems (MEMS) and From 1998 to 2006, he was a section manager at SDL, Inc. photonic lightwave circuite (PLC) arrayed waveguide gratings leading projects on photonic device development and reliability (AWGs) at SDL, Inc.. From 2001 to present he has worked at engineering. From 2006 to 2013, he was a product engineering Infinera Corp. in various roles developing and commercially manager at Infinera, Corp., Sunnyvale, CA responsible for deploying Photonic Integrated Circuits. He is currently photonic integrated circuit (PIC)-Module products. From 2013 Director of PIC Hardware Development at Infinera. to 2017, he has been director of product engineering for PIC- module products and served as interim reliability manager. He Matt Fisher received his Ph.D. degree in Electrical has over 25 publications in journals and conferences and two Engineering from the University of Illinois at Urbana- patents. Champaign in 2006. From 2006 to present he has worked at Dr. DeMars was a recipient of the 3-M Richard Drew Infinera in various roles developing and commercially Creativity Award and Rockwell Fellowship. deploying Photonic Integrated Circuits. He is currently Principal Engineer of Hardware Development at Infinera. Naksup Kim was born in S. Korea in 1969. He received the B.S. in mechanical engineering from the Inha University, S. Sanjeev Murthy received his B.Tech in electronics and Korea in 1994. From 1994 to 1999, he worked at Samsung and communication engineering from the Indian Institute of Hynix Semiconductors (formerly LG Semicon) as a Process Technology, Madras in 1994 and his M.S., and Ph.D degrees in Engineer. He joined Nortel Networks Optical Components in JSTQE-INV-IPIP2018-06851-2017 21

2000 and was a senior member of process engineering team. He Institute of Photonics and Quantum Electronics at Karlsruhe became a Research Council Officer at the National Research Institute of Technology. Since 2015 he has been a Sr. Council Canada in 2004 and spent seven years for the Development Engineer with Infinera Corp., Sunnyvale, CA, successful establishment of Canadian Photonics Fabrication USA. His research interests include optical integration and Centre. He is currently with Infinera Corp., Sunnyvale, high-speed electro-optic devices. California and holds a Principal Development Engineer position. He is co-author of more than 15 articles and his Ryan Going (S’10–M'15) received the B.S. degrees in expertise is in semiconductor process development and electrical engineering and in applied mathematics from North integration. Carolina State University, Raleigh, NC, USA, in 2009. He Mr. Kim obtained Professional Engineer designation in completed the M.Phil. degree in micro and nanotechnology Ontario, Canada in 2003 and was one of recipients of the enterprise at the University of Cambridge, Cambridge, U.K., in Outstanding Achievement Award from National Research 2010. He received the Ph.D. degree in electrical engineering Council Canada in 2011. from the University of California, Berkeley, CA, USA in 2015. In 2014, he was an Intern in the Silicon Photonics Solutions Adam James received his BS in Microelectronic engineering Group at Intel Corporation. Since 2015, he has been a Senior from Rochester Institute of Technology (2005), and M.S. and Hardware Development Engineer in the Optical Integrated Ph.D. in Electrical Engineering from the University of Illinois Circuits Group at Infinera Corporation, Sunnyvale, CA, USA. at Urbana Champaign (2010) and has worked at Infinera from His research interests include photonic integrated circuits, 2010 onward with PICs and photonic integration. silicon photonics, germanium optoelectronic devices, nanostructures, optical tweezers, and metal optics. Amir Hosseini (S’05–M’13), received his B.Sc. degree in Dr. Going was a Gates-Cambridge Scholar, and was awarded Electrical Engineering in 2005 from Sharif University of the NDSEG Fellowship, the NSF Graduate Fellowship, and the Technology, Tehran, Iran; his M.Sc. degree in Electrical and Sevin Rosen Funds Award for Innovation. Computer Engineering in 2007 from Rice University, Houston, Texas; and his Ph.D. degree in Electrical and Computer Mingzhi Lu, received his B.S. degree in electrical engineering Engineering in 2011 from the University of Texas at Austin, from Southeast University, Nanjing, China in 2008, and Texas. received his M.S. and Ph.D. in Electrical and Computer During his graduate studies, Amir conducted research on Engineering from the University of California, Santa Barbara, modeling, design, fabrication, and characterization of optical California in 2010 and 2013. After obtaining his Ph.D., he phased array technology; true-time delay lines; and high worked at UC Santa Barbara as a postdoctoral researcher performance optical modulators. He was the recipient of the between 2013 and 2014. He is currently working at Infinera Ben Streetman Award in 2012, SPIE Photonic West Best Paper Corp. as a staff PIC development engineer. His Ph.D. and Award in 2014 and 2015, and has authored or co-authored over postdoctoral research is mainly focused on III-V photonic 100 peer-reviewed technical papers. He served as the principal integration technology, and integrated coherent optical systems, investigator for an AFRL sponsored project on polymer optical such as integrated optical phase-locked loops, coherent LIDAR, modulators in 2012, and for a DARPA-sponsored project in optical synthesizer and phase-sensitive amplifiers. Before that 2013. Amir currently serves as a member of the technical staff he also worked on underwater acoustic signal processing, at Infinera Inc., as a Photonic Integrated Chip (PIC) engineer microwave and THz frequency selective surface, and since 2014. metamaterials. He is currently focusing on the next-generation large-scale photonic integrated circuits for future Pavel Studenkov received the M.S. degree in physics from communication applications. He authored and co-authored St. Petersburg State Technical University, St. Petersburg, more than 40 journal and conference papers. Russia in 1993, and the Ph.D. degree in electrical engineering from Princeton University, Princeton, New Jersey, USA in Jiaming Zhang received the Ph.D degree in Applied Physics 2001. from the National Laboratory for Infrared Physics, Chinese From 1993 to 1995, he worked at Ioffe institute in St. Academy of Sciences, Shanghai, China, in 1993. In 2008, he Petersburg, Russia on high power and single-mode joined Infinera Corporation, Allentown, PA, working on next- semiconductor lasers in the group led by Dmitri Garbuzov. generation product development. Previously, he was with Intel From 2001 to 2006, he was developing twin-waveguide Corporation and T-Networks Inc. where he was engaged in photonic integration technology at ASIP, Inc. in Somerset, New developments of high-speed optical transmitters and receivers. Jersey. Since 2006 he has been a Member of Technical Staff at Infinera in Sunnyvale, CA, USA. His research interests include Jie Tang received B.S. degree in 1991 from Shanghai Jiao design and technology of III-V photonic integrated circuits, Tong University and M.S. degree in 1994 from the University modulators, waveguides and polarization converters. of Pennsylvania and Ph.D. degree from the University of Pennsylvania in 1997, all in Mechanical Engineering. In 1997, Matthias Lauermann received the Diploma degree and the he joined Aeroquip/Eaton Corporation as a Senior Research Dr.-Ing. degree from the Department of Electrical Engineering Engineer. He worked on solder jetting technology for BGA and Information Technology, Karlsruhe Institute of packages. In 2000, he joined Lucent Technologies as a member Technology (KIT), Germany in 2011 and 2017, respectively. of technical staff, working on opto-electrical package design. From 2012 to 2015 he was a Research Assistant with the He later joined Optium Corp in Horsham, PA. At Optium, he JSTQE-INV-IPIP2018-06851-2017 22 designed packages for optical transponders/transceivers and Andrew Karaicolas received the S.B., S.M., and Ph.D. degrees analog/cable TV transmitters. In 2008, he joined Infinera in in electrical engineering from the Massachusetts Institute of Allentown, PA. Currently, he is a principal hardware design Technology (M.I.T.), Cambridge, in 1987, 1990, and 1994, engineer working on intergraded high speed optical module respectively. He is presently the Senior Director of High-Speed packaging. IC R&D in the Optical Integrated Components Group at Infinera Corporation, Sunnyvale, CA. Earlier, he held key Jeff Bostak received the B.S. degree in electrical engineering leadership and technical positions in the areas of data converter, from the University of Virginia, Charlottesville, in 1985, and wireless & wireline IC R&D at Maxim Integrated, Sunnyvale, the M.S. and Ph.D. degrees in electrical engineering from CA, Level One Communications (acquired by Intel), San Stanford University, Stanford, CA, in 1987 and 1994, Francisco, CA, and AT&T Bell Laboratories, Holmdel, NJ. respectively. From 1985 to 1990, he was a Member of Dr. Karanicolas is a member of the Institute of Electrical and Technical Staff with AT&T Bell Laboratories, Holmdel, NJ, Electronics Engineers and has served as an Associate Editor for where he was a circuit designer for 900-MHz wireless the Journal of Solid State Circuits. telephones. From 1994 to 2001, he was Design Center Manager with Vitesse Semiconductor Corporation, Santa Clara, CA, Babak Behnia received his M.S. and Ph.D. from University of where he designed phase-locked loops and serdes integrated Illinois at Urbana-Champaign in 2000. Prior to joining Infinera circuits for high-speed optical communication. Since 2001, he at 2007, he was involved in high speed IC design at Agilent has been with Infinera Corporation, Sunnyvale, CA, as a Technologies, IBM and a startup where he gained experience in Manager of IC Development in the area of high-speed optical design of Samplers, Pulsers, SerDes, and circuits needed for test communication. Dr. Bostak was a recipient of AT&T Bell equipment. At Infinera his focus is to design circuits to support Laboratories, United States Joint Services Electronics Program, optical components. Outside of work he enjoys exploring nature and National Defense Science and Engineering Graduate with his children and wife. fellowships while at Stanford University. He is a member of the IEEE. Darrell Engel received a Bachelor of Science Degree in Physics from Muhlenberg College, Allentown Pennsylvania, Thomas Vallaitis received the Dipl.-Phys. degree in physics in graduating Cum Laude in May of 1999. From 1999 to 2000, 2005 from Technische Universität München (TUM), Germany, Darrell was a Member of Technical Staff at Lucent and in 2010 the Dr.-Ing. (Ph.D.) degree in Electrical Technologies, supporting failure mode analysis for high- Engineering from Karlsruhe Institute of Technology (KIT), volume DWDM semiconductor laser manufacturing. In 2000, Germany. In 2010 he joined Infinera Corp, Sunnyvale, USA. Darrell moved to Agility Communications in Allentown, PA, His current research interests include photonic device physics supporting the start-up company by developing a high-volume and characterization techniques. He has authored or coauthered manufacturing line for packaging of SGDBR lasers for DWDM over 70 papers and articles on quantum dot semiconductor applications. He stayed with Agility through its sale to JDSU optical amplifiers, nonlinear effects in silicon waveguides, and in December of 2005. In 2006, Darrell joined Infinera in high-speed integrated components for optical communications. Allentown, PA, where he is Senior Manager of Hardware Development leading the process development team to support Matthias Kuntz was born in Berlin, Germany, in 1975. He PIC-Module packaging manufacturing and development. received the M.S. degree in physics in 2000, and the Ph.D. degree in solid-state physics in 2005, from Technical University Omer Khayam (M’09) received the B.S. in Engineering Berlin. From 2006 to 2009, he was a Research Assistant with Sciences from Ghulam Ishaq Khan Institute of Engineering the Institute of Solid State Physics, TU Berlin, and with the Sciences and Technology, Topi, Pakistan, in 2003, and the M.S. Department of Electrical Engineering and Computer Science at in optoelectronics from École Polytechnique, Palaiseau, UC Berkeley. His research topics included high-speed France, in 2005. He received the Ph.D. degree from Laboratoire performance of InGaAs quantum dot active devices, as well as Charles Fabry, Institut d'Optique, Palaiseau, France. He joined fabrication and characterization of plasmonic nanostructures. Infinera Corp, Sunnyvale in 2010 where he has since been He has authored or co-authored over 60 publications, and holds involved in the development of 100G and beyond coherent 4 patents. In 2009, he joined Infinera Corp. in Sunnyvale, CA, Photonic Integrated Circuits (PIC) and addressing the reliability and is currently senior manager with the photonic integrated challenges of the next-generation high speed PIC based optical circuit test department. transceivers. Dr. Khayam was awarded the IBM International Ph.D. Fellowship Award in 2008 for his work on photonic Don Pavinski received his B.S in Mechanical Engineering crystal based integrated optical devices for telecom application. from Wilkes University, Wilkes-Barre, PA in 1993 and the Master of Science in Mechanical Engineering from Lehigh Nikhil Modi received the B.S. in computer engineering from University, Bethlehem, PA in 1996. Since 2002 he has been Louisiana State University, Baton Rouge, in 2002, M.E. in with Infinera in the Optical Integrated Components Group and electronic materials and processing from Southern University, is currently a Senior Manager of Product Development Baton Rouge, in 2006, and the Ph.D. degree in electrical responsible for optoelectronic module development and engineering from the New Jersey Institute of Technology, transfer to manufacturing. Newark, NJ in 2012. He served as a Research Associate with Mr. Pavinski is the co-holder of 6 patents and co-authored 19 Kislace, LLC (2005-2007), with Farrow Lab (2012-2013), and journal and conference papers. as a Post-doctoral research associate at the College of JSTQE-INV-IPIP2018-06851-2017 23 nanoscience and technology, Albany, NY (2013-2014). He has Mitchell Award from the Royal Academy of Engineering in authored over 30 publications and presentations. Since 2014, he 2015. has been with Infinera in the Optical Integrated Components Group. John Osenbach, has spent the last 3 years at Infinera in the advanced optical module development department, with the Mohammad Reza Chitgarha, (S’09) received the B.Sc. prior 32 years spent in AT&T Bell labs and its various degree in electrical engineering from Sharif University of semiconductor spin offs. His primary interest is in the Technology, Tehran, Iran, in 2008 and the Ph.D. degree in development new materials, processes, and architectures electrical engineering from University of Southern California required for high volume manufacturing of reliable leading (USC), Los Angeles, CA, USA, in 2014. He has over 70 edge products. In addition to development of materials, publications and is currently Sr. Hardware Engineer in Module processes, and architectures used in many products, his work R&D Group at Infinera Corporation, Sunnyvale, CA. He was a has led to authoring or co-authoring over 100 published papers research assistant in USC optical communication laboratory and more than 70 patents. from 2009 to 2014. He was USC Ming Hsieh Institute Ph.D. Scholar from 2013 to 2014. He is a reviewer of the IEEE/OSA Jeffrey T. Rahn, (S’93, M’98, SM’12) completed his B.Sc. Journal of lightwave technology, IEEE/OSA Journal of Optical degree in Physics at Stanford University in Palo Alto in 1991 Communication and Networking, Optics Express, Optics and received his Ph.D. from the University of California at Letters, IEEE Journal of Quantum Electronics, and Optical Santa Cruz in 1998. His thesis experimental work was Fiber Technology. performed at Deutsche Electronen Synchrotron in Hamburg, Germany, on deep inelastic scattering of electrons and protons. Pierre Mertz received the B.S. and M.S.Eng. degrees in From 1998 to 1999 he held a postdoctoral position with Xerox’s applied and engineering physics from Cornell University, Palo Alto Research Center in Palo Alto, and then joined Acuson Ithaca, NY, in 1988 and 1989, and the M.S. and Ph.D. degrees Corporation, developing signal processing algorithms for in electrical engineering from Princeton University, Princeton, medical ultrasound. In 2001 he joined Big Bear Networks, NJ, in 1992 and 1996. From 1996 to 1999 he joined the developing electronic dispersion compensation ASICs for Communications and Optical Research group at Hewlett 10 Gb/s receivers running over single mode and multimode Packard laboratories working on folded illumination and fibers. He played a key role in the successful introduction of imaging optics for a wearable microdisplay. He is currently a technology used in 10GBase-LRM. In 2005 Big Bear was Distinguished Engineer in the Advanced Optical Development acquired by Infinera, where he has been involved in optical group at Infinera Corporation. He leads Infinera’s subsea architecture for their long-haul communications systems. Here technical team developing novel optical nonlinear algorithms he has continued his role in signal processing. On the optical and coherent modulation formats to increase capacities of both signal processing front, he developed and integrated planar legacy and new subsea fibers. He has authored and coauthored lightwave circuits (PLCs), including demonstrating a novel 20 papers and 30 patents. technique for performing PM-DQPSK demodulation using a combination of optical, analog electrical, and digital signal Wilson Ko received his Ph.D. degree in Electrical Engineering processing. Recent work has been in architecture and and Computer Sciences from the University of California at integration of coherent optical systems using photonic Berkeley in 2014. Since then, he has been with Infinera in the integrated circuits. He holds 19 patents. Optical Integrated Components group as a photonic integrated circuit test development engineer. Han Sun, received the B.Eng. degree in electrical engineering and post-graduate degree in photonics and semiconductor Robert Maher (S’05–M’09–SM’15) received the B.Eng. and lasers, both from the University of Toronto, Toronto, Ontario, Ph.D. degrees in electronic engineering from Dublin City Canada, in 1997 and 1999, respectively. From 2001 to 2009, University, Dublin, Ireland, in 2005 and 2009, respectively. he was employed with Nortel, Ottawa, Ontario, doing research His doctoral research was focused on the development and on future optical transport systems. From 2003 to 2006, he was characterization of cost-efficient wavelength tunable instrumental in the development of DSP algorithms which led transmitters for reconfigurable agile optical networks. In 2010, to the World’s first commercial 40Gb/s optical modem he was awarded a Marie Curie Fellowship and joined the employing Pol-Mux QPSK modulation format. He is currently Optical Networks Group at University College London (UCL), with Infinera Canada, architecting the next generation London, U.K. In 2013, he was appointed to Senior Research transceivers targeting multiple Terabits per second. He holds 20 Associate within the UNLOC EPSRC Program Grant at UCL. granted US patents and 40 additional submissions. He has His research focused on spectrally efficient long-haul authored/co-authored over 39 technical journals papers and transmission for coherent optical networks, digital fiber conference presentations. His publications have accumulated nonlinearity mitigation techniques, and dynamic optical over 1200 citations. He has been a reviewer of IEEE Photonic networking. In 2016, he joined the Advanced Optical Systems Technology Letters and Journal of Lightwave Technology. His Group at Infinera Corporation, Sunnyvale, California. research interests include signal processing, receiver Dr. Maher is a Member of the Marie Curie Fellows equalization, and error correction coding. Association and has published over 100 peer reviewed Journal and Conference papers. He was awarded the Colin-Campbell Kuang-Tsan Wu (M’81–SM’12) received the B.S. and M.A.Sc. degrees from National Taiwan University (NTU), JSTQE-INV-IPIP2018-06851-2017 24

Taipei, Taiwan, in 1975 and 1979, respectively, and the Ph.D. degree from the University of Ottawa, Ottawa, ON, Canada, in 1986, all in electrical engineering. He was an Instructor at the National Taiwan Institute of Technology and NTU from 1979 to 1982. He was involved in research on satellite modems at Microtel Pacific Research, Burnaby, BC, Canada, during 1986– 1987. He moved back to Ottawa in 1987 to join BNR and was the key System Designer for the world’s first 512-QAM digital radio. From 1994 to 1995, he was with wireless R&D Group, CCL/ITRI, Taiwan, developing a digital-enhanced cordless telecommunication system. At Nortel, he was involved in research on GSM and fixed broadband wireless system, where he later joined the Metro Ethernet Networks Division in 1999 and led the system design of the 40G coherent optical modem in which the receiver application-specified integrated circuit worked without any respin. Since May 2009, he has been with Infinera Canada, Ottawa, where he leads the Ottawa Design Center. He is applying coherent technologies in conjunction with photonic integrated circuits for current and future optical transport systems. He has been granted 52 U.S. patents. He is an Infinera Fellow.

Matthew Mitchell currently serves as Vice President of Optical Systems Architecture at Infinera Corporation. He received his M.S and Ph.D degrees in Electrical Engineering from Princeton University in 1995 and 1998 respectively. Upon finishing his Ph.D. he became a member of technical staff within the Advanced Development Department at Lucent Bell Laboratories working on high channel count DWDM transmission. In 2000, he became a member of technical staff at Corvis Communications serving as a technical lead in developing a next generation 10 Gb/s DWDM long haul transport product. He has been with Infinera since 2001 and has contributed to numerous efforts including optical architecture, hardware research and development, and the creation of optical system planning tools. Dr. Mitchell is a member of the Optical Society of America, has co-authored over 30 peer-reviewed publications and holds 26 patents in the area of optical transmission and nonlinear optics.

David Welch, Ph.D. (M’81-SM’90-F'08) co-founded Infinera in 2001, and serves as President and member of the Board of Directors. He holds over 130 patents in optical transmission technologies, and has authored over 300 technical publications in the same field. In recognition of his technical contributions to the optical industry, he has been awarded the OSA’s Adolph Lomb Medal, Joseph Fraunhofer Award and John Tyndall Award, the IET’s JJ Thompson Medal for Achievement in Electronics, and the IEEE Ernst Weber Managerial Leadership Award. He is a Fellow of the OSA and the IEEE. In 2016, he was elected to the National Academy of Engineering. Dr. Welch holds a B.S. in Electrical Engineering from the University of Delaware and a Ph.D. in Electrical Engineering from Cornell University.