An Approach for Automated Verification of Web Applications Using Model Checking and Replaying the Scenarios of Counterexamples
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Formal Verification of Hardware Peripheral with Security Property
EXAMENSARBETE INOM TEKNIK, GRUNDNIVÅ, 15 HP STOCKHOLM, SVERIGE 2017 Formal Verification of Hardware Peripheral with Security Property Formell verifikation av extern hårdvara med säkerhetskrav VT 2017 NIKLAS ROSENKRANTZ JONATHAN Y HÅKANSSON KTH SKOLAN FÖR DATAVETENSKAP OCH KOMMUNIKATION Formal Verification of Hardware Peripheral with Security Property Jonathan Yao Håkansson, Niklas Rosencrantz Supervisor: Roberto Guanciale Examiner: Örjan Ekeberg CSC, KTH 2017 Abstract One problem with computers is that the operating system automatically trusts any externally connected peripheral. This can result in abuse when a peripheral technically can violate the security model because the peripheral is trusted. Because of that the security is an important issue to look at. The aim of our project is to see in which cases hardware peripherals can be trusted. We built a model of the universal asynchronous transmitter/receiver (UART), a model of the main memory (RAM) and a model of a DMA controller. We analysed interaction between hardware peripherals, user processes and the main memory. One of our results is that connections with hardware peripherals are secure if the hardware is properly configured. A threat scenario could be an eavesdropper or man-in-the-middle trying to steal data or change a cryptographic key. We consider the use-cases of DMA and protecting a cryptographic key. We prove the well-behavior of the algorithm. Some error-traces resulted from incorrect modelling that was resolved by adjusting the models. Benchmarks were done for different memory sizes. The result is that a peripheral can be trusted provided a configuration is done. Our models consist of finite state machines and their corresponding SMV modules. -
Model Checking of Software for Microcontrollers
Aachen Department of Computer Science Technical Report Model Checking of Software for Microcontrollers Bastian Schlich ISSN 0935–3232 Aachener Informatik Berichte AIB-2008-14 · · RWTH Aachen Department of Computer Science June 2008 · · The publications of the Department of Computer Science of RWTH Aachen University are in general accessible through the World Wide Web. http://aib.informatik.rwth-aachen.de/ Model Checking of Software for Microcontrollers Von der Fakultät für Mathematik, Informatik und Naturwissenschaften der RWTH Aachen University zur Erlangung des akademischen Grades eines Doktors der Naturwissenschaften genehmigte Dissertation vorgelegt von Diplom-Informatiker Bastian Schlich aus Essen/Ruhr Berichter: Professor Dr.-Ing. Stefan Kowalewski Professor Dr. Jan Peleska Tag der mündlichen Prüfung: 04.06.2008 Diese Dissertation ist auf den Internetseiten der Hochschulbibliothek online verfügbar. Abstract Software of microcontrollers is getting more and more complex. It is mandatory to extensively analyze their software as errors can lead to severe failures or cause high costs. Model checking is a formal method used to verify whether a system satisfies certain properties. This thesis describes a new approach for model checking software for microcon- trollers. In this approach, assembly code is used for model checking instead of an intermediate representation such as C code. The development of [mc]square, which is a microcontroller assembly code model checker implementing this approach, is detailed. [mc]square has a modular architecture to cope with the hardware dependency of this approach. The single steps of the model checking process are divided into separate packages. The creation of the states is conducted by a specific simulator, which is the only hardware-dependent package. -
The Cprover User Manual
The CProver User Manual SatAbs – Predicate Abstraction with SAT CBMC – Bounded Model Checking Contents 1 Introduction 4 1.1 Motivation ............................ 4 1.2 Bounded Model Checking with CBMC ............ 5 1.3 Automatic Program Verification with SatAbs ........ 5 1.4 AShortTutorial ......................... 5 1.5 Hardware/Software Co-Verification . 6 2 Installation 7 2.1 Installing CBMC ......................... 7 2.2 Installing SatAbs ........................ 7 2.3 Installing the Eclipse Plugin . 9 2.4 Installing goto-cc ........................ 10 3 CBMC: Bounded Model Checking for C/C++ 11 3.1 AShortTutorial ......................... 11 3.1.1 FirstSteps ........................ 11 3.1.2 Verifying Modules . 12 3.1.3 LoopUnwinding ..................... 12 3.1.4 Unbounded Loops . 13 3.1.5 A Note About Compilers and the ANSI-C Library . 14 3.2 Command Line Interface . 15 4 Verifying C/C++ Programs with SatAbs 16 4.1 Background............................ 16 4.1.1 Abstraction and Refinement . 16 4.1.2 Properties......................... 18 4.2 Using the Command Line Interface . 19 4.3 Tutorials.............................. 20 4.3.1 Example: Reference Counting in Linux Device Drivers 21 4.3.2 Example: Buffer Overflow in a Mail Transfer Agent . 23 4.3.3 Unit Testing with SatAbs ............... 26 1 5 The Eclipse User Interface 31 6 Build Systems and Libraries 36 6.1 Integration into Build Systems with goto-cc ......... 36 6.1.1 Example: Building wu-ftpd . 36 6.1.2 Important Notes . 36 6.2 Libraries.............................. 37 6.2.1 Linkinglibraries ..................... 37 6.2.2 Abstractions for Zero-Terminated Strings . 37 7 ANSI-C/C++ Language Features 39 7.1 BasicDatatypes ........................ -
Formal Verification of Requirements Using SPIN: a Case Study on Web
Formal Verification of Requirements using SPIN: A Case Study on Web Services∗ Raman Kazhamiakin Marco Pistore Marco Roveri DIT, University of Trento ITC-irst Via Sommarive 14, I-38050, Trento, Italy Via Sommarive 18, I-38050, Trento, Italy {raman,pistore}@dit.unitn.it [email protected] Abstract in software development. Despite its criticality, require- ments are often described only in natural language and re- In this paper we describe a novel approach for the for- quirements analysis techniques are rarely applied. mal specification and verification of distributed processes The Tropos project (http://www.troposproject.org/) in a Web service framework. The formal specification is aims to develop a requirements driven software engineer- provided at two different levels of abstraction. The strategic ing methodology for agent-oriented, distributed systems. level describes the requirements of the Web service domain, Tropos provides graphical notations for requirements mod- in terms of the different actors participating to it, with their els, based on concepts like actors, goals, and dependencies goals and needs and with their mutual dependencies and among actors. Moreover, it adopts a variety of tools and expectations. The process level shows how these require- techniques to support the analysis of the requirements mod- ments are operationalized into communicating processes els. In particular, Tropos provides a formal specification running on the different Web servers. We model the strate- language, called Formal Tropos (hereafter FT). FT supple- gic level exploiting Formal Tropos (FT), a language for the ments the graphical notations with a first-order Linear Tem- formal definition of the requirements of agent-oriented sys- poral Logic (LTL) suitable for automated verification.