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Virus Bulletin, March 1991
March 1991 ISSN 0956-9979 THE AUTHORITATIVE INTERNATIONAL PUBLICATION ON COMPUTER VIRUS PREVENTION, RECOGNITION AND REMOVAL Editor: Edward Wilding Technical Editor: Fridrik Skulason, University of Iceland Editorial Advisors: Jim Bates, Bates Associates, UK, Phil Crewe, Fingerprint, UK, Dr. Jon David, USA, David Ferbrache, Information Systems Integrity & Security Ltd., UK, Ray Glath, RG Software Inc., USA, Hans Gliss, Datenschutz Berater, West Germany, Ross M. Greenberg, Software Concepts Design, USA, Dr. Harold Joseph Highland, Compulit Microcomputer Security Evaluation Laboratory, USA, Dr. Jan Hruska, Sophos, UK, Dr. Keith Jackson, Walsham Contracts, UK, Owen Keane, Barrister, UK, Yisrael Radai, Hebrew University, Israel, John Laws, RSRE, UK, David T. Lindsay, Digital Equipment Corporation, UK, Martin Samociuk, Network Security Management, UK, John Sherwood, Sherwood Associates, UK, Dr. Peter Tippett, Certus International Corporation, USA, Dr. Ken Wong, PA Consulting Group, UK, Ken van Wyk, CERT, USA. CONTENTS SOFTWARE STRATEGY Defining Executable Code in the Advent of Windows 10 EDITORIAL 2 VB PRESENTATIONS 11 TECHNICAL NOTES 3 VIRUS ANALYSES THE VB CONFERENCE 1. INT13 - A New Level of Final Programme 4 Stealthy Sophistication 12 2. Casino - Gambling With INTEGRITY CHECKING Your Hard Disk 15 The Flawed Six Byte Method 6 OPINION PROGRAM TACTICS TSR Monitors and Memory Scanners - The ‘Playground’ Approach to Virus Detection 18 Developing a Virus Scanner 7 END-NOTES & NEWS 20 IBM PC VIRUSES (UPDATES) 9 VIRUS BULLETIN ©1991 Virus Bulletin Ltd, 21 The Quadrant, Abingdon Science Park, Oxon, OX14 3YS, England. Tel (+44) 235 555139. /90/$0.00+2.50 This bulletin is available only to qualified subscribers. No part of this publication may be reproduced, stored in a retrieval system, or transmitted by any form or by any means, electronic, magnetic, optical or photocopying, without the prior written permission of the publishers. -
Uefi وبعض أنظمة Bios Uefi واجهة الربنامج الثابت املوحدة والقابلة للتمديد
- جدول أقسامGUID GUID Partition Table جدول أقسام )أو تقسيم( يستخدم املعرفات الفريدة العميمة "! G % تعري. و-يي, ا+قسام *( ال)'ي& املقسم % أ$#مة !0/ و2ع1 أ$#مة 45!3 UEFI واج=ة ال>$ا;: ال9ا82 امل)7دة والقا62ة ل6تمديد مس جد? % ;<رم ّو@B @AA دة 'Cتمرب/أي6)ل DE@F2 " F جدول أقسام GUID *باIة *H تخGيط )أو تقسيم( جدول أقسام ;عياJI *( أج=,ة التخ,يH الفي,ياKيةM9; L ا+قراN الثا2تةL أو أقراN الحالة الC6OةPQ Lا التخGيط يستخدم املعرR الفريد العميم U@TS % متيي, ا+قسام وأ$)ا*هاL وXIم أ$W ج,H; V ;عياI واج=ة ال>نا;: الثا82 امل)حدة والقا62ة ل6تمديد !U ZD S YL /0 )املق^[ ;H ;\تد] h _`abc /0! 0defgبديM ل6\ظام التق6يدJ 45!3( $ظام Hlm GPj ا'تخدا;W أيضا % 2ع1 أ$#مة 45!3 بسnC ;حدو?ية جدول أقسام Lo3p الذJ يستخدم 82qTD فقط % تخ,يH ;ع6)مات ال<rم و*ناويr7 v; us3t Hم القGاw التق6يدqx@D Jبايu8 ;ع#م أ$#مة التشyيM تد*م P\; LGPj العام LDE@E 2ع1 ا+$#مة ;M9 ما{ أوu|} ومايكرو')ف8 ويندو~ )x86( تد*م فقط اإلقالH; w أقسام GPj % أ$#مة !L /0!B/0 2ي\ام ;ع#م ت)~يعات لي\lس و ت)~يعات 2ريhيل ي)$lس ;M9 فرJ يب |} ?lm J\ها اإلقالH; w أقسام GPj % أج=,ة 45!3 أو أج=,ة !u /0 6A TD % ا+قراN الثا2تة التي تستخدم r7م القطاw املعياx@D JI بايL8 ال<rم ا+قىص ل6قرN با'تخدام DuD (Q o3p ترياباي8 أو ) x@D × D بايuU @ S )8 2ي\ام ال<rم ا+قىص ل6قرN با'تخدام GPj 'يك)ن FuA ~يتاباي8 أو ) x@D × D بايU T S U @ S )8 والسnC % ذلك ا'تخدام H; 82 6A أجM *ناويH الكتM امل\Gقية % جدول أقسام u GPj تاIيخياL رشhة |$تي LM كا$8 وIاV تG)ير LGPj أواخر التسعينات )L)DEEE الذJ أصCح ج,H; V ;)اصفة !U D S Y /0 % عام DE@E وت<8 |?اIة Qيئة خاصة تد*ى !P\; u _`abc /0 عام uDEEF قطاعات GPT % عام LDE@E *ندما بدأ ;\تr)ن ا+قراN الثا2تة الت<)ل |ىل ت)ظي. -
Programmer's Reference Guide, This Section Could Be of Assistance in Getting Around
PEN*KEYR 6100 Computer PROGRAMMER’S REFERENCE GUIDE """"""""""""""""""""" P/N 977-054-001 Revision B December 2000 " NOTICE The information contained herein is proprietary and is provided solely for the purpose of allowing customers to operate and service Intermec manufactured equipment and is not to be released, reproduced, or used for any other purpose without written permission of Intermec. Disclaimer of Warranties. The sample source code included in this document is presented for reference only. The code does not necessarily represent complete, tested programs. The code is provided AS IS WITH ALL FAULTS." ALL WARRANTIES ARE EXPRESSLY DISCLAIMED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. We welcome your comments concerning this publication. Although every effort has been made to keep it free of errors, some may occur. When reporting a specific problem, please describe it briefly and include the book title and part number, as well as the paragraph or figure number and the page number. Send your comments to: Intermec Technologies Corporation Publications Department 550 Second Street SE Cedar Rapids, IA 52401 ANTARES, INTERMEC, NORAND, NOR*WARE, PEN*KEY, ROUTEPOWER, TRAKKER, and TRAKKER ANTARES are registered trademarks and ENTERPRISE WIRELESS LAN, INCA, Mobile Framework, TE 2000, UAP, and UNIVERSAL ACCESS POINT are trademarks of Intermec Technologies Corporation. 1996 Intermec Technologies Corporation. All rights reserved. Acknowledgments ActiveX, Microsoft, MS, and MSĆDOS, Windows, and Windows NT are registered trademarks and MSDN, Visual Basic, Visual C++, and Windows for Pen are trademarks of Microsoft Corporation. Borland, dBase, and Turbo Pascal are registered trademarks and Borland C and C++ for Windows are trademarks of Borland International, Inc. -
SOS Internals
Understanding a Simple Operating System SOS is a Simple Operating System designed for the 32-bit x86 architecture. Its purpose is to understand basic concepts of operating system design. These notes are meant to help you recall the class discussions. Chapter 1 : Starting Up SOS 3 Registers in the IA-32 x86 Architecture BIOS (Basic Input/Ouput System) Routines Real Mode Addressing Organization of SOS on Disk and Memory Master Boot Record SOS Startup A20 Line 32-bit Protected Mode Addressing Privilege Level Global Descriptor Table (GDT) More on Privilege Levels The GDT Setup Enabling Protected Mode Calling main() Chapter 2 : SOS Initializations 10 In main() Disk Initialization Display Initialization Setting Up Interrupt Handlers Interrupt Descriptor Table (IDT) A Default Interrupt Handler Load IDT The Programmable Interrupt Controller (PIC) The Keyboard Interrupt Handler Starting the Console Putting It All Together Chapter 3: SOS1 – Single-tasking SOS 16 Running User Programs GDT Entries Default Exception Handler User Programs Executable Format System Calls Creating User Programs The run Command Understanding a Simple Operating System The DUMB Memory Manager Program Address Space Process Control Block Switching to a User Program Kernel-Mode Stack Chapter 4 : SOS2 – Multi-tasking SOS 24 Running Multiple User Programs NAÏVE Memory Manager Programmable Interval Timer (PIT) Process States Timer Interrupt Handler Sleep System Call The run Command Process Queue The Scheduler The Complete Picture ps Command Chapter 5 : SOS3 – Paging in SOS 31 -
BIOS Enhanced Disk Drive Specification
BIOS Enhanced Disk Drive Specification Version 1.1 May 9, 1995 Ò Technical Editor: Curtis E. Stevens Phoenix Technologies 2575 McCabe Way Irvine, Ca. 92714 Phone: (714) 440-8000 Fax: (714) 440-8300 [email protected] Phoenix Technologies Ltd. THIS SPECIFICATION IS MADE AVAILABLE WITHOUT CHARGE FOR USE IN DEVELOPING COMPUTER SYSTEMS AND DISK DRIVES. PHOENIX MAKES NO REPRESENTATION OR WARRANTY REGARDING THIS SPECIFICATION OR ANY ITEM DEVELOPED BASED ON THIS SPECIFICATION, AND PHOENIX DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND FREEDOM FROM INFRINGEMENT. WITHOUT LIMITING THE GENERALITY OF THE FOREGOING, PHOENIX MAKES NO WARRANTY OF ANY KIND THAT ANY ITEM DEVELOPED BASED ON THIS SPECIFICATION WILL NOT INFRINGE ANY COPYRIGHT, PATENT, TRADE SECRET OR OTHER INTELLECTUAL PROPERTY RIGHT OF ANY PERSON OR ENTITY IN ANY COUNTRY. USE OF THIS SPECIFICATION FOR ANY PURPOSE IS AT THE RISK OF THE PERSON OR ENTITY USING IT. Enhanced Disk Drive Specification Version 1.1 Version 1.1 Copyright ã 1995 Phoenix Technologies Ltd. All Rights Reserved. Phoenix Technologies Ltd Enhanced Disk Drive Specification PRELIMINARY Version 1.1 Revision History Rev Date Description 1.0 January 25, 1994 Initial Release 1.1 January 25, 1995 Added the following: · Description of the 528 MB limitation · Description of compatibility issues caused by translation · Description of Int 13h Extensions as implemented by Phoenix · Description of the Translated Fixed Disk Parameter Table. · Support for ATAPI devices · Support for translation reporting Companies Supporting this Specification Phoenix Technologies 2575 McCabe Way Irvine, Ca. -
LPI 101 – Configure Fundamental BIOS Settings
– LPI 101 – Configure Fundamental BIOS Settings [3] (Linux Professional Institute Certification) a .˜. /V\ by: Andrew Eager // \\ [email protected] @._.@ $Id: gl1.101.1.slides.tex,v 1.4 2003/05/30 04:56:33 waratah Exp $ aCopyright c 2002 Andrew Eager, Geoffrey Robertson. Permission is granted to make and distribute verbatim copies or modified versions of this document provided that this copyright notice and this permission notice are preserved on all copies under the terms of the GNU General Public License as published by the Free Software Foundation—either version 2 of the License or (at your option) any later version. 1 Configure BIOS Fundamental Settings [3] Objective Candidates should be able to configure fundamental system hardware by making the correct settings in the system BIOS. This objective includes a proper understanding of BIOS configuration issues such as the use of LBA on IDE hard disks larger than 1024 cylinders, enabling or disabling integrated peripherals, as well as configuring systems with (or without) external peripherals such as keyboards. It also includes the correct setting for IRQ, DMA and I/O addresses for all BIOS administrated ports and settings for error handling. 2 Configure Fundamental BIOS Settings [3] Key files, terms, and utilities /proc/ioports /proc/interrupts /proc/dma /proc/pci 3 Configure Fundamental BIOS Settings [3] Resources of interest Large Disk HOWTO by Andries Brouwer http://www.linuxdoc.org/HOWTO/Large-Disk-HOWTO.html 4 The PC Firmware—BIOS Responsible for bring the hardware to a state at which it is ready to boot an Operating System. 5 System reset and initialisation Basic main memory test (RAM) Test the presence of various devices On board peripheral selection Low level device configuration Selection of boot devices Locating an operating system The BIOS may have password access enabled The PC Firmware—BIOS Responsible for bring the hardware to a state at which it is ready to boot an Operating System. -
BIOS Boot Specification
Compaq Computer Corporation Phoenix Technologies Ltd. Intel Corporation BIOS Boot Specification Version 1.01 January 11, 1996 This specification has been made available to the public. You are hereby granted the right to use, implement, reproduce, and distribute this specification with the foregoing rights at no charge. This specification is, and shall remain, the property of Compaq Computer Corporation (“Compaq”), Phoenix Technologies Ltd (“Phoenix”), and Intel Corporation (“Intel”). NEITHER COMPAQ, PHOENIX NOR INTEL MAKE ANY REPRESENTATION OR WARRANTY REGARDING THIS SPECIFICATION OR ANY PRODUCT OR ITEM DEVELOPED BASED ON THIS SPECIFICATION. USE OF THIS SPECIFICATION FOR ANY PURPOSE IS AT THE RISK OF THE PERSON OR ENTITY USING IT. COMPAQ, PHOENIX AND INTEL DISCLAIM ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND FREEDOM FROM INFRINGEMENT. WITHOUT LIMITING THE GENERALITY OF THE FOREGOING, NEITHER COMPAQ, PHOENIX NOR INTEL MAKE ANY WARRANTY OF ANY KIND THAT ANY ITEM DEVELOPED BASED ON THIS SPECIFICATION, OR ANY PORTION OF IT, WILL NOT INFRINGE ANY COPYRIGHT, PATENT, TRADE SECRET OR OTHER INTELLECTUAL PROPERTY RIGHT OF ANY PERSON OR ENTITY IN ANY COUNTRY. Table of Contents 1.0 INTRODUCTION 5 1.1 REVISION HISTORY 5 1.2 RELATED DOCUMENTS 5 1.3 PURPOSE 5 1.4 TERMS 6 2.0 OVERVIEW 9 2.1 DESCRIPTION 9 3.0 IPL DEVICES 10 3.1 REQUIREMENTS FOR IPL DEVICES 10 3.1.1 IPL TABLE 10 3.1.2 PRODUCT NAME STRING 11 3.2 BAIDS 11 3.3 DEVICES WITH PNP EXPANSION HEADERS -
Virus Infection Techniques: Boot Record Viruses
Virus Infection Techniques: Boot Record Viruses Bill Harrison CS4440/7440 Malware Analysis and Defense Reading } Start reading Chapter 4 of Szor 2 Virus Infection Techniques } We will survey common locations of virus infections: MBR (Master Boot Record) Boot sector Executable files (*.EXE, *.COM, *.BAT, etc.) } Most of the examples of these viruses, especially the first two types, are from the DOS and floppy disk era 3 Why Study Older Viruses? } Vulnerabilities remain very similar over time, along with the means to exploit them and defend against them } Modern Internet worms differ mainly in the use of the internet for transport, and are otherwise similar to older viruses } Older viruses illustrate the virus vs. antivirus battle over many generations 4 Boot-up Infections and the PC Boot-up Sequence } PC boot-up sequence: 1. BIOS searches for boot device (might be a diskette, hard disk, or CD-ROM) 2. MBR (Master Boot Record) is read into memory from the beginning of the first disk partition; execution proceeds from memory 5 Master Boot Record Structure Boot-up Sequence cont’d. 3. Beginning of MBR has tiny code called the boot- strap loader 4. Data area within MBR has the disk PT (partition table) 5. Boot-strap loader reads PT and finds the active boot partition 6. Boot-strap loader loads the first sector of the active partition into memory and jumps to it; this is called the boot sector 7 Boot-up Sequence cont’d. } MBR is always at BIOS the very first sector of the hard MBR: Expanded View MBR Boot-strap loader code (446 disk (first 512 -
ICE-BDE-T7 COM Express Module
ICE-BDE-T7 COM Express Module MODEL: ICE-BDE-T7 COM Express R3.0 Module (Type 7) with Intel® Xeon® Processor D-1548/D-1518/D-1508, Two ECC DDR4 SO-DIMM, GbE, 10G KR, NCSI, SATA 6Gb/s, PCIe Gen3 and RoHS User Manual Page i Rev. 1.01 – January 30, 2019 ICE-BDE-T7 COM Express Module Revision Date Version Changes January 30, 2019 1.01 Added a new SKU - ICE-BDE-T7-1508 December 13, 2017 1.00 Initial release Page ii ICE-BDE-T7 COM Express Module Copyright COPYRIGHT NOTICE The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. TRADEMARKS All registered trademarks and product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective owners. Page iii ICE-BDE-T7 COM Express Module Manual Conventions WARNING Warnings appear where overlooked details may cause damage to the equipment or result in personal injury. Warnings should be taken seriously. -
PCIE-Q870-I2 PICMG 1.3 CPU Card
PCIE-Q870-i2 PICMG 1.3 CPU Card MODEL: PCIE-Q870-i2 Full-Size PICMG 1.3 CPU Card Supports LGA1150 Intel® Core™ i7/i5/i3, Pentium® or Celeron® CPU, Intel® Q87 Chipset, DDR3, VGA, iDP, Dual Intel® PCIe GbE, SATA 6Gb/s, PCIe Mini, mSATA, RS-232, HD Audio, iRIS-2400 and RoHS User Manual Page i Rev. 1.05 – November 13, 2015 PCIE-Q870-i2 PICMG 1.3 CPU Card Revision Date Version Changes November 13, 2015 1.05 Updated Section 1.6: Technical Specifications Updated Section 2.4: Optional Items Updated Chapter 5: BIOS March 23, 2015 1.04 Updated Section 4.3.3: Flash Descriptor Security Override Jumper November 5, 2014 1.03 Updated PCIe specifications on page 7 June 16, 2014 1.02 Modified LAN pinouts Updated Chapter 2: Packing List March 24, 2014 1.01 Deleted I2C information Updated Section 2.4: Optional Items January 14, 2014 1.00 Initial release Page ii PCIE-Q870-i2 PICMG 1.3 CPU Card Copyright COPYRIGHT NOTICE The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. -
IMBA-C2360-I2 ATX Motherboard
IMBA-C2360-i2 ATX Motherboard MODEL: IMBA-C2360-i2 ATX Motherboard Supports 6th Generation LGA1151 Intel® Xeon® E3-1200 v5 Series, Core™ i3, Pentium® or Celeron® CPU, Intel® C236 Chipset, DDR4, HDMI 2.0, DVI-D, VGA, Dual Intel® PCIe GbE, SATA 6Gb/s, USB 3.0, HD Audio, IPMI 2.0 and RoHS User Manual Page i Rev. 1.01 – October 24, 2016 IMBA-C2360-i2 ATX Motherboard Revision Date Version Changes October 24, 2016 1.01 Modified the display output spec of the DVI-D, HDMI and iDP connectors (page 7) July 21, 2016 1.00 Initial release Page ii IMBA-C2360-i2 ATX Motherboard Copyright COPYRIGHT NOTICE The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. TRADEMARKS All registered trademarks and product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective owners. Page iii IMBA-C2360-i2 ATX Motherboard Manual Conventions WARNING Warnings appear where overlooked details may cause damage to the equipment or result in personal injury. -
95-156R0.Txt X3T10/95-156 R0 BIOS Types, CHS Translation
95-156r0.txt X3T10/95-156 R0 BIOS Types, CHS Translation, LBA and Other Good Stuff Version 3+ 11 February 95 by Hale Landis ([email protected]) This is very technical. Please read carefully. There is lots of information here that can sound confusing the first time you read it. ! Introduction (READ THIS!) ! ------------------------- ! Why is an understanding of how a BIOS works so important? The basic reason is that the information returned by INT 13H AH=08H is used by FDISK, it is used in the partition table entries within a partition record (like the Master Boot Record) that are created by FDISK, and it is used by the small boot program that FDISK places into the Master Boot Record. The information returned by INT 13H AH=08H is in cylinder/head/sector (CHS) format -- it is not in LBA format. The boot processing done by your computer's BIOS (INT 19H and INT 13H) is all CHS based. ! Read this so that you are not confused by all the false information going around that says "LBA solves the >528MB problem". ! Read this so that you understand the possible data integrity problem that a WD EIDE type BIOS creates. Any BIOS that has a "LBA mode" in the BIOS setup could be a WD EIDE BIOS. Be very careful and NEVER chage the "LBA mode" setting after you have partitioned and installed your software. History ------- Changes between this version and the preceeding version are marked by "!" at left margin of the first line of a changed or new paragraph.