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Cache prefetching
Branch-Directed and Pointer-Based Data Cache Prefetching
Non-Sequential Instruction Cache Prefetching for Multiple--Issue Processors
Denial-Of-Service Attacks on Shared Cache in Multicore: Analysis and Prevention
Fetch Directed Instruction Prefetching
Dynamic Eviction Set Algorithms and Their Applicability to Cache Characterisation
In Using the GNU Compiler Collection (GCC)
Gnu Assembler
A Survey on Recent Hardware Data Prefetching Approaches with an Emphasis on Servers
Optimizations Enabled by a Decoupled Front-End Architecture
Data Locality Optimizations for Multigrid Methods on Structured Grids
Instruction Cache Prefetching Using Multilevel Branch Prediction
Coverstory by Markus Levy, Technical Editor
Basicblocker: ISA Redesign to Make Spectre-Immune Cpus Faster
Processor Pipelines and Static Worst-Case Execution Time Analysis
The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System ∗
Cache Performance for Multimedia Applications
A Survey of Microarchitectural Side-Channel Vulnerabilities, Attacks and Defenses in Cryptography
Pointer Cache Assisted Prefetching
Top View
MANA: Microarchitecting an Instruction Prefetcher
Computer Architecture Cache Memory Design
Execution History Guided Instruction Prefetching
An Effective Instruction Cache Prefetch Policy by Exploiting Cache
Cache Miss Reduction Techniques for Embedded Cpu Instruction Caches
PAPP: Prefetcher-Aware Prime and Probe Side-Channel Attack
Call Graph Based Instruction Prefetching on Precompiled Executables
B-Fetch:Branch Prediction Directed Prefetching for In-Order Processors ∗ ∗ † Reena Panda , Paul V
Finding Address-Based Side-Channels in Binaries