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AES instruction set
A Quantitative Study of Advanced Encryption Standard Performance
On Security and Privacy for Networked Information Society
Efficient Hashing Using the AES Instruction
Stream Cipher Designs: a Review
A Bibliography of Publications on Hashing Algorithms
Optimizing Authenticated Encryption Algorithms
Low-Complexity Mitigation of Cache Side Channel Attacks
An Overview of Cryptographic Primitives for Possible Use in 5G and Beyond
The Design of Scalar AES Instruction Set Extensions for RISC-V
Dr. Markku-Juhani O. Saarinen
The First Systematic Hardware Accelerator Design for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes
A 128-Bit Block Cipher for Fast Encryption on Common Processors
An Instruction Set Extension to Support Software-Based Masking
Cryptographic Hardware Accelerators
Efficient Hashing Using the AES Instruction
Intel(R) Advanced Encryption Standard (AES) New Instructions
Analysis and Design of Blockcipher Based Cryptographic Algorithms
Analysis and Implementation of Estream and SHA-3 Cryptographic Algorithms
Top View
Security Trade-Offs in Cloud Storage Systems
Framework and Countermeasures For
The Shavite-3 Hash Function Tweaked Version
Cryptanalysis of AES-Based Hash Functions
Block Ciphers
STATEMENT D2v OPERATING MANUAL
Cipherxray: Exposing Cryptographic Operations and Transient Secrets
The M3dcrypt Password Hashing Function 1 Introduction
Copyright © Fsktm 2018 62 Improved Security of Rijndael Key Expansion Function
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International Journal of Engineering Technology Research & Management
Efficient Hashing Using the AES Instruction
RISC‐V Scalar Crypto
Intel AES Instruction Set S
Cross Platform Feature Comparison
A Hardware Benchmarking Platform for the Standardization of Authenticated Encryption Algorithms
Symmetric Key Cryptography Lecture 8 Summary Recallsymmetric-Key Encryption SIM-CCA Security
Provable Security of Cryptographic Hash Functions
Instruction Set Extensions for Support of Cryptography on Embedded Systems
Analysis of Recent Cryptographic Primitives Brice Minaud
JAIST Repository
A Lightweight ISA Extension for AES And
An AES Based 256-Bit Hash Function for Lightweight Applications: Lesamnta-LW∗
Measurement of Performance Benefits Using Hardware Crypto Acceleration
Evaluating Memory-Hard Proof-Of-Work Algorithms on Three Processors
Software Optimization Guide for the AMD Family 15H Processors
Block Ciphers–Focus on the Linear Layer (Feat. PRIDE)
Mobile Learning Anytime Everywhere
Comprehensive VM Protection Against Untrusted Hypervisor Through Retrofitted AMD Memory Encryption
Instruction Set Extensions for Secure Applications
Cpu Aes Instructions
A Lightweight ISA Extension for AES and SM4
A Comparison of Lightweight Ciphers Meeting Nist
Cryptography Acceleration in a RISC-V GPGPU