Minimig “Family Tree”

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Minimig “Family Tree” Original Minimig Menu / firmware Please note: many of the boards By Dennis Van Weeren improvements listed here can run a selection of backported to PIC. different cores to imitate various Has a real 68000 CPU, uses a PIC different systems. microcontroller for SD card and OSD In this “family tree” I’m talking specifically about the development history of the Minimig or Amiga core for that board, and not the board itself, or other cores that it might be Minimig + ARM controller able to run. ARM module and firmware by Jakub Bednarski, Replaces the PIC, adds support for HDFs and better speed. Chipset fixes by Jakub Bednarski, Menu / firmware improvements Sascha Boing and others. backported to Minimig’s ARM controller. Terasic DE1 dev board Replay V1 board Ported by Tobias Gubener, A similar project by Mike Johnson, CPU and ARM controller both replaced C-One Jakub Bednarski and several others. with his TG68 softcore (68000 only) Not directly derived from Minimig but FPGA Extender with some similarities. Soft CPU is Ported by Tobias Gubener derived from TG68. Has DVI output. Can connect real floppy drives and even a 68060 daughterboard. The first FPGA Amiga to offer AGA support, RTG, AHI Turbo Chameleon 64 audio and network. Ported by Tobias Gubener, Soft CPU now has initial 68020 support. Fast RAM + basic CPU cache. Firmware curated by Christian MCC216 board Vogelgsang A project by Frédéric Requin using his own chipset and CPU implementations. Turbo Chameleon 64 Improvements by Alastair Robinson Terasic DE1 dev board Support for extra 16 meg of Fast RAM, Adopted by Rok Krajnc. Control CPU increased RAM bandwidth, faster cache. replaced with OR1200 OpenRisc CPU. Menu redesign, support for multiple Firmware features added from TC64 configurations, WinUAE hardfiles and direct SD card access. FleaOhm Terasic DE0-nano MiST board (Till Harbaum) Ported by Stefan Kristiansson by Valentin Angelovski. ported by Rok Krajnc. Based on DE1 Control CPU replaced with Mor1kx A Lattice FPGA board with core, improves upon SDRAM controller OpenRisc CPU. DVI video output. and cache from Turbo Chameleon 64, . ARM controller, firmware supports USB, other cores + all upstream features. UnAmiga SiDi A board similar to MiST Ported by Jepalza to make with a newer but slightly Amiga 500 core. MiST board - AGA core smaller FPGA. AGA chipset added by Rok Krajnc. CPU and chipset bugfixes by Till Harbaum, Mike Johnson, Gyorgi Szombathelyi, retrofun and others. RTG / C2P backported to MiST UnAmiga AGA core Cache improvement and big speedup by AGA features merged in from MiST by Gyorgi Szombathelyi. Jepalza. Compromises needed to make the core fit the FPGA. RAM tweaks by Neuro_999, OSD tweaks by Edu Arana. Menu translated to Spanish. Turbo Chameleon 64 AGA features merged in by Alastair MiSTer (DE10-nano) Robinson. Control CPU migrated to by Sorgelig. Has all features newly-created 832 softcore, making from other cores, HDMI space for AGA. Added RTG, UnAmiga Mini-ITX output, much more RAM, and Chunky2Planar, extra RAM, floppy and Now uses a larger FPGA, upstream core a similar but different RTG harddrive sounds Core now maintained will fit easily without compromises. implementation by in sync with Minimig on MiST. Grabulosaure.

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