Multi-Standard Mobile Broadcast Receiver LNA with Integrated

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 44, NO. 3, MARCH 2009 675 Multi-Standard Mobile Broadcast Receiver LNA With Integrated Selectivity and Novel Wideband Impedance Matching Technique Tae Wook Kim, Member, IEEE, Harish Muthali, Susanta Sengupta, Kenneth Barnett, Member, IEEE, and James Jaffee, Member, IEEE

Abstract—A CMOS LNA supporting multiple mobile video stan- plification which incorporates the low-pass filter (LPF) section dards (MediaFLO, DVB-H, and ISDB-T) is implemented using a for selectivity against unwanted interfering signals. There is also 0.18 m CMOS process. The LNA uses a novel feedback config- a closed loop path which diverts a portion of the signal power uration and implements an RF elliptic low-pass filter (LPF) response. Because of this elliptic LPF response, the receiver is able to to realize wideband feedback that can be used to provide wide operate concurrently with radio transmitter leakage from GSM, band impedance matching. DCS, WLAN, and Bluetooth. The design decouples the feedback To accomplish the rejection of the concurrent transmitter path from the main path to allow integration of the LPF as well signals, an integrated elliptic LPF based on a double cascode as obtain wideband input matching. Measurement results show voltage gain of 25 dB, NF of 1.6 dB, and IIP3 of 2 dBm in Medi- topology is proposed. Rejection of 70 dB is achieved by aFLO mode. DVB-H mode demonstrates voltage gain of 25 dB, NF cascading the elliptic LPF response ( 40 dB) with a bandpass of 1.8 dB, and IIP3 of 1 dBm while achieving interference rejec- filter (BPF) response ( 30 dB). The BPF is realized with a tion greater than 70 dB. capacitively tuned transformer load. The cascode devices act as Index Terms—CMOS LNA, broadcast, wireless video, mo- buffers between the filter sections. bile broadcast, concurrent operation, wideband RF, wideband In a mobile wireless communication channel, automatic gain impedance matching, partial feedback, notch filter, integrated control (AGC) functionality is required to avoid exceeding filter, RF filter, elliptic filter, MediaFLO, DVB-H, TV tuner. the dynamic range of the baseband analog-to-digital converter (ADC). Digital AGC can be employed to simplify the RF and I. INTRODUCTION analog design. The AGC in this case is digital in the sense that HE modern consumer expects their mobile phone to sup- there are discrete gain states that are controlled by the digital T port various media services simultaneously. For example, baseband section. The proposed LNA has six discrete gain one should be able to simultaneously discuss a football match states to implement the required AGC. with his friends over a mobile phone using a Bluetooth headset As standardized in the USA, MediaFLO operates in the fre- while enjoying the game on his mobile TV screen. To do this, the quency band 720–760 MHz [3] and does not require wideband phone should support concurrent operation between video re- operation. As such, MediaFLO does not need the same out-of- ceivers and the various transmitters that may exist in the handset. band harmonic rejection as in the wideband DVB-H case. But, The multi-mode, multi-standard receiver must have the neces- because of possible interference from adjacent analog television sary rejection of those transmitter signals while still achieving stations, the MediaFLO system does have a need for narrowly wideband input matching, low noise, and wide dynamic range selective front-end filters to provide significant adjacent channel [1], [2]. rejection. To avoid the additional insertion loss of switches both In order to meet such requirements, several approaches may preceding and following these RF channel select filters, dual in- be taken. Resistive feedback can achieve wideband impedance puts are provided for MediaFLO operation. This removes the matching in short channel MOSFET circuits [4]. However, in need for an RF switch after the filters [3] and hence provides improved sensitivity for this situation. This leads to a MediaFLO this low-noise amplifier (LNA), the phase shift caused by the cascade of two LC filter stages and loop gain greater than unity requirement for a single-ended LNA design. can result in amplifier instability [5]. In order to prevent such Therefore, it is advantageous to employ a topology that is instability, we propose a novel partial feedback technique. This easily optimized for this application. For this purpose, a pair of single-ended cascode LNAs with inductive degeneration are allows us to combine two paths, each of which is optimized for its particular function. There is an open loop path for signal am- used in MediaFLO USA operation. To minimize the number of I/Os, these two single-ended LNAs share the same inputs and outputs as the differential DVB-H LNA. A diagram illus- Manuscript received April 22, 2008; revised October 27, 2008. Current ver- trating this situation is shown in Fig. 1. The outputs of the single- sion published February 25, 2009. T. W. Kim is with the Department of Electrical Engineering, Yonsei Univer- ended and differential LNAs are combined at the transformer for sity, Seoul 120-749, Korea (e-mail: [email protected]). both DVB-H and MediaFLO modes. Since the subsequent mixer H. Muthali, S. Sengupta, and K. Barnett are with Qualcomm, Inc., Austin, stage is differential, the transformer also provides the neces- TX 78759 USA. J. Jaffee is with Qualcomm, Inc., San Diego, CA 92121 USA. sary single-ended-to-differential conversion required in the Me- Digital Object Identifier 10.1109/JSSC.2008.2011035 diaFLO mode.

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Fig. 1. Proposed LNA block diagram.

The paper is organized as follows. Following the introduction to use fully passive techniques with no Q-enhancement. The in Section I, Section II will introduce the system motivation for required rejection can be calculated with the following equa- the DVB-H LNA design. In Section III, the circuit design of tions, where is the required out-of-band rejection of the multi-mode LNAs will be discussed including the integrated the LNA, is the input signal power, is the out-of-band selectivity, the partial feedback topology, and the gain control jammer signal power, is the loss of the front-end RF filter, schemes. In Section IV, measurement results will be presented, and is the antenna isolation between the antennas used and the conclusion will follow in Section V. for the various phone radio transmitters and the antenna used for the broadcast receiver antenna. ( 9.5 dB) is the con- II. SYSTEM MOTIVATION FOR THE DVB-H LNA DESIGN version gain difference between the fundamental tone and the As shown for the wideband case in Fig. 2, the harmonics of third-order harmonic as shown in (1). is the required the local oscillator (LO) signal can translate out-of-band inter- signal-to-noise ratio for detection [12]. (See (1) and (2), at the ferers near the odd-harmonics of the LO into the desired base- bottom of the page.) band channel, resulting in receiver performance degradation. The required LNA rejection from (1) and (2) largely de- Equation (1) for the mixer gain shows how the third harmonic of pends on the RF front-end filter rejection properties. Generally, the LO can be translated to baseband. In (1), is the voltage these improve at larger offset frequencies. Thus, most of the at the intermediate frequency (IF) for the mixer output [6]; higher frequency interferers would have less stringent rejection is the transconductance of the mixer, is the load resistance requirements. If we assume 10 dB margin to allow for con- of the mixer, is the input RF signal frequency, and is tributions from other interference sources or inaccuracies in the LO frequency. In a DVB-H receiver (which uses the fre- estimates of the various attenuation components, (2) indicates quency band of 470–862 MHz [7]–[9]), the third harmonic of that we need 70 dB rejection through the LNA the LO in a direct conversion receiver can translate the DCS at 1.8 GHz. 1.8 GHz transmitter (Tx) signal inside of the wanted baseband signal bandwidth. Similarly, transmitter signals at IMT 2.0 GHz, III. CIRCUIT DESIGN WLAN 2.4 GHz, and Bluetooth 2.4 GHz would be downconverted by the harmonics of the LO. It is necessary to reject in- A. On-Chip Elliptic Low-Pass Filter terferers before they enter the mixer [10], [11]. One can improve Fig. 3 shows a schematic diagram of a third-order section of the attenuation by compensating the loss of a resonant tank the elliptic LPF. The LPF section is composed of a parallel LC using negative impedance techniques. However, the attenuation resonator with shunt capacitive terminations. The transfer func- at the resonant frequency will degrade as the blocker power in- tion for the LPF section is given by (3), where is the input creases. This effect is shown in [11]. In this design, we elected current to the filter, is the output current, is the

(1)

(2)

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Fig. 2. Illustration of out-of-band harmonic interference scenario for DVB-H.

Fig. 3. Schematic diagram of (a) elliptic LPF and (b) equivalent circuit for the transfer function. output conductance of M1, is the transconductance of M2, resonates at 1.8 GHz to generate maximum attenuation and are shunt capacitors, and is the impedance while and generate the LPF characteristic. and of the parallel tank as shown in (4). Maximum rejection is gen- are optimized by considering parameters such as output erated at 1.8 GHz by the zero in the transfer function caused by impedance of M1 and input impedance of cascode transistor the parallel LC-resonance. M2. The corner frequency of the LPF, the approximate value of which is given by (5), can be set to around 1 GHz, which is 100 MHz higher than the highest operating frequency. This choice of parameters avoids a significant in-band gain reduction when process variation is included. The rejection is dominated (3) by the notch frequency and quality factor of the tank rather than by the value of the corner frequency. Fig. 4 shows the schematic where diagram of the proposed cascade of two filters using a double (4) cascode configuration. The approximate notch depth of the cascaded stages of the elliptic filter is inversely proportional to the product of the tank Q’s and is given in (6), shown at the bottom (5) of the page.

(6)

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Fig. 4. Schematic diagram of the two stage elliptic LPF showing possible magnetic coupling mechanisms.

In the DVB-H design, a differential topology is employed for several reasons. First, it allows a larger swing at the output of the LNA. Second, it provides rejection of common-mode signals in the receiver which is important for System on Chip (SOC) [13] applications. Also, the differential topology can minimize the effects of the parasitic bond wires which are used as ground con- nections for the amplifier and LPF. For this feedback amplifier, source degeneration impedance would reduce the loop gain and decrease the benefits of feedback. This would degrade the input impedance matching performance. Also, ground inductance in series with and could degrade the LPF performance if a single-ended configuration were used instead. Fig. 5. Diagram illustrating (a) constructive coupling and (b) destructive cou- The LPF selectivity can be degraded by factors such as mag- pling between inductors. netic coupling between inductors in filter stages or coupling between inductors through the substrate. In a differential structure, magnetic coupling can cause degradation in selectivity in downward because of the increase in the value of inductance. ways different from a single-ended topology. Coupling between This increased magnetic field density will also make the induc- the inductors can cause shifts in center frequency and shifts in tors more likely to couple with other inductors in other stages of tank Q. Fig. 4 shows possible magnetic coupling paths between the filter through cross-coupling terms such as and .For the inductors in a two-stage LPF design. The strongest coupling the destructive coupling case, both the L and Q are decreased, is for and because the layout for a differential circuit but the magnetic flux is decreased and so the coupling through will usually have the positive and negative branches of the dif- cross terms is decreased as well. In this design, we tried to mini- ferential circuit close together.As shown in Fig. 5, depending on mize the coupling between the successive sections of the elliptic the polarity of the inductors, the magnetic coupling can be either filter to minimize the inter-stage coupling ( , as well as constructive or destructive in nature. Constructive coupling will , ). The minimization of these coupling factors is done cause the L and also the Q to be enhanced by a factor of , by providing some physical space between the filter sections. while destructive coupling will cause a reduction in L and also At the same time, we try to minimize the coupling between the Q by a factor of . The Q value is related to in (4). A parallel inductors in order to minimize the degra- more complete discussion regarding the effects of transformer dation in L and Q. We do this by using side by side inductors coupling on transformer performance can be found in [14]. This rather than an inter-wound differential inductor structure. This reference is primarily focused on transformers, but can be gen- increases the area of the design but also reduces these coupling erally applied to other inductively coupled structures. Construc- factors. tive coupling will cause the notch depth to be improved because Fig. 6 shows the physical layout of the inductors for the cas- of the improvement in tank Q, but the notch frequency will shift caded stages (Filter1 and Filter2). The inductors in Filter 1 and

Fig. 6. Diagram of physical layout for inductors in elliptic LPF.

Filter 2 are separated far enough to reduce the coupling through both mechanisms to an acceptable level ( 1.0% in this case). The inductor sizes of Filter 1 and Filter 2 are each different to allow for the optimization of performance differences caused by the different loading of each filter section. This will be discussed further in subsequent sections. Fig. 7 shows the inductance and Q of the filter inductors used in this design. Filter 1 uses a 3 nH inductor while Filter 2 has a 9 nH inductor. In each case, the inductor design is optimized so that the Q is maximized in the 1.5–2.4 GHz range. This is to allow maximum attenuation in the jammer frequency bands. Table I shows the simulated re- Fig. 7. Plot of Q (quality factor) and L (inductance) of (a) the lower filter stage sults for the magnetic coupling factors between the inductors. and (b) the upper filter stage. Coupling of 1% between the parallel combinations of inductors (through and ) is achieved. This is an important TABLE I SIMULATION RESULT OF MAGNETIC COUPLING COEFFICIENT factor in the design of the filter as the undesired coupling can BETWEEN INDUCTORS degrade Q or change center frequency through Q Q and L L. Magnetic coupling between adjacent stages (either columnar or diagonal) can degrade ultimate attenuation as the input signal “leaks” from the first filter section to the next filter section through these coupling factors. The diagonal and columnar couplings are also 1% and will not adversely affect the selectivity of the filter. As was previously mentioned, other than magnetic coupling, selectivity can also be degraded by substrate coupling between filter stages. Substrate coupling as a function of the distance between the inductors in the two stages are simulated and shown in Fig. 8. These simulations include the affect of guard-rings surrounding the inductors. If the spacing between inductors in subsequent stages of the filter are 200 m, we can achieve approximately 40 dB isolation at 2 GHz. This is sufficiently small to not degrade the performance of the filter. To create the desired resonance, the inductors and are connected in parallel with capacitors and as shown in Fig. 4. These capacitors are realized as on-chip metal-insu- Fig. 8. Plot showing substrate isolation between two inductors as a function of lator-metal (MIM) capacitors. To address process variation that spacing. will be observed with an on-chip capacitance, a programmable capacitor bank is included in parallel with these fixed capacitances. Two bits are assigned to the capacitor tuning circuit capacitors for the LC resonator are located on the inside of the which compensates the process variation. Control of this ca- inductor. pacitor bank is accomplished by an on-chip automatic capac- The physical size of the parallel capacitor is small compared itor tuner. To achieve a compact layout, the fixed and tunable with the overall inductor. If the parallel capacitors were located

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Fig. 11. Diagram showing the possible phase shifts for feedback with inclusion of LPF.

Fig. 9. Diagram showing the inductor and capacitor bank layout.

Fig. 12. LNA output phase shift simulation result vs. frequency.

Fig. 10. Simulation result of integrated LPF. toward the outside of the inductors, there would be long traces to connect the capacitor bank to the inductor terminals. These traces will tend to degrade the effectiveness of the parallel capacitance. To minimize the parasitic inductances in series with these parallel capacitances, the capacitor array is positioned inside of the inductor. The magnetic field generated by the inductor will cause circulating currents on the metal plates of a Fig. 13. Simplified schematic of proposed partial feedback topology. standard capacitor if it were placed as a single monolithic unit. Since the plates of the capacitor have low resistance, this circulating current on the metal plate will bring insignificant Q range. However, when we combine feedback topology with degradation. However, the induced currents will tend to lower the integrated LPF, as discussed in the previous section, there the overall inductance [20]. To mitigate this, we break up the will be an issue with stability. As shown in Fig. 11, the elliptic capacitor plate into smaller parts which are still connected in LPF stages will combine with the amplifier to generate a 360 parallel. By doing so, we interrupt the smooth paths for the in- phase shift 180 360 at some frequency. duced image currents. This reduces the degradation in the induc- If this is also combined with a loop gain that is higher than 1, tance due to the image currents. A diagram of the final capacitor an oscillation can occur. Fig. 12 shows the simulated result of bank and inductor layout is shown in Fig. 9. Fig. 10 shows the phase shift between the input and the output of the DVB-H simulated frequency response of the elliptic LPF. Maximum se- LNA. A phase shift of 360 is observed at 1.3 GHz where lectivity for the nominal process condition at 1.8 GHz is 78 dB. there is still voltage gain 1. To achieve a broadband impedance match while avoiding instability, a partial feedback topology is proposed. Fig. 13 shows B. Wideband Matching a simplified schematic of the proposed partial feedback ampli- Wideband input matching is often approached with a fier. There are two loops in the partial feedback amplifier—one common gate input circuit or a shunt-feedback configuration is a closed loop and the other is an open loop. The closed loop [18], [19]. But the common gate amplifier suffers from high can provide wideband input matching by (7) where is noise figure (NF) in a short channel CMOS design. The shunt the width of the transistor, is the loop gain of the amplifier, feedback can provide input impedance over a wide frequency is the feedback resistance, is the load resistance for

Fig. 14. Schematic diagram of the proposed differential amplifier with integrated LPF and partial feedback. the feedback loop, and is the transconductance of the input . It is also important that the ratio not be too large because device M1. The open loop gain is given by (8). we must provide enough loop gain for adequate input impedance matching. In this design, the ratio between and is chosen as 6:1. The loop gain is also a function of the value of which can also be increased for improved impedance matching. To reduce voltage drop across , a current-bleeding technique has (7) been employed at the load of M2 to allow a high load resistance. Care must be taken in the sizing such that the parasitic capac- (8) itances from the current-bleeding device and the load resistor should not limit the ability to cover the full UHF band. From (7) and (8), the ratio between loop gain and Fig. 14 shows the schematic of the integrated LPF combined can be chosen as the size ratio of transistor M4 and M2. As- with the partial feedback circuits. The two cascaded LPF stages suming the same DC gate bias voltage for M4 and M2, the cur- M3 and M4 are placed in the open loop while M1 and M2 are rent ratio, and hence the gain ratio, will be same as the width included in the partial feedback loop to provide wideband input ratio. This means that, to first order, the ratio between open loop impedance matching. The components M5, , and com- gain and closed loop gain is insensitive to process and temper- prise a self-biased current mirror. ature variations. The integrated LPF which we discussed in the previous sec- The noise of the cascode transistor does not normally appear tion is realized between M1, M3, and M4. Just as the ratio of at output [15] but it does in the partial feedback amplifier. The the impedances looking up into the sources of M2 and M4 is an low impedance at the source of M4 provides a path for the noise important design consideration, the value of is an impor- current of the cascode transistor M2. Because the gate tant design consideration as well. If the value of is chosen bias voltage is same for both M2 and M4, this allows the noise larger, the selectivity will be increased. But this also becomes a current from M2 to flow to the output at the ratio between the higher impedance in series with M4. This will reduce the desired source impedance of M2 and M4. In (9), is the noise signal level observed at the output of the amplifier in the pass- current of M2 at the output where is drain noise current band. So, this inductance should be chosen carefully, keeping in of M2 and is the transconductance of the transistors M2 and mind the tradeoff between the rejection and the NF. In the case M4: , the open loop and partial feedback paths do not intersect in the second stage of the elliptic filter. Therefore, can have relatively higher inductance and achieve a higher selectivity.

C. Gain Control Scheme and Isolation Switch Each LNA has six gain states with voltage gains of 25, 21, 15, 8, 24, and 36 dB, which are controlled by the AGC (9) in the digital baseband. To allow the best NF in the highest gain state, separate gain modes are implemented as a high gain The current at the output of the LNA is given by the ratio of (HG) amplifier and a low gain (LG) amplifier as is shown in M4 and M2. For improved gain and NF, it is better to have Fig. 15. This configuration also allows smooth temporal gain

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Fig. 15. Schematic diagram of the DVB-H LNA amplifier showing how the the high gain (HG) mode and low gain (LG) mode are connected. (input matching network is not shown). transitions without significant time domain phase discontinuities. Such phase discontinuities can be problematic in a phase modulated communication system. For the high gain mode, the low gain amplifier is turned off, while the opposite is true for the low gain mode. A simple resistive attenuator is used for the step attenuator [21]. The three highest gain states are implemented in the HG amplifier with the programmable gain (PG) attenuator at the output. The three lowest gain states are implemented in the LG amplifier by engaging the input PG attenuator. As the gain of the LNA is decreased, the relative attenuation requirements of the LPF are similarly decreased. So, in the LG amplifier, the first stage of the LPF is bypassed. Because of the large amount of attenuation required by the LG amplifier in the LG mode, it is possible for the input signal Fig. 16. Schematic diagram of the MediaFLO amplifier showing how the HG to leak from the LNA inputs to the outputs through the gate to mode and LG mode amplifier are connected. (input matching circuit is not source capacitance of the HG input transistors. To avoid this, a shown). set of switches are included to provide a low impedance path for any signal leakage that might occur. This effectively reduces the signal leakage through the HG path and allows the LG amplifier to provide necessary negative gain (attenuation).

D. MediaFLO LNA Fig. 16 shows the schematic diagram of the MediaFLO LNA. The MediaFLO LNA shares its input pin with DVB-H LNA and also shares the output transformer. So the overall transfer function of this LNA is reconﬁgurable between narrowband and wideband operation. Fig. 17. Photomicrograph of the proposed LNA. As shown in Fig. 1, two identical LNAs are assigned for the MediaFLO signal path to allow the removal of the switch in IV. MEASUREMENT RESULTS front of the LNA. The MediaFLO LNA uses an inductively de- The proposed LNA is designed as a building block of a re- generated cascode architecture [16]. The source degeneration ceiver which was fabricated with a 0.18 m CMOS process. The inductor is implemented using a package bond-wire. The input power supply used in this design is 2.1 V. Reliability studies in- transistor device size is chosen to lower the noise resistance dicated that this is a safe power supply voltage for this 0.18 m of the ampliﬁer. The procedure outlined in [7] and [18] process. The core area of the LNA occupies 1.5 mm , with is used to desensitize the NF dependence of the input matching dimensions 2.26 mm 0.66 mm. Fig. 17 shows the photomi- network. AGC operation is the same as with the DVB-H LNA. crograph of the fabricated LNA. All pins are ESD protected. Similarly to the DVB-H LNA design, a switch at the drain of the There are no LNA output pins in this fully integrated design, so HG input device provides a low impedance path for any signal the measurements are done through the entire receiver chain and leaking through the HG path when the LNA is in LG mode. de-embedded back to the LNA.

Fig. 22. Gain measurement result for the LNA in MediaFLO mode over all gain states. Fig. 18. Gain measurement result for LNA in DVB-H mode across all gain states.

Fig. 19. Plot showing LNA rejection measurement for 10 devices. Fig. 23. LNA input matching for the MediaFLO mode of operation.

Fig. 20. LNA input matching across the DVB-H band of operation. Fig. 24. NF measurement result for the MediaFLO LNA. Results were the same for each frequency measured within measurement accuracy capability.

TABLE II PERFORMANCE SUMMARY OF DVB-H AND MEDIAFLO LNA

highest gain mode. In Fig. 18, the dynamic range capability of the measurement apparatus limits the observable attenuation Fig. 21. NF measurement result for the DVB-H LNA. performance. For this reason, in Fig. 18, the full attenuation of the LG modes, which is better than the higher gain modes, Fig. 18 shows gain versus frequency for different gain is not shown. This limitation is overcome with Fig. 19 where modes in the DVB-H LNA. In-band voltage gain is 25 dB for the maximum rejection of 78 dB is measured at 1.8 GHz.

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TABLE III PERFORMANCE COMPARISON WITH SOME OTHER PREVIOUSLY REPORTED LNAS INCORPORATING NOTCH SELECTIVITY

The notch frequency is properly placed at 1.8 GHz. For this The novel partial feedback amplifier is proposed for input measurement, we placed an unwanted signal at , matching to avoid oscillation which may arise from feedback which is out-of-band at RF but such that would fall in-band combined with the LPF. The partial feedback amplifier utilizes at the downconverted baseband signal. We then compared a closed loop for input matching and an open loop for signal its downconverted product to that of the wanted signal at amplification. the LO frequency. The unwanted RF power level was set to The fabricated chip has 1.8 dB NF and a 25 dB voltage gain in 35 dBm. It was observed that there was no degradation of DVB-H mode (470–860 MHz) while consuming 22.5 mA from the wanted signal performance (such as gain compression) a 2.1 V supply voltage. The MediaFLO LNA has 1.5 dB NF and with this power level of the unwanted signal. Fig. 19 shows the 25 dB gain at 707–743 MHz while consuming 14.5 mA from a rejection measured at the notch frequency for 10 devices using 2.1 V supply voltage. different values of the programmable capacitor tuning bank to demonstrate the process variation correction capabilities ACKNOWLEDGMENT that are built into the LNA. As mentioned in Section III, a The authors would like to thank C. Bailey for layout sup- 2-bit capacitor tuning code is used to program the tank for port; M. Zeidan, R. Chen, and D. Carmichael for test support; this measurement. A tune code that can be programmed from G. Klemens for inductor design; H. Weissman and Z. Janosevic “00” to “11” can cover capacitor process variation of 15% to for system design support; B. Yang for capacitor tuner design; 15%. In Fig. 19, the capacitor tuning bank is only shown for and Y. Feng and J. Xiong for fruitful technical discussions. tuned code of “01” and “10”. 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[13] T. W. Kim and B. Kim, “A 13-dB IIP3 improved low-power CMOS Susanta Sengupta received the B.E. degree from RF programmable gain amplifier using differential circuit transconduc- BIT, Mesra, India, in 1998, and the M.Tech. degree tance linearization for various terrestrial mobile D-TV applications,” from IIT, Kharagpur, India, in 2000, and the Ph.D. IEEE J. Solid-State Circuits, vol. 41, no. 4, pp. 945–953, Apr. 2006. degree in electrical engineering from Georgia Tech, [14] J. Cabanillas, “Analysis of integrated transformers and its application to Atlanta, in 2004. RFIC,” Ph.D. dissertation, Universitat de Barcelona, Barcelona, Spain, Since then, he has been an RFIC Design Engineer Oct. 2002. with Qualcomm, Inc., Austin, TX. His research inter- [15] B. Razavi, Design of CMOS Analog Integrated Circuit. New York: ests include design of RF and analog circuits. McGraw-Hill, 1998. [16] D. Shaeffer and T. Lee, “A 1.5 V 1.5 GHz CMOS low noise amplifier,” IEEE J. Solid-State Circuits, vol. 32, no. 3, pp. 745–759, Mar. 1997. [17] G. Banerjee, K. Soumyanath, and D. J. Allstot, “Measurement and modeling errors in noise parameters of scaled-CMOS devices,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 6, Jun. 2006. [18] W. Zhuo, X. Li, S. Shekhar, S. Embabi, J. Pineda de Gyvez, D. Allstot, Kenneth Barnett (M’97) received the B.S.E.E. and and E. Sanchez-Sinencio, “A capacitor cross-coupled common-gate M.S.E.E. degrees from the Georgia Institute of Tech- low-noise amplifier,” IEEE Trans. Circuit Syst. II, vol. 52, no. 12, Dec. nology, Atlanta, GA, in 1990 and 1992, respectively. 2005. In 1992, he joined the Motorola Paging Products [19] B. Ko and K. Lee, “A new simultaneous noise and input power Group in Boynton Beach, FL. While there, he matching technique for monolithic LNA’s using cascode feedback,” helped develop small antenna structures for paging IEEE Trans. Microw. Theory Tech., vol. 45, no. 9, Sep. 1997. products; systems for range-finding and tracking for [20] S. Ramo, J. R. Whinnery, and T. Van Duzer, Fields and Waves in Com- location based paging systems using time of arrival munication Electronics. New York: Wiley, 1994. techniques; and low voltage, low power, low phase [21] B. Gilbert, “A low-noise wide-band variable-gain amplifier using an noise integrated VCOs for paging products. In 1999, interpolated ladder attenuator,” in IEEE ISSCC Dig. Tech. Papers, Feb. 1991, pp. 280–281. he joined Qualcomm, Inc., San Diego, CA. While [22] Mobile and Portable DVB-T Radio Access Interface Specification, there, he has worked on numerous projects related to highly integrated TX MBRAI, version 1.0. and RX chips for CDMA and WCDMA applications. In 2005, he opened a new RF/Analog design center for Qualcomm in Austin, TX. He is currently working on RF CMOS IC implementations for digital video standards such as MediaFLO, DVB-H, ISDB-T, and T-DMB. Tae Wook Kim (M’05) was born in 1974 in Korea. He received the B.S. degree in electrical engineering from Yonsei University, Seoul, Korea, in 2000, and the M.S. and Ph.D. degree from Korea Advanced In- James Jaffee (S’86–M’96) was born in Lido Beach, stitute of Science and Technology (KAIST), Daejeon, NY, in 1963. He received the B.S.E.E. degree in 1986 Korea, in 2002 and 2005, respectively. from the University of Florida where he worked as an From July 2002 to December 2005, he was with undergraduate assistant in the Lightning Laboratory. Integrant technology, Inc. (now Analog Devices), In 1986, he joined the Paging Products Group of where he developed CDMA/PCS mixers and LNA Motorola in Boynton Beach, FL, where he designed and CMOS mobile tuner IC. From January 2006 RF and analog circuits for Pagers. In 1990, he was to July 2007, he was with Qualcomm Inc., Austin, selected as a Motorola Distinguished Scholar and Texas, where he was involved with DVB-H and MediaFLO chip design. Since returned to the University of Florida where he con- September 2007, he has been with the School of Electrical and Electronics ducted research on RF BJT modeling and circuits, Engineering, Yonsei University, Seoul, Korea, where he is an Assistant Pro- receiving the M.S.E.E. degree in 1992. From 1992 fessor. His research interests are in microwave, RF, analog, and mixed-signal until 1996, he was with Motorola’s Applied Research Group investigating integrated circuits and system for wireless application. He has written several advanced BiCMOS process device modeling, direct conversion receivers and technical papers and holds 13 patents and 26 patents pending. low voltage RF and analog design circuits. In 1996, he joined Qualcomm in San Diego, CA. He has been designing and managing design teams for circuits used in cellular phones including transceiver circuits, PLLs, VCOs, mixers, filters, transmitters for multimode devices including CDMA, GSM, UMTS, Broadcast and AMPS, among others. He also has been the design team lead Harish Muthali received the B.S. degree in elec- on CAD and process improvements. He has authored several IEEE papers and tronics from University of Mysore, India, in 1992, holds several patents. He is currently a Director of Engineering. and the M.S. degree in electrical engineering from Arizona State University, Tempe, in 1995. He has been with Qualcomm, Austin, TX, since 2006 and has been designing RF front-end circuits for mobile TV receivers. Before joining Qualcomm, he was with Intel Corporation, where he worked on Pentium4 microprocessor, design of high-speed SERDES circuits and RF synthesizers. His interests are in low-power RF circuits and ADCs.

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