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Real-Time Digital Signal Processing Laboratory EE 445S Real-Time Digital Signal Processing Laboratory Prof. Brian L. Evans Dept. of Electrical and Computer Engineering The University of Texas at Austin Austin, TX 78712 [email protected] http://www.ece.utexas.edu/~bevans Spring 2014 Table of Contents 0. Introduction 20. Wireless OFDM Systems 1. Sinusoidal Generation 21. Spread Spectrum 2. Introduction to Digital Communications Signal Processors 22. Modern DSPs 3. Signals and Systems 23. Native Signal Processing 4. Sampling and Aliasing 24. Algorithm Interoperability 5. Finite Impulse Response 25. System-level Design Filters 26. Review for Midterm #2 6. Infinite Impulse Response Filters Handouts 7. Interpolation and Pulse A. Course Description Shaping B. Instructional Staff/Resources 8. Quantization C. Learning Resource Center D. Matlab 9. TMS320C6000 Digital E. Convolution Example Signal Processors (DSPs) F. Fundamental Theorem of 10. Data Conversion – Part I Linear Systems 11. Data Conversion – Part II G. Raised Cosine Pulse 12. Channel Impairments H. Modulation Example 13. Digital Pulse Amplitude I. Modulation Summary Modulation (PAM) J. Noise-Shaped Feedback 14. Matched Filtering K. Sample Quizzes L. Direct Sequence Spreading 15. Quadrature Amplitude M. Symbol Timing Recovery Modulation (QAM) N. Tapped Delay Line on C6700 Transmitter O. All-Pass Filters 16. QAM Receiver P. QAM vs. PAM 17. Fast Fourier Transform Q. Four Ways To Filter 18. DSL Modems R. Intro to Fourier Transforms 19. Analog Sinusoidal Mod. S. Adding Random Variables Italics means available on Web only at http://www.ece.utexas.edu/~bevans/courses/rtdsp EE445S Real-Time DSP Lab: Lecture & Lab This course is a four-credit course, with three hours of lecture and three hours of lab scheduled per week. For spring 2014, lecture will be held in ETC 5.148 on Mondays, Wednesdays, and Fridays from 11:00 am to 12:00 pm, beginning Jan. 13th and ending May 2nd. The laboratory sessions will be held in ENS 252B on Mondays, Tuesdays, Wednesdays, and Fridays from Jan. 21st to May 2nd. This course does not require a semester project nor does it have a final examination. Final grades will consist of pre-lab quizzes, laboratory reports, homework assignments and exams. Exams will be based on material covered in lecture, homework assignments, laboratory sessions and reading assignments. All lecture slides (13 MB) and the course reader (18 MB) are available for Spring 2014. For the first half of the semester, the weekly schedule of lecture and lab topics follows. Reading assignments are also given, where JSK means Johnson, Sethares and Klein, Software Receiver Design, and WWM means Welch, Wright and Morrow, Real-Time Digital Signal Processing. Monday Wednesday Week Friday Lecture Lab Reading Lecture Lecture Wednesday: JSK ch. 1 Jan. Sinusoidal Introduction Introduction NONE Friday: JSK 2.1-2.7 13th Generation Reader handouts A-D & R DR. MARTIN Discussion of Tuesday: Pre-lab Reading Jan. Sinusoidal Introduction LUTHER homework #0 Wednesday: JSK 2.8-2.16 20th Generation - Tools KING DAY solutions Friday: JSK 3.1-3.4 Monday: Pre-lab Quiz Discussion of Wednesday: JSK 3.5-3.8 and Jan. Signals and Signals and Sine Wave homework #1 app. A.2, A.4, G.1 & G.2 27th Systems Systems Generation solutions Friday: JSK 4.1-4.6, and Reader handouts E & F Finite Impulse Discussion of Feb. Finite Impulse Sine Wave Monday: JSK 7.1-7.2 Response homework #2 3rd Response Filters Generation Wednesday: JSK app. F Filters solutions Finite Impulse Introduction to Feb. Finite Impulse Digital Monday: Pre-lab Quiz Response Digital Signal 10th Response Filters Filters Friday: Reader handout N Filters Processors (DSPs) Feb. Introduction to Infinite Impulse Infinite Impulse Digital Wednesday: Reader handout 17th DSPs Response Filters Response Filters Filters O Feb. Discussion of Infinite Impulse Infinite Impulse Digital Friday: JSK 5.1-5.2, 6.1-6.3 24th homework #3 Response Filters Response Filters Filters and A.3; Reader handout H Mar. Sampling and Sampling and Digital Midterm #1 Monday: JSK 6.4 3rd Aliasing Aliasing Filters For the second half of the semester, the weekly schedule of lecture and lab topics follows. Monday Wednesday Friday Week Lab Reading Lecture Lecture Lecture Monday: Pre-lab Quiz Interpolation Interpolation Discussion Mar. Data Wednesday: JSK 5.3-5.4, 8.1-8.5, and and Pulse and Pulse of midterm 17th Scramblers Reader handout I Shaping Shaping #1 solutions Friday: JSK 9.1-9.4 and app. B & E Monday: Pre-lab Quiz Digital Pulse Discussion Pulse Mar. Channel Wednesday: JSK 11.1-11.6 and app. C Amplitude of homework Amplitude 24th Impairments Friday: JSK 10.1-10.4, and Reader Modulation #4 solutions Modulation handout M & S Digital Pulse Discussion Pulse Monday: JSK 13.1-13.3 Mar. Matched Amplitude of homework Amplitude Wednesday: JSK 12.1-12.4 31st Filtering Modulation #5 solutions Modulation Friday: JSK 16.1-16.2 Pulse Monday: JSK 16.3-16.6 Apr. Matched Matched Matched Amplitude Wednesday: JSK 16.7-16.11 7th Filtering Filtering Filtering Modulation Friday: Reader handout P Quadrature Apr. QAM QAM QAM Amplitude Monday: Pre-lab Quiz 14th Transmitter Transmitter Receiver Modulation Quadrature Apr. Data Monday: Reader handout J Quantization Quantization Amplitude 21st Conversion Friday: JSK ch. 7 & app. D Modulation Apr. Data Guitar Special Review Midterm #2 Monday: Pre-lab Quiz 28th Conversion Effects The following lectures are not scheduled to be presented this semester: TMS320C6000 DSP Advanced Data Conversion Fast Fourier Transform DSL Modems Analog Sinusoidal Modulation Wireless OFDM Systems WiMAX Spread Spectrum Communications Modern DSP Processors Native Signal Processing Algorithm Interoperability System-level Design Synchronization in ADSL Modems Wireless 1000x EE445S Real-Time Digital Signal Processing Laboratory - Overview Prof. Brian L. Evans This undergraduate elective is an introduction to the analysis, design, and implementation of embedded real-time digital signal processing systems. "Real-time" means guaranteed delivery of data by a certain time. "Embedded" means that the subsystem performs behind-the-scenes tasks within a larger system. These tasks are often tailored to an application, e.g. speech compression/decompression for a cell phone. Traditionally, users do not directly interact with the embedded systems in the product. For example, a modern cell phone contains several embedded systems, including processors, memory systems, and input/output systems, but the user interacts with the cell phone through the touchscreen and/or voice commands. As another example, a PC contains several embedded digital systems, including the disk drive, CD/DVD player, video processor, and wireless LAN system. Embedded systems range from a system-on-chip to a board to a rack of computing engines to a distributed network of computing engines. The application space for embedded systems includes control, communication, networking, signal processing, and instrumentation. High-volume products in units shipped worldwide in 2012 include 1750M cell phones 350M PCs/laptops 115M DVD/Blu-ray players 100M digital still cameras 75M DSL/VDSL modems 70M cars/light trucks 34M video game consoles High-end cars now have more than 150 embedded processors in them. More than two billion products are sold each year with multiple embedded digital signal processing systems in them. In fact, there are more embedded programmable processors in the world than people. Texas is a worldwide epicenter for microprocessors for control, signal processing, and communication systems. In 2007, Texas Instruments (Dallas, TX) and Freescale (Austin, TX) have 64% and 12%, respectively, of the $8B embedded programmable digital signal processor market. Their digital signal processors were developed, and are still being developed, in Texas. Near three-fourths of all digital signal processors are used in wireless systems for both cellular and data networks. Texas Instruments and Freescale are also market leaders in the embedded programmable microcontroller market, esp. for the automotive sector. In addition, Qualcomm and Cirrus Logic have developed several generations of programmable digital signal processors in Austin, Texas, for cell phones and audio systems, respectively. To boot, Austin is a worldwide leader in ARM-based digital VLSI design centers. Through this undergraduate elective, I hope that students gain an intuitive feel for basic discrete-time signal processing concepts and how to translate these concepts into real-time software using digital signal processor technology. The course will review some of the mathematical foundations of the course material, but emphasize the qualitative concepts. The qualitative concepts are reinforced by hands-on laboratory work and homework assignments. In the laboratory and lecture, the course will cover digital signal processing: signals, sampling, filtering, quantization, oversampling, noise shaping, and data converters. digital communications: Analog/digital modulation, analog/digital demodulation, pulse shaping, pseudo-noise sequences, ADSL transceivers, and wireless LAN transceivers. digital signal processor architectures: Harvard architecture, special addressing modes, parallel instructions, pipelining, real-time programming, and modern digital signal processor architectures. In particular, we will discuss design tradeoffs between implementation complexity and signal quality/communication performance. In the laboratory component, students implement transceiver subsystems in C on a Texas Instruments TMS320C6748
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