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. b

NASA Technical Memorandum 86793

Highly Integrated Digital Electronic Control - Digital Flight Control, Model Identi- fication and Adaptive Engine Control

Jennifer L. Baer-Riedhart and Robert J. Landy

(BASA-TH-86793) EIGHLP IYTEGEATEC DIGITAL 887-226 19 ELECIROBIC CC IFlfCL: DIGITAL ELIGBI COhiTRCL, Al&CFiAPT RCDEL lGENT~FICA!IICb, AYD ADAPTIVB EIGXIIE CCHTBGZ (AASA) 16 F. Avail: NTfS Unclas LC A02/HP ibOl CSCL 21E Hl/07 0076753

March 1987

National Aeronautics and Space Administration NASA Technical Memorandum. 86793

Highly Integrated Digital Electronic Control - Digital Flight Control, Aircraft Model Identifi- cation and Adaptive Engine Control

Jennifer L. Baer-Reidhart Ames Research Center, Dryden Flight Research Facility, Edwards, California Robert J. Landy McDonnell Aircraft Company, St. Louis, Missouri

National Aeronautics and Space Administration Ames Research Center Dryden Flight Research Facility Edwards, California 93523 - 5000 Highly Integrated Digital Electronic Control - Digital Flight Control, Aircraft Model Identification, and Adaptive Engine Control

Jennifer L. Baer-Riedhart NASA Ames Research Center, Dryden Flight Research Facility, Edwards, California 93523-5000

and

Robert J. Landy b McDonnell Aircraft Company, St. Louis , Missouri

ABSTRACT Center's Dryden Flight Research Facility initiated the highly integrated digital electronic control The highly integrated digital electronic con- (HIDEC) program. McDonnell Aircraft Company trol (HIDEC) program at NASA Ames Research Center, (MCAIR) is the prime contractor, with Pratt & Dryden Flight Research Facility is a multiphase Whi tney Aircraft (PWA) and Lear Siegler Incor- flight research program to quantify the benefits porated (LSI) as major subcontractors. The test of promising integrated control systems. McDonnell aircraft is an F-15, modified for installation of Aircraft Company is the prime contractor, with digital flight and engine control systems. The United Pratt R Whitney, and Lear objectives of the program are to design, imple- Siegler Incorporated as major subcontractors. ment , and flight-test selected integrated flight/ control modes which promise significant The NASA F-15A testbed aircraft was modified improvements in aircraft performance. for the HIDEC program by installing a digital elec- tronic flight control system (DEFCS) and replacing The HIDEC program is divided into five phases. the standard FlOO (Arab 3) enyines with FlOO engine These phases and the program schedule are shown nodel derivative (EMD) engines equipped with digl- in Fig. 1. Phase 1 of the HIDEC program involves tal electronic engine controls (DEEC), and integra- the flight testing of the digital electronic ting the DEEC's and DEFCS. The modified aircraft flight control system (DEFCS) in the NASA F-15 provides the capability for testing many integra- . The DEFCS consists of a higher-order- ted control modes involving the flight controls, language digital flight control computer and two engine controls, and inlet controls. modified control augmentation system (CAS) analog computers used for sensor and actuator interface. This paper focuses on the first two phases of As part of phase 1, the DEFCS software is pro- the HInEC program. which are the digital flight grammed to provide a "flutter exciter" function control systemlaircraft model identification that enables the pilot to select precise fre- (DEFCVAMI) phase and the adaptive engine con- quency sweep and dwell inputs to the horizontal trol system (ADECS) phase. tails. This feature allows the acquisition of data for improving the mathematical models of INTRODUCTION flight control components and aircraft rigid and structural modes. Diyital electronic controls in new aircraft enhance vehicle preformance by providing a means Phase 2 of HIDEC, called the adaptive engine of integrating the flight and propulsion control control system (ADECS, Ref. l), consists of the systems. Substantial benefits are gained by design, implementation, and flight testing of an exploiting the additional control devices avail- integrated flight and propulsion control mode. able through digital controls on advanced design This mode uses flight control information to aircraft. These devices include symmetrical and uptrim the engine pressure ratio for improved differentially variable canards, variable leading- engine performance. Phase 3 of the program will and trailing-edge flaps, varidble geometry inlets, consist of the development and evaluation of two-dimensional thrust vectoring and reversing selected trajectory guidance algorithms. The nozzles, and other control variables associated algorithms will be tested with and without the with variable cycle engines. The complexity ADECS features. Additional ADECS modes and involved in the integration of these systems enhancements to the basic features will be devel- is governed by the digital logic. The integra- oped and tested during phase 4 of the HIDEC pro- tion of these systems enhances aircraft maneuver- gram. Phase 5 will involve efforts in the area of ability, improves trajectory control for terrain performance-seeking controls with the integration following, terrain avoidance, and weapon delivery, of the aircraft inlets to the engine and flight and shortens takeoff and landing distances. control systems. This paper concentrates on Energy management techniques, when combined phases 1 and 2 of the HIDEC program, and includes with trajectory control, can result in signif- discussions on the ADECS control system design. icant fuel and cost savings. the computational architecture, the developmental testing, the built-in-test and in-flight integrity To devplop and demonstrat? Integrated , and the plans for the flight and propul si on techno1 ogy , NASA Ames Research tests included in these two phases. Projections for engine performance improvements MCAIR McDonnel Aircraft Company during the HIDEC program are contained in Ref. 1 and 2. MUX mu1 ti plex

NOMENCLATURE NC I navigation control indicator

A DC N1 engine fan speed

ADECS adaptive engine control system N1C2 engine fan speed, corrected to engine inl et cond iti ons All I aircraft model identification N1/fi engine fan speed, corrected AS alternate shape, AKI excitation a- lateral acceleration nY A(w) amplitude, waveform frequency n2 normal acceleration HIT hui 1 t-in test b P pitch CAS computer B UC hyd rome hanical backup engine control programmable asynchronous serial com- CAS controi augmentation system PA SC OT mun icat i on transl ator cc central computer PC D pitch CAS defeat c ID Correct on indicator display PLA power lever angle CP cockpit PSC performance-seeki ng controls UEEC digital electronic engine control PT 2 fan inlet total pressure UtFCS digital electronic flight control system PTZ. 5 fan discharge total pressure DFCC digital flight control computer PT 6 turbine discharge total pressure EIlU engine model derivative PWA Pratt 8 Whitney Aircraft E PR engine pressure ratio P roll rate EPRc' engine pressure ratio command q pitch rate EPRp engine pressure ratio, predicted 9 pitch rate change FFT fast Fourier transform RF radio frequency

F1 at lateral stick force RMDU remote multiplex/demultiplex unit

FI ong longitudinal stick. force R/Y rolllyaw CAS computer

F PR fan pressure ratio r yaw rate

Frud pedal force STF -F CL software test facil ity-flight control lab

FTIT fan turbine inlet temperature Tamb ambient temperature e FTITca fan turbine inlet temperature conmand TH/ E NG /engine

HIDEC highly integrated digital electronic TRAJ t r aj ec tory control t time H009 data bus nomenclature UART universal asynchronous receiver/ HUD head-up display transmitter data bus

IFIll in-flight integrity management v &V verification and validation

INS inertial navigation set Wac engine airflow, corrected

i AMI command 2 engine airflow, corrected to engine inlet

LS I Lear Siegler Incorporated Wrap wraparound software logic

2 anyle of attack microprocessor with 490 kops and 26K memory, and four channels for communication; (2) MIL-STD-1553A angle of attack predi c ted multiplex interface; (3) PASCAL as the higher- order language; and (4) hardware that enables the angle of sidesl P system to be reconfigured as a triplex, quadru- plex, or dual-dual system. angle of sidesl p, predicted A significant feature for HIDEC is the higher- order-language compatibility which enables cost- deflection effective programming of the DFCC for the subse- quent HIDEC phases. rudder deflection The execution of the DFCC executive program, change input-output program, and flight control laws takes approximately one-half of the 12.5-msec duty frequency cycle time and only about one quarter of the avail- able memory. Thus there is ample cycle time and AIRCRAFT DESCRIPTION memory available to accomplish integrated control law calculations in the DFCC for the HIDEC phases. The test vehicle for this program is an F-15 airplane. modified with a digital electronic Engine flight control system (DEFCS). The airplane is a high-performance. twin-engine fighter capable of The FlOO END engine (Ref. 3) is an upgraded speeds to Mach 2.5. The engine inlets are of the version of the FlDO-PW-100 engine that currently two-dimensional external compression type with powers the production F-15 . The engine three raiips, and feature variable capture area. is built by Pratt 8 Whitney Aircraft and has a The F-15 airplane is powered by two FlOO engine company designation of PW 1128. The engine model derivative (EMD) afterburning incorporates a redesigned fan, revised compres- engines equipped with digital electronic engine sor and combustor, single crystal turbine blades controls (DEEC). and vanes, a 16-segment augmentor with 1 ight-off detector, and a DEEC. Digital Electronic Flight Control System The DEEC is a full-authority digital control The DEFCS hardware consists of a four-channel with an integral hydromechanical backup control. digital flight control computer (DFCC) and two The DEEC controls the gas generator and augmentor modified control augmentation system analog com- fuel flows, the compressor bleeds, the variable pitters. The digital system features digital micro- inlet guide vanes, the variable stators, and the processors for decreased volume and reduced cost, variable exhaust nozzle. It incorporates logic para1 1 el processing architecture for increased that provides closed-loop control of engine air- throughput, and higher-order language for better flow and engine pressure ratio (EPR), limits the proyramning efficiency and maintainability. The fan turbine inlet temperature (FTIT), and is capa- higher-order language currently used for the DFCC able of accepting inputs from the airplane and the is PASCAL. Two channels in the DFCC contain the many engine sensors. lore detailed information on redundant pitch control laws, while the other two the DEEC is given in Ref. 4. channels contain the redundant roll and yaw flight control laws. The modified analog computers pro- HIDEC PHILOSOPHY vide the interface with the onboard sensors and actuators. The digital system emulates the analog The primary objective of the HIDEC program is F-15 control augmentation system (CAS) so that the to demonstrate and evaluate the improvements in handling qualities are identical to those of a performance and mission effectiveness resulting standard F-15 airplane. from engine/ control integration. The approach was to implement integrated engine/ The architecture is shown in Fig. 2. airframe control modes on the F-15 airplane, con'- The programmable asynchronous serial communication centrating on the areas of adaptive engine control translator (PASCOT) was installed in the aircraft system modes and trajectory guidance modes. A key to allow an interchange of information between the element of the HIDEC program philosophy was to three mu1 tiplex buses: the aircraft standard HD09 provide a cost-effective demonstration of inte- hus on which the central computer (CC) communi- grated control s techno1 ogy. This meant construc- cates with peripherals such as the inertial navi- ting a demonstrator aircraft on which gation system (INS) and the air data computer, the the latest digital technologies could be imple- UART serial bus that transfers data from the DEEC mented and evaluated efficiently. Implementation engines (implemented during the ADECS phase), and of the proposed control modes was achieved in a the 1553A bus on which the DFCC and the instrumen- cost-effective manner through the use of tech- tation system communicate. The PASCOT permits nologies developed for the digital flight control both OEFCS and CC data to be sent to the onboard system and digital engine controls. The digital instrumentation system for recording, and for implementation provides both a direct interface telemetering to ground receivers for real-time with other digital avionics systems and the con- ~.ionitorinyand postflight data processing. putational capability required to flight test integrated flight and propulsion control modes. The key features of the DEFCS are (1) the digital flight control computer, a 28002 16-bit

3 Another key element in the HIDEC program program, with additional flight evaluations per- philosophy was the reduction of past social prej- formed in a cooperative effort between the Air udices, thus allowing the demonstration of more Force and MCAIR. The test phase consisted of complex control system integration between the pilot evaluations of the airplane and data anal- airframe and propulsion components. The prej- ysis that compared the DEFCS operation with the utlices arc! based on the reluctance to implement analog CAS. major engine control modes in the aircraft com- puters. The major components of the HIDEC system The NASA F-15 airplane was flown with the are existing hardware ("hardware of convenience") DEFCS during February and March 1985. On six that contain a limited redundancy level. There- dedicated flights flown by three different NASA fore, the architecture and system operation are test pilots, the DEFCS was tested throughout the based on a "fail-off/fail-safe" philosophy. This current F-15 envelope. The test maneuvers designed means that in case of major failures of the HIDEC to thoroughly check aircraft flying qualities were modes or hardware, the operatins system would formation flying, touch-and-go and single engine revert to the standard aircraft (non-HIDEC) waveoffs. Unanimous pilot opinion concluded that modes or the basic mechanical systems. the F-15 aircraft handling qualities with DEFCS installed were the same as an F-15 with the stand- For the HIDEC program, critical engine control ard analog control augmentation system (CAS), with parameters, such as engine pressure ratio, are the exception that roll response and formation commanded from the flight contrcjl computer. In flying were somewhat improved relative to using later phases, additionai engine parameters such the analog CAS. as airflow and fan turbine inlet temperature also will be commanded from the flight control com- Aircraft model identification. One of the main puter. The logic for generating these commands concerns in the design of advanced aircraft is that is programmed in a dual redundant fail-off manner of accurately modeling the aircraft rigid body and in the flight control computers. In the failed structural modes, and flight contol components situation, the engine returns to standard DEEC (actuators, sensors). In the design of control control operation. The DEEC itself contains pro- systems for statically unstable aircraft. the area tection from excessive commands that could result of actuator and structural mode modeling accuracy from a flight control computer failure or from is crucial. interface wiring failures. The successful testing of the HIDEC/ADECS phase will reinforce the signi- The most desirable method of constructing and ficant performance gains that can be realized with verifying math models is to compare the model the more complex control system integrations with- response with that obtained in flight. This was out the extensive redundancy levels. done previously by equipping an aircraft with "flutter exciter" hardware, obtaining flight HIDEC TEST PHASES test data, and reducing it by using fast Fourier transform (FFT) techniques to obtain frequency The current HIDEC program consists of five responses of aircraft and actuator performance. test phases. Phase 1 of the program concentrated This flutter exciter hardware is typically quite primarily on the installation and evaluation of expensive because it must be custom designed for the digital flight control system in the F-15 each particular aircraft instal 1 ation. A1 so, airplane and an aircraft model identification once designed and installed, the hardware has (AMI) flight test series. Phase 2 involves the very limited flexibility in changing the type development and flight test of the adaptive engine of excitation. Conversely, incorporation of a control system (ADECS) modes. The development, flutter exciter function in the flight control implementation, and flight test of the trajectory system software is relatively inexpensive because guidance control laws and associated aircraft mod- no additional hardware is needed. It is also very ifications are primary in phase 3 of the HIDEC flexible because additional types of excitations program. Phase 4 involves the development and can be programed easily. flight test of enhanced ADECS modes, coupled with the trajectory guidance work from phase 3. For the preceding reasons, the HIDEC program Performance-seeking control s development and extended the DEFCS phase 1 testing to include the flight test evaluation constitute phase 5 of the aircraft model identification (AMI) tests. These program. During the course of the various program tests demonstrated the concept of obtaining ground phases, the F-15 airplane and supporting systems and flight te'st data for improved modeling accuracy will be modified into a faci1:ty testbed available by adding a software module to the digital flight for other integration-type experiments and related control computer. The method used for the AMI developmental activities. The remainder of this flight tests is summarized in Fig. 3. The AMI paper wi 11 concentrate on the activities involved method is functionally similar to flutter exciters in phases 1 and 2 of the program. implemented previously in hardware on the F-15 and F-18 airplanes. For the HIDEC/AMI application, Phase I - Digital Electronic Flight Control sinusoidal commands are issued to the collective Sys tem/Ai rcraft Model Ident ification (DEFCS/AMI ) horizontal . As indicated in Fig. 3, the AMI exciter module is one of several DFCC Digital electronic flight control system. modules containing the menu select logic, the The DEFCS fliaht test DhaSe verjfied the ooeration fade-in circuitry. limiters, and an automatic of the digitai flight iontrol system in the NASA disengage function. The resulting AMI excitation F-15 airplane and expanded the DEFCS flight enve- is input to the flight control laws immediately lope to that required for the HIDEC program. The before issuing a stabilator deflection command to DEFCS system had previously flown under a McDonnell the stabilator series servos. Aircraft Company (MCAIR) research and development

4 Figure 4 shows the HIDEC/AMI crew station con- the FTIT limit to prevent reduction in engine life, figuration. A control panel was added to select which results from the engine being operated above the AMI mode and to defeat the pitch CAS when the FTIT limit. desired. Two destination locations in the stand- ard F-15 navigation control indicator (NCI) are !

5 select the engine(s) - left, right, or both - to 4. validate the receive the ADECS command(s), and to select the a. ADECS control laws AUECS mode and the submodes (EPR, or a combination b. safety features of EPR and FTIT) for a particular test sequence. c. couple/uncouple criteria, Data entry locations through the NCI Panel are provided to initiate BIT'S and to enter revised 5. resolve any throughput timing problems. ADECS data for use in the DFCC. There are four destination entries in the NC! converted to select The integration testing identifies and eliminates revised ADECS parameter data from stored values in most of the HIDEC system interface problems. the DFCC, providing great flexibility for the flight test experiments. The HCAIR manned simulation facility is used as part of the V&V testing following the integra- The upfront panel displays ADECS system tion testing in the STF/FCL. The manned simula- coupling, IFIM failure, and automatic commands tion facility provides a 20-ft dome for scenic destination(s) - to the engine control (TH/ENG), projections and a higher fidelity simulation with or to the flight control system, or to both. The a simulated F-15 crew station. The major HIDEC couple command button is on the throttle lever and hardware components (DFCC, CAS computers, PASCOT, the emergency disconnect for the system is through CC, NCI, and HIDEC panels) are included in the the paddle switch on the control stick. manned simulation tests for a final certification of the HIDEC system before delivery to the air- ADECS verification and Val idaiion process. The craft. The iiiDEC manned simulation testing dia- ADECS phase of the HIUEC program entails software gram is shown in Fig. 11. The CYBER computer con- additions and modifications to both the airframe nected with the facility allows higher fidelity computers (digital flight control computer and models of the aircraft, aircraft sensors, engine, central computer) and to the DEEC computer. The DEEC, and inlets to be used than was possible in modifications to these systems were thoroughly the STF-FCL simulation. The objectives of the verified and validated prior to flight. This manned hardware-in-the-loop simulation are section describes the key elements of the veri- as follows: fication and validation (VA'J) process before installation of the equipment on the aircraft. 1. verify proper operation of the ADECS It also describes the built-in test (BIT) and control laws under realistic pilot in-fl ight-integrity management (IFIM) features inputs throughout flight envelope, for installed monitoring and checkout of the HIDEC system operation. 2. verify proper operatton and suitability of ADECS safety features, The DFCC, CC, and DEEC computers all undergo individual module testing and module integration 3. familiarize the pilot with the ADECS tests. These verify that the code is programmed control functions, correctly to compute the appropriate variables and logic, and that all interfaces between modules are 4. assess ADECS performance benefits. correct. The modual testing establishes the mem- ory and throughput (duty cycle time) requirements Testing in the manned simulation facility is for each computer. the final step in the V&V process before delivery of the hardware to the aircraft. At the close of The next step in the VAV process is the HIDEC these tests the software is "frozen" in its con- system integration testing. The DEEC controllers figuration. Any changes to the flight-critical are tested with the PASCOT multiplex bus control software after completion of the manned simulation iinit to verify the proper interfaces so that the tests may require a retest in the manned simula- aircraft computer (DFCC) can exchange information tion facility for certification. with and issue commands to the DEEC's. The remainder of the HIDEC equipment is tested as a ADECS ground test, maintenance functions, and system at the MCAIR software test facil ity-fl ight bui 1 t-in-tests. Once the HIDEC equipment is control lab (STF-FCL). The test configuration is 7nstaIled on the aircraft. tests must be performed illustrated in Fig. 10 and includes the DFCC, CC, to determine if it is functioning properly. The PASCOT, control panels, and NCI. Models of the tests are required for checkout following equip- aircraft. atmosohere. enaine. DEEC. and inlets ment installation or some system anomaly, and as reside in t e host HARRIS computer: The objec- an automatic preflight test. tives of th s integration test are as follows: To satisfy the need for the manually run tests 1. val date CC, PASCOT, DFCC, indicator following initial installation, a ground test 1 yhts and control ?anel interfaces, function and a maintenance function are incor- porated in the HIDEC system DFCC and CC software. 2. Val date 1553 & H009 nux bus operation, The ground test function allows the ADECS software to be operated on the ground and EPR uptrim sig- 3. Val date use of the NCI to nals sent to the DEEC. The proper functioning a. select different gains of the HIDEC system can be assessed by monitoring b. read memory locations system variables using mux monitors and instrumen- C. perform diagnostic maintenance func- tation system outputs. Using the NCI panel key- tions board and display, the maintenance function allows d. select yround test mode access to CC and DFCC selected memory locations e. select avionic preflight BIT for altering them and reading data from the DFCC f. display failed preflight test nwioer, and CC for troubleshooting. For the ADECS flight

6 phase, this function also allows various parame- ADECS fli hts. The flight test consists of ters and schedules to be selected, and access to both- g acce erations, and selected flight test the DFCC and CC for verification of the software maneuvers for evaluating the system between 10,000 version and checksums. and 40,000 ft altitudes at speeds ranging between Mach 0.3 and 2.0. Hore detailed information The built-in tests can be initiated before regarding the predicted performance of the each test flight to automatically check the fol- HIDEC modes is in Refs. 1 and 2. lowing: PASCDT-initiated BIT, DFCC/PASCOT/CC MUX interface, DFCC power-up BIT, ADC validity, INS Future plans for the HIDEC program involve validity, DFCC/PASCOT/DEEC MUX interface, and DEEC research in the area of trajectory guidance. The power-up BIT. further development and evaluation of selected guidance algorlthms, such as optimal guidance, ADECS in-fl ight integrity management/coupl inq optimal interception, energy management (minimum criteria. The HIDEC system, in the ADECS mode, time/minimum fuel ), and maneuver autopi lot tech- iI nust pass an extensive set of IFIM tests and niques will aid in the evaluation of the ADECS coupl ing criteria before a1 lowing commands to modes. The algorithms will be evaluated in the pass from the aircraft DFCC to the (DEEC). The manual mode and automatic mode, with and without IFIM tests and coupling criteria logic are active the ADECS modes, and will provide additional t whenever the HIDEC system is on and the modes are information on the benefits of engine/airframe coupled. The following IFIM checks must be passed integration technology. The HIDEC F-15 aircraft before a1 lowing coupl ing between the DFCC and DEEC: will provide a test facility for developing and evaluating the trajectory guidance algorithms 1. DEFCS self checks, using a ground-based computer and sending the com- mand information to the aircraft, with the poten- 2. Central computer self checks, tial of transferring the final algorithms to an onboard auxiliary airborne computer. Performance- 3. H009 multiplex bus checks, seeking controls and advanced ADECS modes to be developed are discussed in Ref. 1. 4. PASCOT self checks, CONCLUDING REMARKS 5. 1553 multiplex bus checks, The objective of tile HIDEC program is to demon- 6. DEEC self checks strate and evaluate the improvements in perform- a. critical failure indications ance and mission effectiveness resulting from b. fault indicators, engine/airframe control integration. The approach uses the technologies being developed in the areas 7. Wraparound cross checks of digital flight control systems and digital a. DFCC/PASCOT/CC engine controls to implement integrated engine/ b. DFCC/PASCOT/DEEC/CC airframe control modes. The program philosophy and course of action have been successful in To allow coupling between the DFCC and DEEC developing an integrated engine/airframe test for the ADECS modes, the following criteria must program in a cost-effective manner. be met: Phase 1 testing of the digital flight control 1. correct control panel switches are system developed the basic HIDEC architecture and initiated, evaluated the operation of the DEFCS in the NASA F-15 airplane. The tests Were successful, with no 2. more than one second has passed after major differences noted between the digital flight switch initiation. control system and the standard F-15 analog CAS system. The aircraft model identification flight 3. throttle couple button is depressed each tests provide airframe aeroservoelastic flight time ADECS mode couple is desired, data to compare with math models by using a "soft- ware excltation system" to excite the airplane 4. no HIDEC system IFIM faults are indicated, structural modes.

5.. no aircraft system faults are indicated, Phase 2 testing concentrates on the ADECS con- trol modes. The development of the control modes 6. aircraft angle of attack is within spec- and logic demonstrates the integration necessary ified limits, between the airframe and propulsion systems. The verification and validation process involves indi- 7. landing-gear-up discrete is present (or vidual module testing. module integration testing, simulated), and hardware bench integration tests culminating in the manned hardware-in-the-loop simulation 8. wraparound multiplex channels are tests. The BIT and IFIN features provide a means opera t ing . of checking the integrity of the various HIDEC systems both on the ground and In flight, before The checks are verified as operational during and during HIDEC mode operations. Final valida- the ground tests on the aircraft following HIDEC tion of the HIDEC systems is performed during equipment installation. Certain subsets of these the aircraft ground tests, to be followed by tests are checked before each flight using the the flight tests. built-in test function described earlier.

7 The NASA F-15 aircraft is being developed as a ZYonke, W. A., Terrell, L. A., and Myers, L. P., national facil ity "test-bed'' for fl ight and pro- "Integrated F1 ight/Propulsion Control : Adaptive pulsion integration and related experiments. The Engine Control System Mode," AIAA Paper 85-1425, architecture and techniques developed during the July 1985. HIDEC program will provide the flexibility to allow generic research to be conducted in the 3Myers, L. P. and Burcham, F. W., Jr., "Preliminary engine/airfraiie integration technology area. Flight Test Results Of the FlOO EM0 Engine in an F-15 Airplane," AIAA Paper 84-1332, June 1984. REFERENCES 4Burcham, F. W., Jr., Flyers, L. p., and Walsh, IPutnam, T. W., Burcham, F. W., Jr., Andries, M. K. R., "Flight Evaluation of a Digital Electronic G., and Kelly, J. B., "Performance Improvements of Engine control system in an F-15 Airplane," J. of a Highly Integrated Digital Electronic Control Aircraft, Vol. 22, No. 12, Dec. 1985, pp. 1072-1078. System for an F-15 Airplane," NASA TM-86748, 1985.

2 ADECS Development____ ~ ______

ADECS Flight Test ______~ ______3 Trajec!wy Guidznce Deve!opment Trajectory Guidance Flight Test _____

Fig. I. HIDEC program schedule.

I F-15 Horizontal Air Data Indicator

Attitude Direction Indicator

Modified Flight Actuators Control Computer Digital Flight System

Flight Control Sensors

3 aAdded equipment A NASA lurnlshed Moditled equipment A PgWA furnished

Fig. 2. HIDEC ADECS avionics architecture.

8 SOFTWARE AMI EXCITER IN DFCC FUNCTIONALLY SIMILAR TO EXISTING F-15 AND FIA-18 HARDWARE FLUTTER EXCITERS PITCH AXIS ONLY (CO‘LLECTIVE STABILATORS) FREQUENCY SWEEP AND DWELL TESTS CONTROLLED BY PILOT (0.5 TO 20 Hz)

DFCC HIDEC SOFTWARE AMI EXCITER MODULE

LIMITED CAS COMMAND TO SERIES SERVOS PILOT 110- AMI CONTROL LOGIC FADE-IN CIRCUIT AUTOMATIC DISENGAGE AMPLITUDE MENU SELECT LOGIC LIMIT EXCITATION OPTIONS: ! i =A(w).K.SINwt

K = SCALE

AkRFREQUENCY - I

Fig. 3. Aircmft model identification.

.

9 Fan Pressure P EPA Ratio

62% N, . Corrected Flow OI.1om112

Fig. 5. Adaptive engine controt system, subsonic uptrim.

PIWA 1128 ENQINE AND DEEC

MAX STABILITY FPR a AND 8 EFFECTS USABLE STALL MARGIN 1 TRANSFORM STALL MARGIN FOR EPR I MAX PERFORMANCE EPR I NlC2. PT2. EPR. WAC2 v- ~

Fig. 6. Adaptive ens.ine control system, subsonic EPR uptrh.

.

10 1 INSlADC cc NCI Displays

Bus HIDEC. * PWA 1128 PLA Control Panel PASCOT DEEC c Onloft I 4- EngineslBUC Engine Select A PLA Serial Data Bus Mode Select I553 - Upfront Panel Warning Lights Mode Lights Couple Lights DFCC Flight Control c Stick Coupling Uplink Instrumentalion

Computer Computer Cockpit

Throttle Mechanical Mechanical Control Flight Control Position Control Couple Command Switch

Fig. 7. HIDE system architecture, ADECS modes.

PASCDT I . ... 2- '._I__. - MWL. 3L.lL.LI Engine Select t t Commands Corn rn a nd s I nstrumentation Instrumentation Instrumentation I I DEEC Into 1553 DEEC Into CP Info CP Info NCI Into NCI Into INS AQC Info INS AgC Info

Digital Flight Control Computer Pitch A I I Pitch B I RolllYaw A I Roll/Yaw 8 ADECS Control Law BIT/IFIM/Salety BIT/IFIM/Safety and HIOEC "On" Commands Flight Control Flight Control Flight Control . I Analog Input/Dutput J t t t t t t t GIIlDUl 5I

Fig. 8. ADECS architecture.

11 E Couple Command CoupblUncouple

A- E- C- D- MOlMlltlry E- 3 PosRmn, Return to Center F- Momentary Pushbutton

Fig. 9. HIDEC crw station orientation.

aMUX bus -Analog hardwlred Flight Control Sonwan Test Display NCI Laboratory Facility Central Computer DFCC - Flight Control Ta,b. Mach

lambMach NCI Data

AEPR, AWa, AFTiT, Wrap HIDEC ADECS Engine - (MUX Interface) Control Laws DEEC Model Serial I I A On/Ofl, Mode Select

Control TI Panel I pq Frud I I I I Console I I (Hardware) Aircraft Motion Variables :T

Horizontal. Rudder Positions I I oP.1oml I

Fig. 10. HIDEC labomtory integration testing, ADECS mode. 3 Flight Control Aircraft Model H009 Laws

I Commands 10 Horizontal Tail. Rudder Actuators I 0111010,1

Fig. 11. HIDEC manned simulation testing, ADECS mode.

.

13 1. Report No. 2. Gormnmemt Accession No. 3. Recipient's cltrlog No. NASA TM-86793 4. Title md Subtitle 5. Report Date Highly Integrated Digital Electronic Control - March 1987 Digital Flight Control , Aircraft Model Identification, 6. Performing Organization Coda and Adaptive Engine Control

7. Author(s) 8. Performing Organization Report No. Jennifer L. Baer-Riedhart, NASA Ames-Dryden Flight Research H-1318 Facility, and Robert J. Landy of McDonnell Aircraft Company, St. Louis. Missouri 10. Work Unit No. 9. Performing Organization Nmm adAddress RTOP 533-02-21 NASA Ames Research Center Dryden F1 ight Research Faci1 ity 11. Contract or Gnnt No. P.O.. Box_. 273- Edwards CA 93523-5000 , 13. Tyw of Report 8nd Period Covrd 2. Spotnoring Agency NJ~urd Addreu Technical Memorandum

National Aeronautics and Space Adminfstratien 14. SpMIuwlng Agency Coda Washington, DC 20546 I 5. Supplementary Notes Prepared as AIAA Paper 85-1877 for presentation at the AIAA Guidance and Control Conference, Snowmass , Colorado, August 19-21. 1985.

6. Abstract

The highly integrated digital electronic control (HIDEC) program at NASA Ames Research Center, Dryden Flight Research Facility is a multiphase flight research program to quantify the benefits of promising integrated control systems. McDonnell Aircraft Company is the prime contractor, with United Technologies Pratt & Whitney Aircraft , and Lear Siegler Incorporated as major subcontractors.

The NASA F-15A testbed aircraft was modified for the HIDEC program by installing a digital electronic flight control system (DEFCS) and replacing the standard FlOO (Arab 3) engines with FlOO engine model derivative (EMD) engines equipped with digi- tal electronic engine controls (DEEC), and integrating the DEEC's and DEFCS. The modified aircraft provides the capability for testing many integrated control modes involving the flight controls, engine controls, and inlet controls.

This paper focuses on the first two phases of the HIOEC program, which are the digital flight control systemlaircraft model identification (DEFCS/AMI) phase and the adaptive engine control system (ADECS) phase.

7. Key Words (Suggested by Authorb)) 18. Distribution Statement Adaptive engine stall margin; advanced FlOO Unclassified - Unlimited engine; digital electronic engine control (OEEC); F-15 aircraft; flight test; flight- path management; increased thrust; improved operability; integrated control;

19. Security Classif. (of this report) 20. Security Clamif. ' this pagd 21: NO. of pqp~ 22. Rice' Unc 1 ass i f ied Uncl assi fied 14 A 02