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Fair and Efficient CPU Scheduling Algorithms Jeyaprakash Fair And Efficient CPU Scheduling Algorithms Jeyaprakash Chelladurai BTech, University of Madras, Chennai, Tamil Nadu (India), 2003 Thesis Submitted In Partial Fulfillment of The Requirements For The Degree of Master of Science in Mathematical, Computer, And Physical Sciences (Computer Science) The University of Northern British Columbia December 2006 ©Jeyaprakash Chelladurai, 2006 Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Library and Bibliotheque et Archives Canada Archives Canada Published Heritage Direction du Branch Patrimoine de I'edition 395 Wellington Street 395, rue Wellington Ottawa ON K1A 0N4 Ottawa ON K1A 0N4 Canada Canada Your file Votre reference ISBN: 978-0-494-28423-0 Our file Notre reference ISBN: 978-0-494-28423-0 NOTICE: AVIS: The author has granted a non­ L'auteur a accorde une licence non exclusive exclusive license allowing Library permettant a la Bibliotheque et Archives and Archives Canada to reproduce, Canada de reproduire, publier, archiver, publish, archive, preserve, conserve, sauvegarder, conserver, transmettre au public communicate to the public by par telecommunication ou par I'lnternet, preter, telecommunication or on the Internet,distribuer et vendre des theses partout dans loan, distribute and sell theses le monde, a des fins commerciales ou autres, worldwide, for commercial or non­ sur support microforme, papier, electronique commercial purposes, in microform, et/ou autres formats. paper, electronic and/or any other formats. The author retains copyright L'auteur conserve la propriete du droit d'auteur ownership and moral rights in et des droits moraux qui protege cette these. this thesis. Neither the thesis Ni la these ni des extraits substantiels de nor substantial extracts from it celle-ci ne doivent etre imprimes ou autrement may be printed or otherwise reproduits sans son autorisation. reproduced without the author's permission. In compliance with the Canadian Conformement a la loi canadienne Privacy Act some supporting sur la protection de la vie privee, forms may have been removed quelques formulaires secondaires from this thesis. ont ete enleves de cette these. While these forms may be included Bien que ces formulaires in the document page count, aient inclus dans la pagination, their removal does not represent il n'y aura aucun contenu manquant. any loss of content from the thesis. i * i Canada Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. A bstract Scheduling in computing systems is an important problem due to its perva­ sive use in computer assisted applications. Among the scheduling algorithms proposed in the literature, round robin (RR) in general purpose computing and rate monotonic (RM) in real-time and embedded systems, are widely used and extensively analyzed. However, these two algorithms have some performance limitations. The main objective of this thesis is to address these limitations by proposing suitable modifications. These modifications yield many efficient versions of RR and RM. The appeal of our improved algorithms is that they alleviate the observed limitations significantly while retaining the simplicity of the original algorithms. In general purpose computing context, we present a generic framework called fair-share round robin (FSRR) from which many scheduling algorithms with different fairness characteristics can be derived. In real-time context, we present two generic frameworks, called off-line activation-adjusted scheduling (OAA) and adaptive activation-adjusted scheduling (AAA), from which many static priority scheduling algorithms can be derived. These algorithms reduce unnecessary preemptions and hence increase: (i) processor utilization in real­ time systems; and (ii) task schedulability. Subsequently, we adopt and tune AAA framework in order to reduce energy consumption in embedded systems. We also conducted a simulation study for selected set of algorithms derived from the frameworks and the results indicate that these algorithms exhibits improved performance. ii Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Contents A b stra c t .................................................................................................................... iii C ontents.................................................................................................................... iii List of Figures........................................................................................................... vii List of Tables ........................................................................................................... viii Publications.............................................................................................................. ix Acknowledgments .................................................................................................... x 1 Introduction 1 1.1 Motivation....................................................................................................... 3 1.2 Contribution.................................................................................................... 6 1.3 Thesis Organization....................................................................................... 8 2 C PU Scheduling 9 2.1 Scheduling in General Purpose Computing System s............................. 9 2.2 Scheduling in Real-Time System s ............................................................. 11 2.2.1 Scheduling in Hard Real-Time S ystem s ....................................... 13 2.3 Scheduling in Embedded Systems ............................................................. 17 2.4 Summary ....................................................................................................... 19 3 Simulator for Scheduling Algorithms 20 3.1 Sim ulation....................................................................................................... 20 3.2 Simulation System for Scheduling............................................................. 23 3.2.1 Performance M e tric s....................................................................... 24 iii Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 3.2.2 Generation of Processes .................................................................. 25 3.2.3 Events in General Purpose Computing S ystem........................... 25 3.2.4 Generation of Tasks........................................................................... 25 3.2.5 Events in Real-Time and Embedded Systems .............................. 26 3.3 S u m m a ry ....................................................................................................... 27 4 Fair-Share Round Robin CPU Scheduling Algorithms 28 4.1 System Model and Problem Statem ent ................................................... 28 4.2 Round Robin Scheduling ............................................................................. 29 4.3 Fair-Share Round Robin Scheduling (FSRR) ......................................... 31 4.3.1 Informal D escrip tio n........................................................................ 31 4.3.2 Framework ........................................................................................ 33 4.3.3 RR vs. F S R R ..................................................................................... 35 4.3.4 FSRR Algorithms............................................................................... 36 4.4 Simulation S tu d y .......................................................................................... 38 4.4.1 Experimental S etu p ........................................................................... 38 4.4.2 Experiment and Result A nalysis ..................................................... 39 4.5 Related S chedulers ...................................................................................... 45 4.6 Summary ....................................................................................................... 47 5 Activation Adjusted Scheduling Algorithms for Hard Real-Time Sys­ tem s 48 5.1 System Model and Problem Statem ent ................................................... 48 5.2 Static Priority Scheduling Algorithms...................................................... 50 5.3 Off-line Activation-Adjusted Scheduling A lgorithm s ............................ 51 5.3.1 Framework ........................................................................................ 52 5.3.2 Computing R4 ..................................................................................... 54 5.3.3 OAA Scheduling A lgorithm s ........................................................... 54 5.3.4 OAA-RM Scheduling Algorithms .................................................. 55 5.3.5 A n aly sis ............................................................................................... 55 iv Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. 5.4 Adaptive Activation Adjusted Scheduling Algorithms ......................... 57 5.4.1 Framework ....................................................................................... 57 5.4.2 AAA Scheduling Algorithms .......................................................... 59 5.4.3 AAA-RM Scheduling A lg o rith m s................................................. 60 5.4.4 A n alysis .............................................................................................
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