Surface Code with Decoherence: an Analysis of Three Superconducting Architectures

PHYSICAL REVIEW A 86, 062318 (2012) Surface code with decoherence: An analysis of three superconducting architectures Joydip Ghosh,1,* Austin G. Fowler,2,† and Michael R. Geller1,‡ 1Department of Physics and Astronomy, University of Georgia, Athens, Georgia 30602, USA 2Centre for Quantum Computation and Communication Technology, School of Physics, The University of Melbourne, Victoria 3010, Australia (Received 20 October 2012; published 19 December 2012) We consider realistic, multiparameter error models and investigate the performance of the surface code for three possible fault-tolerant superconducting quantum computer architectures. We map amplitude and phase damping to a diagonal Pauli “depolarization” channel via the Pauli twirl approximation, and obtain the logical error rate as a function of the qubit T1,2 and state preparation, gate, and readout errors. A numerical Monte Carlo simulation is performed to obtain the logical error rates, and a leading-order analytic formula is derived to estimate their behavior below threshold. Our results suggest that scalable fault-tolerant quantum computation should be possible with existing superconducting devices. DOI: 10.1103/PhysRevA.86.062318 PACS number(s): 03.67.Lx, 03.67.Pp, 85.25.−j I. INTRODUCTION Ideal tunable coupler performance, including the infinite on/off ratio, is assumed, and stray coupling (such as that arising The surface code is a topological stabilizer code that is from the unintended capacitance between device elements) is attractive because of its two-dimensional nearest-neighbor ignored. The gate parameters adopted for this architecture are layout and high fault-tolerant error threshold [1–7]. The most discussed in Sec. IV and summarized in Table I. direct implementation of the surface code with superconduct- Although tunable couplers have been demonstrated by ing circuits leads to the hardware design shown in Fig. 1, several groups, it is unknown whether they will be practical for where the circles represent qubit devices and the dotted use in a large-scale quantum computer. Therefore we consider lines between them represent tunable couplers. These tunable two alternative architectures with fixed (capacitive) coupling. couplers, however, significantly increase the complexity of the Figure 2 shows an architecture proposed by Helmer et al. [25], hardware. We therefore analyze the performance of this most where each qubit in a two-dimensional square lattice is coupled basic design, which we call the textbook architecture, as well to a “horizontal” as well as a “vertical” cavity. Horizontal as two other fault-tolerant architectures for superconducting and vertical cavities in this architecture are fixed at different qubits with fixed capacitive coupling, using a (mostly) realistic frequencies, while qubit frequencies are varied between them. error model that includes qubit decoherence. Although our The CNOT gates between a pair of adjacent qubits across approach is valid for large qubit arrays, we especially focus the cavity are performed via an effective two-qubit flip-flop on first-generation implementations with code distances d = 3 interaction in the dispersive regime [25]. While parallel CNOT and d = 5, and show that an experimental demonstration of gates between two or more pairs of qubits attached to the same a small-d topological quantum memory should be possible resonator are allowed [25], these simultaneous operations with existing superconducting devices; the d = 5 case already reduce the gate fidelity. Note that the Helmer architecture is not exhibits a pronounced quantum memory enhancement with scalable, but the small distance cases are still of interest here. current transmon T values. 1 Finally, we consider a scalable fixed-coupling architecture Figures 1 through 3 show diagrams of the three fault- discussed by DiVincenzo [26] and shown schematically in tolerant superconducting architectures we consider. For the Fig. 3. Here each qubit (circle with solid boundary) is coupled textbook architecture we assume a two-dimensional array of to two resonators (squares with solid boundaries). Both the transmon qubits [8–11], and tunable couplers [12–19] connect- qubit and resonator frequencies are fixed, avoiding the need for ing nearest neighbors. The transmon qubits have tunable fre- low-frequency qubit biases, and the CNOT gates are performed quency [20]. We assume that the controlled-NOT (CNOT) gates via a cross-resonance protocol using microwaves [27–29]. used to implement the stabilizer measurements are performed Note that the number of qubit frequencies required for this using the CZ gate of Strauch et al. [21], which has extremely architecture is independent of the number of qubits in a large high performance in realistic, multiqubit settings [22]. High- array. In Fig. 3 we have shown a possible frequency allocation fidelity single-qubit gates are carried out using Derivative represented by 14 colors, 12 for qubits and 2 for resonators. Removal by Adiabatic Gate (DRAG) pulses [23]. The initial We emphasize that the error model considered here for the states of the syndrome qubits are prepared via ideal projective DiVincenzo architecture ignores the effects of higher-order measurements followed by local rotations (if required). We interactions, microwave cross-coupling, and other multiqubit assume the “catch-disperse-release” measurement protocol of errors typically neglected in theoretical models, which might Ref. [24] for this purpose, as well as for syndrome readout. be significant in this architecture given the larger values of coupling required. We analyze these different architectures by fixing the *[email protected] intrinsic errors and gate times to estimated realistic values †[email protected] and calculating the logical error rate as a function of the ‡ [email protected] qubit coherence time T1. For tunable transmon qubits, the T2 1050-2947/2012/86(6)/062318(12)062318-1 ©2012 American Physical Society JOYDIP GHOSH, AUSTIN G. FOWLER, AND MICHAEL R. GELLER PHYSICAL REVIEW A 86, 062318 (2012) FIG. 1. (Color online) Layout of the distance-3 surface code considered here. Empty circles denote data qubits, green (light gray) filled circles denote X-type and blue (dark gray) filled circles denote Z-type syndrome qubits. The dashed lines denote tunable qubit-qubit coupling. We refer to this hardware design as the textbook FIG. 3. (Color online) Schematic diagram of the architecture architecture. discussed by DiVincenzo [26] for code distance d =3. The filled circles with boundaries represent qubits, the squares with boundaries time is assumed to be equal to T , while for fixed-frequency 1 represent resonators, and the colors (grayscales) of both denote their transmons we assume that T = 2T . The logical error rate is 2 1 fixed frequencies. The unbounded circles are for the eye and indicate calculated by mapping amplitude and phase damping to the whether a given block is for data (dark gray), X-type syndrome (light asymmetric “depolarization” channel (ADC), a single-qubit green or light gray), or Z-type syndrome (blue or medium gray). A error channel that is diagonal in the Pauli basis. This is possible frequency allocation for all the components is shown. explained in Sec. II. The depolarization channel error model is widely used in the quantum error correction literature, and the three fault-tolerant architectures discussed above, using the symmetric case allows a simple comparison (especially of both the leading-order analytic formula and classical Monte fault-tolerant error-threshold values) between different error- Carlo simulation. There are many ways to implement a surface correcting codes. The action of the depolarization channel on code with superconducting qubits, and the design details of any stabilizer states can be efficiently simulated with a classical given fault-tolerant architecture will surely be improved and computer, enabling the direct calculation of logical error optimized over time; in this sense the architectures of Figs. 2 rates for large distance codes, and it accurately captures pure and 3 mainly serve as examples of our approach and indicate dephasing (but only approximately describes the decoherence that large-scale quantum computers should be possible with found in real superconducting qubits). In Sec. III we derive a existing superconducting devices (assuming the simple error leading-order analytic expression for the logical error rate that models considered here). The textbook architecture of Fig. estimates the below-threshold scaling behavior (for small code 1 is also interesting because it likely provides a bound on distances). Section IV gives the approximate performance of the performance of any possible future superconducting surface code implementation, as the additional error-correction- cycle steps and unwanted multiqubit interactions of alternative fixed-coupling designs will only degrade the performance. Comparing the performance of the textbook architecture with the Helmer and DiVincenzo architectures also allows one to assess the benefit of using tunable couplers, which increases the hardware complexity but offers a lower T1 threshold and logical error rate. II. MAPPING DECOHERENCE TO A DIAGONAL PAULI CHANNEL In this section we discuss the use of Pauli twirling [30–34]to approximately model qubit decoherence by an asymmetric depolarization channel, which, by the Gottesman-Knill theorem, makes efficient classical Monte Carlo simulation possible. FIG. 2. (Color online) Schematic diagram of the distance-3 A. Amplitude

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