Surface Code with Decoherence: an Analysis of Three Superconducting Architectures

PHYSICAL REVIEW A 86, 062318 (2012)

Surface code with decoherence: An analysis of three superconducting architectures

Joydip Ghosh,1,* Austin G. Fowler,2,† and Michael R. Geller1,‡ 1Department of Physics and Astronomy, University of Georgia, Athens, Georgia 30602, USA 2Centre for Quantum Computation and Communication Technology, School of Physics, The University of Melbourne, Victoria 3010, Australia (Received 20 October 2012; published 19 December 2012) We consider realistic, multiparameter error models and investigate the performance of the surface code for three possible fault-tolerant superconducting quantum computer architectures. We map amplitude and phase damping to a diagonal Pauli “depolarization” channel via the Pauli twirl approximation, and obtain the logical

error rate as a function of the qubit T1,2 and state preparation, gate, and readout errors. A numerical Monte Carlo simulation is performed to obtain the logical error rates, and a leading-order analytic formula is derived to estimate their behavior below threshold. Our results suggest that scalable fault-tolerant quantum computation should be possible with existing superconducting devices.

DOI: 10.1103/PhysRevA.86.062318 PACS number(s): 03.67.Lx, 03.67.Pp, 85.25.−j

I. INTRODUCTION Ideal tunable coupler performance, including the infinite on/off ratio, is assumed, and stray coupling (such as that arising The surface code is a topological stabilizer code that is from the unintended capacitance between device elements) is attractive because of its two-dimensional nearest-neighbor ignored. The gate parameters adopted for this architecture are layout and high fault-tolerant error threshold [1–7]. The most discussed in Sec. IV and summarized in Table I. direct implementation of the surface code with superconduct- Although tunable couplers have been demonstrated by ing circuits leads to the hardware design shown in Fig. 1, several groups, it is unknown whether they will be practical for where the circles represent qubit devices and the dotted use in a large-scale quantum computer. Therefore we consider lines between them represent tunable couplers. These tunable two alternative architectures with fixed (capacitive) coupling. couplers, however, significantly increase the complexity of the Figure 2 shows an architecture proposed by Helmer et al. [25], hardware. We therefore analyze the performance of this most where each qubit in a two-dimensional square lattice is coupled basic design, which we call the textbook architecture, as well to a “horizontal” as well as a “vertical” cavity. Horizontal as two other fault-tolerant architectures for superconducting and vertical cavities in this architecture are fixed at different qubits with fixed capacitive coupling, using a (mostly) realistic frequencies, while qubit frequencies are varied between them. error model that includes qubit decoherence. Although our The CNOT gates between a pair of adjacent qubits across approach is valid for large qubit arrays, we especially focus the cavity are performed via an effective two-qubit flip-flop on first-generation implementations with code distances d = 3 interaction in the dispersive regime [25]. While parallel CNOT and d = 5, and show that an experimental demonstration of gates between two or more pairs of qubits attached to the same a small-d topological quantum memory should be possible resonator are allowed [25], these simultaneous operations with existing superconducting devices; the d = 5 case already reduce the gate fidelity. Note that the Helmer architecture is not exhibits a pronounced quantum memory enhancement with scalable, but the small distance cases are still of interest here. current transmon T values. 1 Finally, we consider a scalable fixed-coupling architecture Figures 1 through 3 show diagrams of the three fault- discussed by DiVincenzo [26] and shown schematically in tolerant superconducting architectures we consider. For the Fig. 3. Here each qubit (circle with solid boundary) is coupled textbook architecture we assume a two-dimensional array of to two resonators (squares with solid boundaries). Both the transmon qubits [8–11], and tunable couplers [12–19] connect- qubit and resonator frequencies are fixed, avoiding the need for ing nearest neighbors. The transmon qubits have tunable fre- low-frequency qubit biases, and the CNOT gates are performed quency [20]. We assume that the controlled-NOT (CNOT) gates via a cross-resonance protocol using microwaves [27–29]. used to implement the stabilizer measurements are performed Note that the number of qubit frequencies required for this using the CZ gate of Strauch et al. [21], which has extremely architecture is independent of the number of qubits in a large high performance in realistic, multiqubit settings [22]. High- array. In Fig. 3 we have shown a possible frequency allocation fidelity single-qubit gates are carried out using Derivative represented by 14 colors, 12 for qubits and 2 for resonators. Removal by Adiabatic Gate (DRAG) pulses [23]. The initial We emphasize that the error model considered here for the states of the syndrome qubits are prepared via ideal projective DiVincenzo architecture ignores the effects of higher-order measurements followed by local rotations (if required). We interactions, microwave cross-coupling, and other multiqubit assume the “catch-disperse-release” measurement protocol of errors typically neglected in theoretical models, which might Ref. [24] for this purpose, as well as for syndrome readout. be significant in this architecture given the larger values of coupling required. We analyze these different architectures by fixing the *[email protected] intrinsic errors and gate times to estimated realistic values †[email protected] and calculating the logical error rate as a function of the ‡ [email protected] qubit coherence time T1. For tunable transmon qubits, the T2

FIG. 1. (Color online) Layout of the distance-3 surface code considered here. Empty circles denote data qubits, green (light gray) filled circles denote X-type and blue (dark gray) filled circles denote Z-type syndrome qubits. The dashed lines denote tunable qubit-qubit coupling. We refer to this hardware design as the textbook FIG. 3. (Color online) Schematic diagram of the architecture architecture. discussed by DiVincenzo [26] for code distance d =3. The filled circles with boundaries represent qubits, the squares with boundaries time is assumed to be equal to T , while for fixed-frequency 1 represent resonators, and the colors (grayscales) of both denote their transmons we assume that T = 2T . The logical error rate is 2 1 fixed frequencies. The unbounded circles are for the eye and indicate calculated by mapping amplitude and phase damping to the whether a given block is for data (dark gray), X-type syndrome (light asymmetric “depolarization” channel (ADC), a single-qubit green or light gray), or Z-type syndrome (blue or medium gray). A error channel that is diagonal in the Pauli basis. This is possible frequency allocation for all the components is shown. explained in Sec. II. The depolarization channel error model is widely used in the quantum error correction literature, and the three fault-tolerant architectures discussed above, using the symmetric case allows a simple comparison (especially of both the leading-order analytic formula and classical Monte fault-tolerant error-threshold values) between different error- Carlo simulation. There are many ways to implement a surface correcting codes. The action of the depolarization channel on code with superconducting qubits, and the design details of any stabilizer states can be efficiently simulated with a classical given fault-tolerant architecture will surely be improved and computer, enabling the direct calculation of logical error optimized over time; in this sense the architectures of Figs. 2 rates for large distance codes, and it accurately captures pure and 3 mainly serve as examples of our approach and indicate dephasing (but only approximately describes the decoherence that large-scale quantum computers should be possible with found in real superconducting qubits). In Sec. III we derive a existing superconducting devices (assuming the simple error leading-order analytic expression for the logical error rate that models considered here). The textbook architecture of Fig. estimates the below-threshold scaling behavior (for small code 1 is also interesting because it likely provides a bound on distances). Section IV gives the approximate performance of the performance of any possible future superconducting surface code implementation, as the additional error-correction- cycle steps and unwanted multiqubit interactions of alternative fixed-coupling designs will only degrade the performance. Comparing the performance of the textbook architecture with the Helmer and DiVincenzo architectures also allows one to assess the benefit of using tunable couplers, which increases the hardware complexity but offers a lower T1 threshold and logical error rate.

II. MAPPING DECOHERENCE TO A DIAGONAL PAULI CHANNEL In this section we discuss the use of Pauli twirling [30–34]to approximately model qubit decoherence by an asymmetric depolarization channel, which, by the Gottesman-Knill theorem, makes efﬁcient classical Monte Carlo simulation possible.

FIG. 2. (Color online) Schematic diagram of the distance-3 A. Amplitude and phase damping Helmer architecture. The circles represent superconducting qubits, with “idle” frequencies indicated by their colors (grayscales). The Quantum systems coupled to an environment undergo the horizontal and vertical gray (magenta) rectangles are resonators. All spontaneous dissipation of energy, which is usually modeled horizontal (vertical) resonators have the same frequency. by the amplitude damping channel. For a single qubit this has

062318-2 SURFACE CODE WITH DECOHERENCE: AN ANALYSIS OF ... PHYSICAL REVIEW A 86, 062318 (2012) the form ADC is not sufficient to exactly capture the combined effects → E = AD AD† + AD AD† of amplitude and phase damping, as no choice of pX, pY , and ρ AD (ρ) E1 ρE1 E2 ρE2 , (1) pZ lead to EADC (ρ) = ED (ρ). However, the advantage of the where ADC (and more generally the Clifford channel) is that it can √ be efficiently simulated with a classical computer. Therefore AD = 10√ AD = 0 pAD E1 and E2 . (2) we construct an ADC that approximates (7). 0 1 − pAD 00 AD The Em are Kraus matrices for the amplitude damping C. Pauli twirl approximation channel, and pAD can be interpreted as the probability of a single photon emission from the qubit. We approximate the combined amplitude damping and Phase damping or pure dephasing is a decoherence process dephasing with an ADC via twirling [30–34]. Twirling is generated by random phase kicks on a single qubit. Assuming used in quantum information to study the average effect of the phase kick angle is a Gaussian-distributed random variable, arbitrarily general noise models via their mapping to more the Kraus matrices for this process are symmetric ones. Alternative approximate approaches have also been recently proposed [35,36]. PD = 10√ PD = 00√ Using the Kraus matrices (4), we can rewrite (7) in terms E1 and E2 . (3) 0 1 − pPD 0 pPD of Pauli matrices as [34] √ The combined channel of the amplitude and phase damping − + − − E = 2 γ 2 1 γ λ + γ + γ can also be described by a set of three Kraus matrices D (ρ) IρI XρX YρY 4 √ 4 4 10 2 − γ − 2 1 − γ − λ γ γ ED = √ + ZρZ − IρZ − ZρI 1 0 1 − γ − λ 4 4 4 √ √ γ γ 1 + 1 − γ − λ 1 − 1 − γ − λ + XρY − YρX. (9) = I + σ z, 4i 4i 2 2 √ √ √ (4) 0 γ γ i γ Twirling over the Pauli group removes the off-diagonal ED = = σ x + σ y , terms [33]from(9), leading to the ADC (8) with error 2 00 2 2 √ √ probabilities [34] D 00√ λ λ z − − − E = = I − σ , 1 − e t/T1 1 − e t/T2 1 − e t/T1 3 0 λ 2 2 p = p = and p = − . X Y 4 Z 2 4 ≡ ≡ − where γ pAD and λ (1 pAD)pPD. Next we represent the (10) parameters pAD and pPD in terms of the single-qubit relaxation = time T1 and dephasing time T2 If T2 T1, the ADC reduces to the symmetric depolarization − channel. − = t/T1 1 pAD e , (5) We refer to the approximate reduction of any quantum − channel to the ADC in this manner as the Pauli twirl − − = t/T2 (1 pAD)(1 pPD) e . (6) approximation (PTA). The PTA corresponds to expanding the The combination of amplitude and phase damping on a single Kraus matrices in terms of Pauli matrices (and the identity), qubit transforms the density matrix as performing the Kraus summation, and keeping only terms that − − are diagonal in the Pauli basis. Equivalently, only the diagonal − t/T1 t/T2 → E = 1 ρ11e ρ01 e elements of the χ matrix in the Pauli basis are retained. ρ D (ρ) ∗ −t/T2 −t/T1 . (7) ρ01 e ρ11e Because of its simplicity and wide applicability, we expect the PTA to be a good starting point for refinements that might B. Asymmetric depolarization channel (approximately) account for the neglected nondiagonal terms. Classical simulation of Eq. (7) is inefficient for a multiqubit system. For example, the textbook architecture requires 25 III. PHYSICAL AND LOGICAL ERRORS physical qubits for d = 3 and 81 physical qubits for d =5. The dimension of the Hilbert space is more than 33 million In this section we discuss the assumptions of our error for d =3 and more than 1024 for d =5. This motivates one to model and the logical error rate in the surface code. We also construct a simplified error model which is tractable via some describe the error correction cycle and review the concept of efficient classical simulation. a distance-dependent error threshold. The asymmetric depolarization channel (ADC) is such a model, where a decoherent qubit is assumed to suffer from A. Error model discrete Pauli X (bit-flip) errors, Z (phase flip) errors, or Y While superconducting qubits promise scalability, they (both) suffer from various error mechanisms caused by gate errors

EADC (ρ) = (1 − p)ρ + pXXρX + pY YρY + pZZρZ, and decoherence [22,23,37,38]. To model quantum noise for various surface code architectures we assume that the errors (8) are Markovian (noise affects each individual gate operation where p ≡ pX + pY + pZ. A special case of (8) is the independently) and uncorrelated (noise affects each individual symmetric depolarization channel, where pX = pY = pZ.The qubit separately).

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With these assumptions we now describe the dominant error mechanisms relevant for our purpose. We classify these mechanisms as follows. (1) Decoherence. We consider amplitude damping and dephasing as the dominant sources of decoherence, characterized by the relaxation time T1 and dephasing time T2 of the qubits. Decoherence is introduced here via the PTA as described above, which allows us to express the single qubit X, Y , and Z error probabilities as (10), where t is the operation time. Similarly, with the assumption of uncorrelated errors, one can quantify the error probabilities for various two qubit Pauli channels as

pIX = pIY = pXI = pYI = pX(1 − pX − pY − pZ),

pXX = pXY = pYX = pYY = pXpY , (11) pXZ = pZX = pYZ = pZY = pXpZ,

pIZ = pZI = pZ(1 − pX − pY − pZ),pZZ = pZpZ. Also notice that our assumptions guarantee that any error (X, FIG. 4. (Color online) A schematic diagram of distance-3 surface Y ,orZ) in one of the qubits for a two-qubit operation can code is shown. Two possible error chains, XL (purple and horizontal) be retrieved when errors on another qubit are traced out; for and ZL (magenta and vertical), are displayed and various terminolo- gies used in this paper are illustrated. Syndrome Z operators are example, pX = pXI + pXX + pXY + pXZ. (2) Unitary rotation error. Incorrect unitary operations shown in green (labeled by Z) and syndrome X operators are in give rise to a type of intrinsic error. By intrinsic we mean an yellow (labeled by X). An error chain starting and ending at the same error not resulting from noise or decoherence. For single-qubit boundary is referred to as a “clasp” and is shown in dark gray color. operations, such errors can always be diagonalized in a Pauli X, Y ,orZ basis. An estimate suggests that with the use of DRAG error-detection leads to the formation of a chain starting pulse shapes [23], these errors are ignorable with respect to the from one boundary and ending at another. Such error chains intrinsic two-qubit gate errors. Two-qubit gate errors depend commute with all stabilizers but cannot be written as a product on the architecture,and gate protocol. of them and therefore remain undetected. The larger the array (3) Leakage. Leakage is an intrinsic error that populates a (or higher the code distance) the lower the probability of quantum state outside of the computational subspace. As far formation of these error chains. as the single qubit operations are concerned, it is possible to Figure 5 shows the steps that a single surface code error suppress leakage below the level of any considerable effect correction cycle is comprised of. The ﬁrst step is the initial | (in comparison to other dominant errors) using quantum state preparation for the syndrome qubits (state 0 for |+ control techniques. More quantitatively, it is possible to show syndrome Z and for syndrome X). While there exist that higher-order DRAG pulse is capable of suppressing a multiple approaches for a qubit state preparation, we here single-qubit leakage error below 10−8 (theoretically) in 5 ns assume that this is done via an ideal projective measurement for superconducting qubits [23]. In the present analysis, however, our primary focus is to investigate the effect of decoherence on logical error rates and therefore we do not consider leakage or unitary errors rigorously. Instead, we compute the average intrinsic error of two-qubit gates for the three architectures and distribute it equally to all possible Pauli channels, while decoherence is treated via the PTA.

B. Logical error rate in the surface code In this section we discuss the use of the surface code as a single-logical-qubit quantum memory and describe the error correction cycle. A distance-3 quantum memory is shown in Fig. 4. The open circles are data qubits and the filled circles are ancillary qubits used for syndrome measurements. A bit flip on any data qubit results in an eigenvalue change FIG. 5. (Color online) A schematic diagram of a surface code of adjacent Z stabilizers and a phase flip does the same on error correction cycle is shown. The dark gray leftmost region (red neighboring X stabilizers. Therefore, Pauli X (bit-flip), Y region) contains state preparation, the medium gray middle part (blue (bit and phase-flip) and Z (phase-flip) errors are detectable region) contains four consecutive CNOT operations, and the light gray (and therefore correctable) by sequential measurements of (green region) highlights the measurements of syndrome Z and X the stabilizer group generators, unless a misidentification in qubits.

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0 10 it underpredicts the logical error rates. However, a close corre- spondence between our analytic estimate and numerical sim-

−1 ulation is observed for a small distance and below threshold, 10 as shown in Fig. 6, since the contributions from the diagonal error chains are negligible in that regime. Thus the approximate −2 10 analytic formula is sufﬁcient for the regimes of interest in this work. The convergence of the curves indicate that below the −3 10 cross-over point, surface code error correction helps as we go from d = 3tod = 5 and above it hurts. We deﬁne that −4 10 transition point as the distance-dependent error threshold. d=3 (simulation)

−5 d=5 (simulation) IV. ARCHITECTURE PERFORMANCE logical X error prob per cycle 10 d=3 (analytical) d=5 (analytical) In this section we perform an analysis of the logical error −6 AUTOTUNE rate with numerical Monte Carlo simulation (using 10 −4 −3 −2 10 10 10 [41]), and also compare the result to our analytical estimate physical qubit error prob per timestep for the three superconducting architectures. We emphasize that while the numerical Monte Carlo simulation captures all FIG. 6. (Color online) Plot of analytic estimate of logical X error possible error mechanisms, our analytical approach neglects probability per cycle vs. single physical qubit error probability per the diagonal error chains as described in Ref. [39,40]; it timestep. Solid lines denote numerical estimates via Monte Carlo therefore underpredicts the numerical result. However, the simulation while dashed lines are obtained from our analytical formula given by Eq. (A6). analytic formula enables a simple and immediate extension to alternative candidate architectures, error models, and pa- rameter values. Table I shows the parameters used to estimate and a subsequent local rotation (σ x or Hadamard), if necessary. the logical error rate for the three architectures. We assume The state preparation is followed by four CNOT operations with tunable transmons for the textbook and Helmer architectures four adjacent data qubits. The order of these CNOT operations and use two-qubit gate designs that use this tunability. CNOT is important and in fact from the reference of a syndrome qubit gates are performed via the cross-resonance protocol in the the clockwise and anticlockwise orders do not work as they DiVincenzo architecture, which uses transmons operating at lead to unwanted entanglement among the syndrome qubits the flux sweet spot. Tunable transmons have an additional [7]. We here adopt north-west-east-south protocol without source of dephasing and therefore we assume T = T for any loss of generality. Notice that while for syndrome Z 2 1 the textbook and Helmer architectures. State preparation measurements data qubits act as control qubits, for syndrome of syndrome qubits is assumed to be done via projective X measurements data qubits are the targets. These four CNOT measurement followed by a conditional local rotation (as operations are followed by measurements for the syndrome shown in Fig. 5) and therefore t = t + t in Table I. Z case and requires a Hadamard operation before syndrome QSP meas loc X qubits get measured. Such an error correction cycle can be A. Approximate logical error rate shown to be equivalent to measuring the four-qubit operators XXXX and ZZZZ, and are repeated successively. Here we construct an approximate analytic formula to The data collected via the measurements of syndrome estimate the logical error rates below threshold. We use the Z and X qubits at the end of every cycle are stored in assumptions of our error model and add the individual error a classical computer. A classical minimum-weight perfect probabilities on data and syndrome qubits for each step to matching algorithm is used to match (up to a homology) obtain the bit-flip and phase-flip error probabilities per cycle as syndrome events to identify various error chains [2,7]. The 8p p = p (t ) + p (t ) + 4 intr , most likely logical errors occur when a misidentification by bf X cycle Y cycle 15 the classical software leads to the formation of an error chain 8p q = p + p (t ) + p (t ) + p + 4 intr , starting from one boundary and ending at another of the bf QSP X middle Y middle meas 15 same type. Such error chains are referred to as homologically = + + 8pintr nontrivial error chains and are responsible for logical X or ppf pZ(tcycle) pY (tcycle) 4 , 15 Z operations on the encoded logical qubit. The logical error qpf = pQSP + pZ(2tloc + tmiddle) + pY (2tloc + tmiddle) rate contributed by these error chains can be determined via 8pintr classical Monte Carlo simulations. + pmeas + 4 , (12) An analytical leading-order estimate of the logical X or 15 Z error rates for an asymmetric depolarization channel error where tmiddle ≡ tcycle − (tQSP + tloc + tmeas), pbf and qbf (ppf model in a surface code is also derived in Appendix A, and its and qpf) are the bit-flip (phase-flip) error rates per cycle performance is compared against the numerical Monte Carlo in the data qubits and syndrome qubits, respectively. The simulation (as obtained in Ref. [7]) in Fig. 6. As observed in functions p(t)inEq.(12) refer to the expressions (10) Refs. [39,40], there exists an additional mechanism for logical evaluated with operation time t. Furthermore, tQSP is the time errors originating from error propagation via CNOT operations: required to complete the initial state preparation for syndrome the diagonal error chains. We neglect such diagonal error qubits, and pQSP is the error probability that a wrong state is chains in the derivation of our analytic formula and therefore prepared. pintr is the intrinsic error of a CNOT gate averaged

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TABLE I. Parameters assumed for the three fault-tolerant architectures.

Architectures Quantity Description Textbook Helmer DiVincenzo

T1 qubit relaxation time 1–10 μs 1–10 μs 1–40 μs T2 qubit dephasing time T1 T1 2T1 tQSP state preparation time 40 ns 40 ns 40 ns tloc local rotation time 5 ns 5 ns 5 ns tmeas measurement time 35 ns 35 ns 35 ns tCNOT CNOT gate time 21 ns 20 ns 20 ns tcycle time duration of a single cycle 164 ns 160 ns 400 ns −4 −3 −3 pintr leakage probability for CNOT 10 10 10 −2 −2 −2 pmeas measurement error probability 10 10 10 −2 −2 −2 pQSP state preparation error probability 10 10 10

over the Hilbert space of all input states, and pmeas is the C. Helmer architecture error probability that a wrong eigenvalue is reported in the In this section we discuss the architecture proposed by readout process. Note that the intrinsic gate error (described Helmer et al. [25], where superconducting qubits are arranged by pintr) is assumed to be equally distributed over all 15 in a two-dimensional square lattice and each qubit is coupled two-qubit Pauli errors and therefore the probability of a bit to one horizontal and one vertical cavity as shown in Fig. 2. flip (occurs with X or Y errors) or phase flip (occurs with Z The rectangular blocks (horizontal and vertical) are cavities, or Y errors) of any qubit during CNOT due to the intrinsic error the circles represent qubits, and the colors denote their idle is 8pintr/15. When we add each probability we are ignoring (between gate) frequencies. As pointed out by the authors of all higher-order contributions and also the coherence of these Ref. [25], the minimum frequency range required to allocate error mechanisms (although our numerical simulation takes the frequencies of all qubits in this architecture is proportional the higher-order effects into account). We use these bit- and to the square root of the number of qubits. While this phase-flip probabilities in Eqs. (A6) and (A7) of Appendix A architecture is not scalable, it is suitable for implementing to obtain analytical estimates of logical X and Z error rates. the distance-3 and 5 surface code, which is a main focus here. The CNOT gates are performed between a pair of adjacent B. Textbook architecture qubits by tuning them into mutual resonance and waiting for a while somewhere near cavity frequency and thereby utilizing The textbook architecture consists of a two-dimensional the effective flip-flop interaction between qubits. The waiting square lattice (as shown in Fig. 1) of superconducting qubits time for this gate is inversely proportional to the magnitude (tunable transmons) with nearest-neighbor tunable couplings of the effective flip-flop interaction strength and for the pa- having an infinite on-off ratio. The CNOT operations in this rameters used in Ref. [25] we estimate t ≈ 20 ns for this architecture are performed using the protocol discussed in CNOT protocol. The dominant source of the intrinsic errors for such a Ref. [22]. We assume that the idle data qubit frequencies CNOT emerges from the higher-order Landau-Zener transitions are 6 GHz and syndrome qubit frequencies are 8 GHz. The during tuning and detuning and are estimated to be in the order optimal parameters for a CNOT operation, shown in Table IV, − of 10 3 [25]. As specified earlier, the parallel CNOT operations are determined in Appendix B by modeling amplitude and involving the same resonator also cost fidelity due to the phase damping. As mentioned earlier, T = T is assumed 1 2 higher-order couplings in this architecture. However, in the low for tunable transmons, as they have an additional source of distance limit we assume that the total intrinsic error is bound dephasing that degrades their T . 2 by the fixed (distance-independent) value mentioned above. We use Eq. (12) along with Eqs. (A6) and (A7) to compute These parameters are shown in Table I and used to estimate the logical X and Z error rates (P and P ) for the textbook XL ZL the logical error probability per cycle for this architecture. architecture. For the numerical Monte Carlo simulation, we The bit-flip and phase-flip error probabilities per cycle for use AUTOTUNE [41] to simulate the circuit shown in Fig. 5 for data and syndrome qubits in this architecture are given by every syndrome qubit. Eq. (12) with t = 160 ns and t = (4 × 20) ns = In Fig. 7 we show the graphs (both analytical and numerical) cycle middle 80 ns. With a similar analysis we obtain Fig. 8, which shows of the logical X and Z error probabilities per cycle with d = 3 the plots of the logical Xand Z error probabilities per cycle and d = 5 codes, versus the relaxation time T . Note that for 1 for d = 3 and 5 error correction with respect to T , and we d = 3 our analytic formula closely reproduces the numerical 1 observe that the threshold is at ≈2.8 μs. simulation, while for d = 5 it underpredicts as we expect. From the numerical plots we observe that the threshold is at ≈2.6 μs, where all other parameters are kept fixed as D. DiVincenzo architecture listed in Table I. This result signifies that if we construct this Here we analyze the architecture (shown in Fig. 3) proposed architecture with qubits having T1 (or T2) more than ≈2.6 μs, by DiVincenzo [26], in which each qubit is dispersively then surface code error correction helps as we increase the coupled to two resonators, while each resonator couples four distance from d = 3tod = 5; otherwise it hurts. such qubits. In this architecture every data or syndrome

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0 qubit consists of four physical qubits where one of them is 10 primary and the remaining three act as ancillary qubits. The d=3 (simulation) CNOT operations in this architecture are performed via the XL d=5 (simulation) d=3 (analytical) virtual cross-resonance protocol where qubits always remain −1 dispersively coupled to the resonators while microwaves drive 10 d=5 (analytical) the population transition between two qubits [27–29]. Notice that this architecture is fully scalable and the frequency −2 allocation does not depend on the number of qubits. 10 We ﬁrst estimate the time required to complete a single surface code cycle in this architecture. As mentioned earlier, for each block one out of four qubits acts as a principal qubit −3 and without loss of generality we assume the eastern qubit to 10 logical X error rate per cycle P be the principal one for every block. Table II shows the time required for each individual step in this architecture. The state −4 preparation and readout takes 40 and 35 ns, respectively, as for 10 0 T (µs) 1 previous architectures. The ﬁrst CNOT is performed between 10 1 10 a syndrome block and its north data qubit block and this is (a) performed by doing a CNOT between the eastern qubit of the syndrome block and the western qubit of the data block. This 0

0 10 10 d=3 (simulation) d=3 (simulation) ZL d=5 (simulation) d=5 (simulation) d=3 (analytical) XL d=3 (analytical) −1 d=5 (analytical) −1 10 10 d=5 (analytical)

−2 −2 10 10

−3 −3 10 10 logical Z error rate per cycle P logical X error rate per cycle P −4

−4 10 0 1 10 10 T (µs) 10 0 1 1 10 T (µs) 10 1 (b) (a) FIG. 8. (Color online) Logical X and Z error rate per cycle is 0 shown as a function of coherence time T1 for the Helmer architecture. 10 = = d=3 (simulation) Plots for d 3 are shown in blue (dark gray) and those for d 5 are shown in red (light gray).

ZL d=5 (simulation) d=3 (analytical) −1 10 d=5 (analytical) CNOT must be accompanied by pre- and post-SWAPoperations in the data block where the quantum state of the eastern qubit is transferred to the western one. As discussed, the CNOT −2 10 operations are performed via the cross-resonance protocol and we assume the gate time for such a CNOT to be ≈20 ns [29]. SWAP operations between two qubits coupled via resonator

−3 10 TABLE II. Time duration for each step in the error-correction logical Z error rate per cycle P cycle for DiVincenzo architecture.

−4 Operation Time duration 10 0 1 10 T (µs) 10 1 state preparation 40 ns (b) ﬁrst CNOT (north) 100 ns second CNOT (west) 60 ns FIG. 7. (Color online) Logical X and Z error rate per cycle third CNOT (east) 60 ns is shown as a function of coherence time T1 for the textbook fourth CNOT (south) 100 ns = architecture. Plots for d 3 are shown in blue (dark gray) and those local rotation plus readout 40 ns for d = 5 are shown in red (light gray).

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1 10 d=3 (simulation)

XL d=5 (simulation) 0 10 d=3 (analytical) d=5 (analytical)

−1 10

−2 10

−3 10 logical X error rate per cycle P

−4

10 0 1 10 T (µs) 10 1 (a)

0 10 d=3 (simulation) d=5 (simulation) ZL d=3 (analytical) −1 FIG. 10. (Color online) Various possible ﬁxed-coupling-based 10 d=5 (analytical) architectures are shown for d = 3 surface code. The circles denote qubits, squares denote resonators, and various colors (grayscales) denote a possible frequency allocation. (a) An architecture where −2 10 superconducting qubits are arranged in a two-dimensional square lattice each coupled to its nearest neighbor with ﬁxed couplers. (b) An architecture where superconducting qubits are used for data

−3 qubits and resonators for syndrome qubits coupled via ﬁxed couplers. 10 Each resonator is also coupled to another qubit required for readout.

logical Z error rate per cycle P (c) Same as architecture (b) except for the fact that each qubit is also coupled to another resonator used as its memory. (d) In this −4 architecture each qubit in a two-dimensional square lattice is coupled 10 0 1 to its nearest neighbor via a resonator. 10 T (µs) 10 1 (b) for logical X error in comparison to logical Z. We observe FIG. 9. (Color online) Logical X and Z error rates per cycle from our numerical simulation that logical Z errors can be are shown as a function of coherence time T1 for the DiVincenzo suppressed if T1 > 5 μs, while to suppress logical X errors we architecture. Plots for d = 3 are shown in blue (dark gray) and those need T1 > 10 μs, which is consistent with the above argument. for d = 5 are shown in red (light gray). are also assumed to be performed in 20 ns. The intrinsic error E. Other possible architectures pintr for such CNOT gates is estimated to be in the order of We also discuss some other possible architectures based 10−3 [28]. These results give us the time durations required on fixed coupling elements, as shown in Fig. 10. As per our for each step in the error correction cycle, shown in Table II. convention, the squares denote resonators, the circles denote These results estimate the duration of a single cycle in this qubits, and the solid lines denote fixed couplings. For gate architecture to be 400 ns long. protocols (CNOT or SWAP) that require tuning and detuning Following the same argument as in the textbook architecture qubits in and out of resonance, the greatest challenge is and using Eq. (12) for the bit-flip and phase-flip error probabil- the frequency allocation such that first-order Landau-Zener ities with tcycle = 400 ns and tmiddle = (100 + 60 + 60 + 100) transitions can be avoided. We observe that with dc control- ns = 320 ns, we compute logical X and Z error rates. Figure 9 based gate protocols [21,22], none of these architectures shows the total logical X and Z error probabilities per cycle for can avoid first-order Landau-Zener transitions. This fact is d = 3 and 5. Note that the condition, T2 = 2T1, leads to pX + an inherent property of the topology of these architectures. pY ≈ 2(pZ + pY ) (assuming T1,2 tcycle), which means that However, we note that with microwave-control-based gate the bit-flip error rate is almost two times larger than the phase- protocols (for example, cross resonance), these unwanted flip error rate. Since the logical X error rate mostly depends on transitions can be avoided. bit-flip probability and the logical Z on phase-flip probability, The crucial role of Landau-Zener transition on the error we expect PX >PZ for this case. This asymmetry between mechanisms for these architectures motivates us to estimate logical X and Z error rates implies a larger error threshold this error: For any two-level system, the Landau-Zener formula

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TABLE III. Fault-tolerant T1 thresholds for the three architectures error propagation via CNOT gates [39,40] and therefore studied in this work. underestimates the logical error rates. Logical error rates for X and Z errors per cycle (PXL and PZL respectively) are defined T1 threshold as the probability of the formation of an X or Z error chain Architecture Logical X error Logical Z error in the surface at the end of a single cycle. We consider the logical X error first, and the expression for the logical Z textbook 2.6 μs 2.6 μs error follows from a similar combinatorial argument. Suppose Helmer 2.8 μs 2.8 μs pbf and qbf are bit-flip error probabilities (per cycle) in the DiVincenzo 10 μs5μs data and syndrome qubits, respectively. The dominant error mechanism emerges from the fact that (d + 1)/2 errors either predicts the diabatic transition probability as get misidentified as (d − 1)/2 errors (with 100% probability) or as a different arrangement of (d + 1)/2 errors (with 50% g2 probability), thereby producing an error chain after attempting P = exp −2π , (13) LZ h¯ | ˙(t∗)| error correction. Such a process can happen in three ways. Case 1. The most natural error chain happens when there where g is the coupling between the levels, (t)isthe are (d + 1)/2 data-qubit bit-flip errors in a single row of a time-dependent energy level separation, and t∗ is the time distance-d surface. These (d + 1)/2 error locations can be when the levels are in resonance. Assuming parameters d chosen out of d locations in ( d+1 ) ways, and such an error relevant for superconducting architectures (g ≈ 45 MHz and 2 ˙(t∗) ≈ 2 GHz/ns), we obtain a Landau-Zener transition error chain may occur in any one of the d rows, leading to 1 − PLZ of about 4%. This error is unacceptably large. We d+ do not attempt here to perform a more quantitative analysis (1) d 1 P = d + p 2 . (A1) of the logical error rate for these architectures. However, we XL d 1 bf 2 emphasize that while microwave control-based gate protocols may prove to be useful for these cases, such gate operations Note that the chance of misidentification of these (d + 1)/2 have not yet been analyzed in the context of these designs. errors is 100% for this case because the classical error detection software is based on minimal-weight perfect matching. This V. CONCLUSION expression was previously derived in Ref. [7]. Case 2. In this case (d + 1)/2 errors occur in two consecu- We have investigated the logical error rate and fault- tive rows, as shown in Fig. 4. We refer to such an error chain tolerant error threshold for three superconducting surface as a “broken” error chain and call the point where the chain code implementations. While the coherence time has been changes its row as the “breaking point” (shown in Fig. 4). improving over the past few years for superconducting qubits, To estimate this case correctly one needs additional care with we discuss here the minimum coherence time required to error chains starting from one boundary and ending at the same achieve error correction. The logical error rate for d = 3 and boundary in a different row. We refer to such an error chain as a 5 is computed as a function of qubit coherence time and “clasp” (shown in Fig. 4). Notice that clasps are homologically the threshold is found to be dependent on the architecture, trivial and therefore should not be considered as a source of error model, and assumed gate protocol. Table III shows our logical error. In order not to count these clasps, we classify this main results. These error thresholds are within reach of current case into two mutually exclusive and exhaustive (to leading state-of-the-art superconducting circuit designs. The operation order) subcases: (i) when errors occur in horizontal links of a time requirements for qubit state preparation and readout are, surface code lattice and (ii) when there are no errors on the however, yet to be achieved experimentally to the accuracy horizontal links. Also, observe that chains with errors in more assumed in this work. Our analysis can be extended to the than one horizontal link contribute to a higher-order process future surface code architectures. As mentioned earlier, the and are therefore excluded from our leading-order analysis. effect of decoherence on the logical error rate is a primary focus If we think that the horizontal link with error divides a row in this work, and our error models neglect various higher-order into shorter and longer arms (also shown in Fig. 4), then for and unintended stray couplings between qubits. Exploring the subcase (i), the number of ways an error chain is formed (W1) effect of these factors is a possible direction of future research. is constrained by the condition that all sites of the shorter side cannot be filled with errors for any error chain since in ACKNOWLEDGMENTS that subcase one would be constructing a clasp. Satisfying this This work was supported by IARPA under ARO Grant No. condition, for a given orientation and a specific pair of adjacent W911NF-10-1-0334. It is a pleasure to thank John Martinis rows, we obtain, for many useful discussions and suggestions. d−1 d 2 d − r W1 = (d − 1) − 2 APPENDIX A: DERIVATION OF APPROXIMATE SURFACE d−1 d−1 − r CODE LOGICAL ERROR RATE 2 r=1 2 all possible chains clasps In this section we derive the logical error per qubit per d2 − 1 d cycle as a function of the single qubit error rates, to leading = . (A2) + d−1 order. Our derivation here does not include the “diagonal” d 3 2

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For subcase (ii) all the single physical qubit errors are with a probability qbf on one time slice along with (d − 1)/2 distributed among the vertical links in two adjacent rows. In bit-flip errors on data qubits in two subsequent time slices in this subcase, for a given distribution of single qubit errors, a single row, and (ii) when there are only (d + 1)/2 bit-flip in order not to overcount the homotopic error chains one errors on data qubits in two subsequent time slices in a single needs to adopt a convention to place the breaking point. row. Bit-flip error probability on a syndrome or data qubit Without loss of any generality, we adopt the convention in one of the two subsequent time slices is in fact pbf(1 − that the breaking point for this subcase is always placed pbf)orqbf(1 − qbf) and keeping only leading-order terms we right next to the rightmost error on the lower arm. Such a approximate those as pbf or qbf. Note that the two subcases of convention prevents overcounting of homotopic error chains. case 3 can be mapped exactly with the two subcases of case The remaining condition one needs to satisfy for this subcase 2 as far as their combinatorics are concerned and following a is not to place all single qubit errors on the longer arm of the similar argument as in case 2 we obtain error chain. This condition prevents us from overcounting case 2 − − d+1 1. Satisfying these conditions, we find the number of ways an (3) d 1 qbf d 1 d 2 P = d + p 2 , (A5) error chain is formed (W ) for subcase (ii) as XL + d−1 bf d 3 pbf 2 2 d+1 − 2 − 2 d 1 d r where the difference in the prefactor comes from the fact that W = (d − 1) − − − d 1 d 1 the single row for this case can be chosen in d ways. Assuming 2 r=2 2 qbf is of the same order of magnitude as pbf, we observe that all possible chains − Case 1 chains case 3 in fact contributes to the same order like the previous d − 1 d cases. Also assuming p = q and replacing the prefactor = . (A3) bf bf d−1 d with d − 1inEq.(A5), we can retrieve the right-hand side 2 2 of Eq. (A4). We claim that (except for these three cases) all Combining these results we obtain the logical X error other processes contribute higher-order terms as they involve probability per cycle for case 2 as multiple breaking points. Combining all the contributions we 1 d+1 obtain P (2) = 2(d − 1)[W1 + W2]p 2 XL 2 bf (3d + 5)(d − 1) (3d + 5)(d − 1) d d+1 P = d + (d − 1) = (d − 1) p 2 . (A4) XL 2(d + 3) + d−1 bf 2(d 3) 2 d2 − 1 q d − 1 d d+1 + bf + 2 In the first line, the factor of 2 comes from the orientation d d−1 pbf . (A6) d + 3 pbf 2 (bottom-left to top-right or top-left to bottom-right) of the 2 error chain, the factor of 1/2 denotes the fact that the classical As far as the topology of the logical error chains are concerned, error detection software misidentifies such an error chain with − there is no difference between logical X and Z errors, which a 50% probability, and d 1 corresponds to the number of enables us to use the same combinatorics to show that the adjacent pair of rows in a distance-d code. logical Z error probability Case 3. The third process that contributes to the same order involves error chains weaving through surfaces in different (3d + 5)(d − 1) time slices. In Fig. 11 we show a single row of a distance-5 P = d + (d − 1) ZL 2(d + 3) surface in two subsequent time slices. Note that the geometry 2 + of the locations of data qubits and measurement events for this d − 1 qpf d − 1 d d 1 + + 2 d d−1 ppf , (A7) case exactly correspond to the geometry of the broken error d + 3 ppf 2 chains discussed in case 2, except for the fact that the breaking 2 point is along a time-like direction instead of a space-like one. where ppf and qpf are phase-flip error probabilities (per cycle) In analogy with case 2 we argue that such a situation happens in the data and syndrome qubits, respectively. for two subcases: (i) when there is one measurement error At this point, we emphasize that our derivation never invokes any particular assumption about the internal steps of a surface code cycle and therefore is also valid in a situation where the capability of directly measuring three or four qubit Pauli operators is implicitly assumed. As pointed out in Refs. [39,40], for a surface code cycle where the measurement of multiqubit operators are replaced by a sequence of CNOT operations, additional error chains having pure diagonal links emerge. While these error chains also contribute to the leading order, the number of such error chains is negligible for FIG. 11. (Color online) Data qubits of a single row in a distance-5 low distances. To verify the performance of our analytic surface code is shown with red (light gray) filled circles in two expression, we assume a symmetric depolarization channel subsequent time slices. The blue (dark gray) filled circles denote error model for an eight-step surface code cycle (as described measurement locations. An error in any measurement location in Ref. [7]) and plot the logical X error rate per cycle as a generates two adjacent timelike syndrome events. function of single physical qubit error rate per timestep (pstep),

062318-10 SURFACE CODE WITH DECOHERENCE: AN ANALYSIS OF ... PHYSICAL REVIEW A 86, 062318 (2012) which is (approximately) related to pbf via channel of any three level quantum system are given by ⎛ ⎞ = 3 pbf 10√ 0 pstep . (A8) AD = ⎝ − ⎠ 2 8 E1 0 1 λ1 √ 0 , 00 1 − λ2 Figure 6 shows a comparison (for logical X error) of our ⎛ √ ⎞ analytical estimate and a numerical Monte Carlo simulation 0 λ1 0 AD = ⎝ ⎠ as obtained in Ref. [7]; it is evident that for low distances the E2 000, (B2) analytic estimate correctly captures the dominant behavior of 000 ⎛ ⎞ these error chains below threshold. √ 00 λ2 AD = ⎝ ⎠ E3 00 0 , APPENDIX B: COUPLED QUBIT MODEL 00 0 UNDER DECOHERENCE and the Kraus matrices for phase damping are given by In this section we compute the fidelity loss during a ⎛ ⎞ controlled-Z (CZ) gate for a coupled qubit model under 10√ 0 PD = ⎝ − ⎠ amplitude and phase damping. Such a model is important for E1 0 1 λ3 √ 0 , − the estimation of total CNOT gate time as well as intrinsic errors 00 1 λ4 ⎛ ⎞ for textbook architecture. Since we assume the couplers have (B3) 00√ 0 an infinite on-off ratio for this architecture, each pair of qubits PD = ⎝ ⎠ E2 0 λ3 √0 , gets decoupled from all other pairs for each intermediate step 00 λ of the error correction cycle and therefore each pair of coupled 4 qubits can be treated separately. Both the qubits are assumed where λk for k = 1,2,3,4 are the parameters of our deco- to have three levels and the Hamiltonian is given by herence model. We assume the same amplitude and phase ⎛ ⎞ ⎛ ⎞ damping probability for |1 and |2 states (λ ≡ λ1 = λ2 and 00 0 00 0 λ ≡ λ3 = λ4) and represent λ and λ as functions of time = ⎝0 ω (t)0⎠ + ⎝0 ω 0 ⎠ H (t) 1 2 duration ( t) and T1, T2 of the quantum system as 002ω1(t) − η 002ω2 − η q1 q2 − − 2 − 1 ⎛ ⎞ ⎛ ⎞ t/T1 t[ T T ] λ( t,T1) = 1 − e ,λ( t,T1,T2) = 1 − e 2 1 . 0 −i 0√ 0 −i 0√ ⎝ ⎠ ⎝ ⎠ (B4) + g i √0 −i 2 ⊗ i √0 −i 2 , 0 i 20 0 i 20 q1 q2 The assumption that decoherence affects each qubit (B1) independently enables us to construct the full Kraus matrices for the qubit-qubit model by performing all possible tensor where the suffix denotes the qubit index, g represents the products between individual single-qubit Kraus matrices. coupling between the qubits, and η is the anharmonicity of We first simulate the Hamiltonian given by Eq. (B1) for the qubit. For a CZ operation we control the frequency of the the parameters given in Table I without decoherence to first qubit [ω1(t)] with an error function pulse as described in obtain an optimal pulse shape that maximizes the average Ref. [22] while the frequency of the second qubit is kept fidelity of the CZ gate for a given coupling and gate time. constant. The Kraus matrices for the amplitude damping Next we apply our decoherence model described by Eqs. (B2) and (B3) on those optimal pulses. Figure 12 shows | −3 the plots of leakage error from 11 for such decoherence x 10 5.5 model (for T1 = 10 μs) applied on optimal pulses with g=45 MHz respect to various total gate times and for various values of g=50 MHz 5 g=55 MHz coupling strengths. Figure 12 also shows that there exists g=60 MHz an optimal point corresponding to total gate time ∼11 ns 4.5 g=65 MHz at g = 55 MHz for which the leakage from |11 state is the minimum under decoherence. We use this point for the CZ part 4 of the CNOT operation in textbook architecture and assuming that the local rotations can be performed almost exactly in 3.5 5ns,aCNOT requires 21-ns time duration as it involves two Hadamard operations along with a CZ. Table IV shows the 3 optimal parameters and the results obtained from this analysis. leakage prob from |11> state 2.5 TABLE IV. Optimal parameters and results obtained for CNOT gate in this coupled qubit model. We use these results for the 2 10 12 14 16 18 20 estimation of logical error rate in textbook architecture. total gate time (ns) ω (t = 0) ω ηgt p FIG. 12. (Color online) Plot of leakage probability from |11 state 1 2 CNOT intr under decoherence for various g during a CZ operation vs total CZ 8 GHz 6 GHz 300 MHz 55 MHz 21 ns 1.23 ×10−4 operation time.

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