In the Last Three Chapters We Discussed the Important Real-Time Task Scheduling Techniques
Total Page:16
File Type:pdf, Size:1020Kb
Load more
Recommended publications
-
Integrating Preemption Threshold Scheduling and Dynamic Voltage Scaling for Energy Efficient Real-Time Systems
Integrating Preemption Threshold Scheduling and Dynamic Voltage Scaling for Energy Efficient Real-Time Systems Ravindra Jejurikar1 and Rajesh Gupta2 1 Centre for Embedded Computer Systems, University of California Irvine, Irvine CA 92697, USA jeÞÞ@cec׺ÙciºedÙ 2 Department of Computer Science and Engineering, University of California San Diego, La Jolla, CA 92093, USA gÙÔØa@c׺Ùc×dºedÙ Abstract. Preemption threshold scheduling (PTS) enables designing scalable real-time systems. PTS not only decreases the run-time overhead of the system, but can also be used to decrease the number of threads and the memory require- ments of the system. In this paper, we combine preemption threshold scheduling with dynamic voltage scaling to enable energy efficient scheduling in real-time systems. We consider scheduling with task priorities defined by the Earliest Dead- line First (EDF) policy. We present an algorithm to compute threshold preemption levels for tasks with given static slowdown factors. The proposed algorithm im- proves upon known algorithms in terms of time complexity. Experimental results show that preemption threshold scheduling reduces on an average 90% context switches, even in the presence of task slowdown. Further, we describe a dynamic slack reclamation technique that working in conjunction with PTS that yields on an average 10% additional energy savings. 1 Introduction With increasing mobility and proliferation of embedded systems, low power consump- tion is an important aspect of embedded systems design. Generally speaking, the pro- cessor consumes a significant portion of the total energy, primarily due to increased computational demands. Scaling the processor frequency and voltage based on the per- formance requirements can lead to considerable energy savings. -
What Is an Operating System III 2.1 Compnents II an Operating System
Page 1 of 6 What is an Operating System III 2.1 Compnents II An operating system (OS) is software that manages computer hardware and software resources and provides common services for computer programs. The operating system is an essential component of the system software in a computer system. Application programs usually require an operating system to function. Memory management Among other things, a multiprogramming operating system kernel must be responsible for managing all system memory which is currently in use by programs. This ensures that a program does not interfere with memory already in use by another program. Since programs time share, each program must have independent access to memory. Cooperative memory management, used by many early operating systems, assumes that all programs make voluntary use of the kernel's memory manager, and do not exceed their allocated memory. This system of memory management is almost never seen any more, since programs often contain bugs which can cause them to exceed their allocated memory. If a program fails, it may cause memory used by one or more other programs to be affected or overwritten. Malicious programs or viruses may purposefully alter another program's memory, or may affect the operation of the operating system itself. With cooperative memory management, it takes only one misbehaved program to crash the system. Memory protection enables the kernel to limit a process' access to the computer's memory. Various methods of memory protection exist, including memory segmentation and paging. All methods require some level of hardware support (such as the 80286 MMU), which doesn't exist in all computers. -
Chapter 1. Origins of Mac OS X
1 Chapter 1. Origins of Mac OS X "Most ideas come from previous ideas." Alan Curtis Kay The Mac OS X operating system represents a rather successful coming together of paradigms, ideologies, and technologies that have often resisted each other in the past. A good example is the cordial relationship that exists between the command-line and graphical interfaces in Mac OS X. The system is a result of the trials and tribulations of Apple and NeXT, as well as their user and developer communities. Mac OS X exemplifies how a capable system can result from the direct or indirect efforts of corporations, academic and research communities, the Open Source and Free Software movements, and, of course, individuals. Apple has been around since 1976, and many accounts of its history have been told. If the story of Apple as a company is fascinating, so is the technical history of Apple's operating systems. In this chapter,[1] we will trace the history of Mac OS X, discussing several technologies whose confluence eventually led to the modern-day Apple operating system. [1] This book's accompanying web site (www.osxbook.com) provides a more detailed technical history of all of Apple's operating systems. 1 2 2 1 1.1. Apple's Quest for the[2] Operating System [2] Whereas the word "the" is used here to designate prominence and desirability, it is an interesting coincidence that "THE" was the name of a multiprogramming system described by Edsger W. Dijkstra in a 1968 paper. It was March 1988. The Macintosh had been around for four years. -
Tms320dm35x Dmsoc Timer/Watchdog Timer User's Guide
TMS320DM35x Digital Media System-on-Chip (DMSoC) Timer/Watchdog Timer Reference Guide Literature Number: SPRUEE5A May 2006–Revised September 2007 2 SPRUEE5A–May 2006–Revised September 2007 Submit Documentation Feedback Contents Preface ............................................................................................................................... 6 1 Introduction................................................................................................................ 9 1.1 Purpose of the Peripheral....................................................................................... 9 1.2 Features ........................................................................................................... 9 1.3 Functional Block Diagram ..................................................................................... 10 1.4 Industry Standard Compatibility Statement ................................................................. 10 2 Architecture – General-Purpose Timer Mode ................................................................ 10 2.1 Backward Compatible Mode (Timer 3 Only) ................................................................ 10 2.2 Clock Control.................................................................................................... 11 2.3 Signal Descriptions ............................................................................................. 12 2.4 Timer Modes .................................................................................................... 13 2.5 Timer -
A Hardware Preemptive Multitasking Mechanism Based on Scan-Path Register Structure for FPGA-Based Reconfigurable Systems
A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems S. Jovanovic, C. Tanougast and S. Weber Université Henri Poincaré, LIEN, 54506 Vandoeuvre lès Nancy, France [email protected] Abstract all the registers as well as all memories used in the circuit In this paper, we propose a hardware preemptive and to determine the starting point of the restoration multitasking mechanism which uses scan-path register process. On the other hand, the goal of the restoration is to structure and allows identifying the total task’s register restore the task’s context of processing as it was before its size for the FPGA-based reconfigurable systems. The interruption, in order to continue the execution previously main objective of this preemptive mechanism is to stopped. Several techniques allowing the hardware suspend hardware task having low priority, replace it by preemption are proposed in the literature. The pros and high-priority task and restart them at another time cons of mostly used approaches we will disscus in the (and/or from another area of the FPGA in FPGA-based following. designs). The main advantages of the proposed method The readback approach for context saving and storing are that it provides an attractive way for context saving of an outgoing task is one of the approaches which was and restoring of a hardware task without freezing other mostly used for the FPGA-based designs. No additional tasks during pre-emption phases and a small area hardware structures, simple implementation, no extra overhead. We show its feasibility by allowing us to design design efforts and no extra hardware consumption are the a simple computing example as well as the one of the most important advantages of this approach. -
SPECIFICATION (General Release)
HC05LJ5GRS/H REV 1 68HC05LJ5 SPECIFICATION (General Release) November 10, 1998 Semiconductor Products Sector Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola, Inc., 1998 November 10, 1998 GENERAL RELEASE SPECIFICATION TABLE OF CONTENTS Section Page SECTION 1 GENERAL DESCRIPTION 1.1 FEATURES..................................................................................................... -
Preemptive Multitasking on Atmel® AVR® Microcontroller
Advances in Information Science and Computer Engineering Preemptive Multitasking on Atmel® AVR® Microcontroller HABIBUR RAHMAN, Senthil Arumugam Muthukumaraswamy School of Engineering & Physical Sciences Heriot Watt University Dubai Campus Dubai International Academic City UNITED ARAB EMIRATES [email protected]; [email protected] Abstract: - This paper demonstrates the need for multitasking and scenario where multitasking is the only solution and how it can be achieved on an 8-bit AVR® microcontroller. This project explains how to create a simple kernel in a single C file, and execute any number of tasks in a multithreaded fashion. It first explains how the AVR® engine works and how it switches between different tasks using preemptive scheduling algorithm with the flexibility of blocking a task to allowing it more execution time based on their priority level. The code written for this project is basically in C, however the kernel code is mostly assembly functions called by C. The development environment is Atmel Studio®. The code is in such a way that it can be ported over any 8-bit AVR® microcontroller, however, this project demonstrates the results in both simulation and hardware chip on device Atmega8A. Key-Words: - AVR®, Microcontroller, Threading, Preemptive Scheduling, Multitasking. 1 Introduction architecture and will eventually lead to downloading Microcontroller development has been and compiling hundreds of files according to the exponential over the past two decades. Development provided operating system instructions and also in terms of speed, transistor density, multi-core spend time learning how to use it. embedding as well as number of peripheral subsystem on SoC(System on Chip) is common, and But if the user who has basic understanding of C development tools and compilers have been created language and very good understanding on that allows writing code for microcontroller on microcontroller wants to implement multitasking for higher level of abstraction layer an easy task. -
Software Techniques for Improving Microcontrollers EMC Performance
AN1015 Application note Software techniques for improving microcontrollers EMC performance Introduction A major contributor to improved EMC performance in microcontroller-based electronics systems is the design of hardened software. Problems induced by EMC disturbances need to be considered as early as possible in the design phase. EMC-oriented software increases the security and the reliability of your application. EMC-hardened software is inexpensive to implement, improves the final goods immunity performance and saves hardware and development costs. You should consider EMC disturbances to analog or digital data just like any other application parameter. Examples of problems induced by EMC disturbances: Microcontroller not responding Program Counter runaway Execution of unexpected instructions Bad address pointing Bad execution of subroutines Parasitic reset and/or parasitic interrupts Corruption of IP configuration I/O deprogramming Examples of consequences of failing software: Unexpected response of product Loss of context Unexpected branch in process Loss of interrupts Loss of data integrity Corrupted reading of input values. This application note deals with two categories of software techniques, namely: Preventive techniques: these can be implemented in existing designs, their purpose is to improve product robustness. Auto-recovery techniques: when a runaway condition is detected, a recovery subroutine is used to take the decision to execute fail-safe routines, optionally sending a warning and then automatically returning back to normal operations (this operation may be absolutely transparent to the user of the application). June 2014 DocID5833 Rev 2 1/19 www.st.com Contents AN1015 Contents 1 Related documents . 5 2 Preventive techniques . 6 2.1 Using the watchdog and time control techniques . -
UNIX History Page 1 Tuesday, December 10, 2002 7:02 PM
UNIX History Page 1 Tuesday, December 10, 2002 7:02 PM CHAPTER 1 UNIX Evolution and Standardization This chapter introduces UNIX from a historical perspective, showing how the various UNIX versions have evolved over the years since the very first implementation in 1969 to the present day. The chapter also traces the history of the different attempts at standardization that have produced widely adopted standards such as POSIX and the Single UNIX Specification. The material presented here is not intended to document all of the UNIX variants, but rather describes the early UNIX implementations along with those companies and bodies that have had a major impact on the direction and evolution of UNIX. A Brief Walk through Time There are numerous events in the computer industry that have occurred since UNIX started life as a small project in Bell Labs in 1969. UNIX history has been largely influenced by Bell Labs’ Research Editions of UNIX, AT&T’s System V UNIX, Berkeley’s Software Distribution (BSD), and Sun Microsystems’ SunOS and Solaris operating systems. The following list shows the major events that have happened throughout the history of UNIX. Later sections describe some of these events in more detail. 1 UNIX History Page 2 Tuesday, December 10, 2002 7:02 PM 2 UNIX Filesystems—Evolution, Design, and Implementation 1969. Development on UNIX starts in AT&T’s Bell Labs. 1971. 1st Edition UNIX is released. 1973. 4th Edition UNIX is released. This is the first version of UNIX that had the kernel written in C. 1974. Ken Thompson and Dennis Ritchie publish their classic paper, “The UNIX Timesharing System” [RITC74]. -
Beyond Preemption:The Law and Policy of Intellectual Property
Beyond Preemption:The Law and Policy of Intellectual Property Licensing Mark A. Lemley1† Table of Contents Introduction . I. The Tension Between Article 2B and Intellectual Property . A. Article 2B’s Expansion of the Scope and Power of Contracts . B. Potential Conflicts with Intellectual Property Law . 1. Patent Law . 2. Copyright Law . 3. Trade Secret Law . 4. Trademark Law . 5. Remedies . C. Conclusions . II. Preemption as a Partial Solution . A. The Nature of Intellectual Property Preemption . 1. The Basic Nature of Preemption . 2. Intellectual Property Preemption . a. Patent Law . b. Copyright Law . c. Applying Preemption to Contract Law . 1 Copyright © 1999 Mark A. Lemley and California Law Review, Inc. † Professor of Law, University of Texas School of Law; Visiting Professor of Law, Boalt Hall School of Law, University of California at Berkeley (Fall 1998); of counsel, Fish & Richardson P.C., Austin, Texas. I would like to thank Stephen Barnett, Julie Cohen, Richard Craswell, Robert Denicola, Rochelle Cooper Dreyfuss, Paul Goldstein, Robert Gomulkiewicz, Rose Hagan, Paul Heald, Dennis Karjala, Eric Lode, David McGowan, Charles McManis, Rob Merges, Maureen O’Rourke, Malla Pollack, Lloyd Weinreb, and participants in a faculty workshop at Stanford Law School and in the Berkeley Center for Law and Technology’s Conference on Article 2B of the Uniform Commercial Code for comments on an earlier draft. I would also like to thank Ryan Garcia and Sherri Shaw for research assistance. 111 CALIFORNIA LAW REVIEW [Vol. 87:111 B. The Limits of Preemption 1. Preemption Lacks Nuance . 2. Intellectual Property Rules Aren’t Always Statutory . 3. Intellectual Property Rules Aren’t Always Federal . -
Lecture 2 General Concepts of RTOS (Real-Time Operating System)
CENG 383 Real-Time Systems Lecture 2 General Concepts of RTOS (Real-Time Operating System) Asst. Prof. Tolga Ayav, Ph.D. Department of Computer Engineering İzmir Institute of Technology Operating System z Specialized collection of system programs is called operating system. z Must provide at least three specific functions: − Task scheduling − Task dispatching − İntertask communication z Kernel (Nucleus): The smallest portion of OS that provides those three essential functions. İzmir Institute of Technology Embedded Systems Lab Role of the Kernel İzmir Institute of Technology Embedded Systems Lab Three Kernel Functions OS Kernel - 3 functions: z Task Scheduler : To determine which task will run next in a multitasking system z Task Dispatcher: To perform necessary bookkeeping to start a task z Intertask Communication: To support communication between one process (i.e. task) and another İzmir Institute of Technology Embedded Systems Lab Kernel Design Strategies z Polled Loop Systems z Cyclic Executive z Cooperative Multitasking z Interrupt-Driven Systems z Foreground/Background Systems z Full featured RTOS İzmir Institute of Technology Embedded Systems Lab 1. Polled Loop Systems Polled loops are used for fast response to single devices. In a polled-loop system, a single and a repetitive instruction is used to test a flag that indicates whether or not some event has occurred. If the event has not occurred, then the polling continues. Example: suppose a software system is needed to handle packets of data that arrive at a rate of no more than 1 per second. A flag named packet_here is set by the network, which writes the data into the CPU’s memory via direct memory access (DMA). -
BIAS: Bluetooth Impersonation Attacks
BIAS: Bluetooth Impersonation AttackS Daniele Antonioli Nils Ole Tippenhauer Kasper Rasmussen School of Computer and Communication Sciences CISPA Helmholtz Center Department of Computer Science EPFL for Information Security University of Oxford daniele.antonioli@epfl.ch [email protected] [email protected] Abstract—Bluetooth (BR/EDR) is a pervasive technology for subsequent secure connections. Two Bluetooth devices are wireless communication used by billions of devices. The Bluetooth expected to pair once and securely connect multiple times. standard includes a legacy authentication procedure and a secure During secure connection establishment the devices have to authentication procedure, allowing devices to authenticate to each other using a long term key. Those procedures are used authenticate the possession of the long term key that they have during pairing and secure connection establishment to prevent established while pairing. impersonation attacks. In this paper, we show that the Bluetooth In a recent paper, researchers showed that Bluetooth secure specification contains vulnerabilities enabling to perform imper- connection establishment is vulnerable to man-in-the-middle sonation attacks during secure connection establishment. Such attacks, even if the victims are already paired [4]. In that work vulnerabilities include the lack of mandatory mutual authenti- cation, overly permissive role switching, and an authentication however, the attack assumes that there is a legitimate secure procedure downgrade. We describe each vulnerability in detail, connection to break into. The attacker cannot target isolated and we exploit them to design, implement, and evaluate master Bluetooth devices, because the attacker cannot prove possession and slave impersonation attacks on both the legacy authentication of the victims’ long term key during secure connection procedure and the secure authentication procedure.