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DN527 F01a PGM 1 10Nf IOVRETRY OVLO FCB LATCH SGND+ 5.6M

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DN527 F01a PGM 1 10Nf IOVRETRY OVLO FCB LATCH SGND+ 5.6M 10A µModule Step-Down Regulator with Advanced Input and Load Protection Design Note 527 Yan Liang Introduction (B) Load Protection Bus voltage surges pose a danger not only to the DC/DC • Robust, resettable latchoff overvoltage protection converter, but also to the load. Traditional overvoltage • N-Channel overvoltage crowbar power MOSFET protection schemes involving a fuse are not necessarily driver fast enough, nor dependable enough to protect loads such as FPGAs, ASICs and microprocessors. A better In addition, trip detection thresholds for the following solution is to accurately and quickly detect an overvolt- faults are customizable: input undervoltage, overtem- age condition and respond by quickly disconnecting the perature, input overvoltage and output overvoltage. input supply while discharging excess voltage at the Select fault conditions can be set for latchoff or hys- load with a low impedance path. This is possible with teretic restart response—or disabled. the protection features in the LTM ®4641. Output Overvoltage and Load Protection Power and Protection The common output overvoltage protection scheme used in the power supply and semiconductor control The LTM4641 is a 4.5V to 38V input, 0.6V to 6V output, IC industry is to turn on the synchronous (bottom) 10A step-down μModule® regulator with advanced MOSFET. This provides some overvoltage protection input and load protection options, including: during severe load current step-down events, but is not (A) Input Protection very effective at protecting loads from genuine fault • Undervoltage lockout, overvoltage shutdown with conditions such as a short-circuited high side power latchoff thresholds switching MOSFET. The LTM4641 provides best-in- class output overvoltage protection when an output • N-Channel overvoltage power-interrupt MOSFET crowbar MOSFET (MCB) and an input series MOSFET driver (MSP) are used together, as shown in Figure 1. • Surge stopper capable with few external components L, LT, LTC, LTM, Linear Technology, µModule and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. 4 VIN MSP* 1V Load Protected from MTOP 4V TO 38V + 10µF 3 4.5V START-UP 100µF Short-Circuit at 38VIN 50V 50V ×2 1 SHORT-CIRCUIT APPLIED VING VINGP VINH MTOP SW VOUT 1V V V 2 4 INL OUT 100µF 10A V , V (25V/DIV) 3 INL INH 750k MCB** × 3 CROWBAR CROWBAR (5V/DIV) 2 fSET MBOT 5.49k 1.1V PEAK + OUT UVLO VOSNS INTVCC LTM4641 LOAD 5.49k DRV – CC VOSNS VOUT RUN GND (200mV/DIV) TRACK/SS OV DN527 F01a PGM 1 10nF IOVRETRY OVLO FCB LATCH SGND+ 5.6M 4µs/DIV DN527 F01b TESTED AT WORST-CASE CONDITION: NO LOAD +SGND CONNECTS TO GND INTERNAL TO µMODULE REGULATOR *MSP: (OPTIONAL) SERIES-PASS OVERVOLTAGE POWER INTERRUPT MOSFET, NXP PSMN014-60LS **MCB: (OPTIONAL) OUTPUT OVERVOLTAGE CROWBAR MOSFET, NXP PH2625L Figure 1. LTM4641 with Input Disconnect and Fast Crowbar Output Overvoltage Protection 06/14/527 MCB is an external optional crowbar device residing been reset. These three pins give added flexibility to on VOUT. If the output voltage exceeds an adjustable tailor the behavior of the LTM4641. threshold —default value is 11% above nominal— VIN the LTM4641 pulls its CROWBAR output logic high + CIN(MLCC) CIN(BULK) 10µF immediately (500ns response time, maximum) and ×2 VINH latches off its output voltage: the power stage becomes VINL R high impedance, with both internal top and bottom TUV UVLO < 0.5V = OFF MOSFETs latched off. The CROWBAR output turns on UVLO RBUV RHYST LTM4641 MCB, discharging the output capacitors and preventing HYST HYST PULLS UP WHEN any further positive excursion of the output voltage. ON, HYST PULLS DOWN WHEN OFF RTOV MSP is placed between the input power source (V ) IOVRETRY > 0.5V = OFF IN IOVRETRY and the LTM4641's power stage input pins (V ), and is INH RMOV OVLO > 0.5V = LATCHOFF used as a resettable electronic power-interrupt switch. OVLO When a fault condition, such as an output overvoltage RBOV SGND GND (OOV) condition, is detected by the LTM4641’s internal AN527 F02 circuitry, the gate of MSP is discharged within 2.6μs SGND CONNECTS TO GND INTERNAL TO MODULE. KEEP SGND ROUTES/PLANES SEPARATE FROM GND (maximum) and MSP turns off. The input source sup- ON MOTHERBOARD ply is thus disconnected from the LTM4641’s power stage input (VINH), preventing the hazardous (input) Figure 2. Circuit to Set the Input UVLO, IOVRETRY voltage from reaching the precious load. LTM4641 and OVLO Thresholds also uses an independent reference voltage to gener- ate an OOV threshold, separate from the control IC’s Efficiency bandgap voltage. Figure 3 below shows the efficiency curves for the LTM4641 for a typical 12V input voltage for the circuit Figure 1 shows the CROWBAR and VOUT waveforms in Figure 1. With all the protection circuits, LTM4641 when the top MOSFET MTOP fails, causing a short- can still achieve high efficiency. circuit between the VIN and SW nodes. CROWBAR goes high within 500ns and turns on MCB to short 95 the output to ground. VOUT never exceeds 110% of the 90 specified output voltage. 85 Input Overvoltage and Undervoltage Protections 80 6.0VOUT The LTM4641 has input undervoltage and overvoltage 5.0VOUT 75 protections, whose trip thresholds can be set by the 3.3VOUT EFFICIENCY (%) 2.5VOUT user. Please refer to Figure 2. 70 1.8VOUT 1.5VOUT 1.2V 65 OUT The UVLO pin feeds directly into the inverting input 1.0VOUT 0.9VOUT of a comparator whose trip threshold is 0.5V. When 60 0 1 2 3 4 5 6 7 8 109 the UVLO pin falls below 0.5V, switching action is OUTPUT CURRENT (A) inhibited; when the UVLO pin exceeds 0.5V, switching DN527 F03 action can resume. The IOVRETRY and OVLO pins each Figure 3. Efficiency Curves of LTM4641 feed directly into noninverting inputs of comparators whose trip thresholds are 0.5V. When the IOVRETRY Conclusion pin exceeds 0.5V, switching action is inhibited; when The LTM4641 μModule regulator monitors input IOVRETRY falls below 0.5V, switching action can voltage, output voltage and temperature conditions. resume. When the OVLO pin exceeds 0.5V, switching It can provide comprehensive electrical and thermal action is inhibited; when OVLO subsequently falls below protection from excessive voltage stress for loads such 0.5V, switching action cannot occur until the latch has as processors, ASICs and high end FPGAs. Data Sheet Download For applications help, www.linear.com/LTM4641 call (408) 432-1900, Ext. 3979 dn527 LT/AP 0614 111K • PRINTED IN THE USA Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 ● ● (408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 2014.
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