High Resolution Aerospace Applications Using the NASA Columbia Supercomputer
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A Look at the Impact of High-End Computing Technologies on NASA Missions
A Look at the Impact of High-End Computing Technologies on NASA Missions Contributing Authors Rupak Biswas Jill Dunbar John Hardman F. Ron Bailey Lorien Wheeler Stuart Rogers Abstract From its bold start nearly 30 years ago and continuing today, the NASA Advanced Supercomputing (NAS) facility at Ames Research Center has enabled remarkable breakthroughs in the space agency’s science and engineering missions. Throughout this time, NAS experts have influenced the state-of-the-art in high-performance computing (HPC) and related technologies such as scientific visualization, system benchmarking, batch scheduling, and grid environments. We highlight the pioneering achievements and innovations originating from and made possible by NAS resources and know-how, from early supercomputing environment design and software development, to long-term simulation and analyses critical to design safe Space Shuttle operations and associated spinoff technologies, to the highly successful Kepler Mission’s discovery of new planets now capturing the world’s imagination. Keywords Information Technology and Systems; Aerospace; History of Computing; Parallel processors, Processor Architectures; Simulation, Modeling, and Visualization The story of NASA’s IT achievements is not complete without a chapter on the important role of high-performance computing (HPC) and related technologies. In particular, the NASA Advanced Supercomputing (NAS) facility—the space agency’s first and largest HPC center—has enabled remarkable breakthroughs in NASA’s science and engineering missions, from designing safer air- and spacecraft to the recent discovery of new planets. Since its bold start nearly 30 years ago and continuing today, NAS has led the way in influencing the state-of-the-art in HPC and related technologies such as high-speed networking, scientific visualization, system benchmarking, batch scheduling, and grid environments. -
Low-Power Computing
LOW-POWER COMPUTING Safa Alsalman a, Raihan ur Rasool b, Rizwan Mian c a King Faisal University, Alhsa, Saudi Arabia b Victoria University, Melbourne, Australia c Data++, Toronto, Canada Corresponding email: [email protected] Abstract With the abundance of mobile electronics, demand for Low-Power Computing is pressing more than ever. Achieving a reduction in power consumption requires gigantic efforts from electrical and electronic engineers, computer scientists and software developers. During the past decade, various techniques and methodologies for designing low-power solutions have been proposed. These methods are aimed at small mobile devices as well as large datacenters. There are techniques that consider design paradigms and techniques including run-time issues. This paper summarizes the main approaches adopted by the IT community to promote Low-power computing. Keywords: Computing, Energy-efficient, Low power, Power-efficiency. Introduction In the past two decades, technology has evolved rapidly affecting every aspect of our daily lives. The fact that we study, work, communicate and entertain ourselves using all different types of devices and gadgets is an evidence that technology is a revolutionary event in the human history. The technology is here to stay but with big responsibilities comes bigger challenges. As digital devices shrink in size and become more portable, power consumption and energy efficiency become a critical issue. On one end, circuits designed for portable devices must target increasing battery life. On the other end, the more complex high-end circuits available at data centers have to consider power costs, cooling requirements, and reliability issues. Low-power computing is the field dedicated to the design and manufacturing of low-power consumption circuits, programming power-aware software and applying techniques for power-efficiency [1][2]. -
Overview and History Nas Overview
zjjvojvovo OVERVIEWNAS OVERVIEW AND HISTORY a Look at NAS’ 25 Years of Innovation and a Glimpse at the Future In the mid-1970s, a group of Ames aerospace researchers began to study a highly innovative concept: NASA could transform U.S. aerospace R&D from the costly and cghghmgm time-consuming wind tunnel-based process to simulation-centric design and engineer- ing by executing emerging computational fluid dynamics (CFD) models on supercom- puters at least 1,000 times more powerful than those commercially available at the time. In 1976, Ames Center Director Dr. Hans Mark tasked a group led by Dr. F. Ronald Bailey to explore this concept, leading to formation of the Numerical Aerodynamic Simulator (NAS) Projects Office in 1979. At the same time, a user interface group was formed consisting of CFD leaders from industry, government, and academia to help guide requirements for the NAS concept gmfgfgmfand provide feedback on evolving computer feasibility studies. At the conclusion of these activities in 1982, NASA management changed the NAS approach from a focus on purchasing a specially developed supercomputer to an on-going Numerical Aerody- namic Simulation Program to provide leading-edge computational capabilities based on an innovative network-centric environment. The NAS Program plan for implementing this new approach was signed on February 8, 1983. Grand Opening As the NAS Program got underway, a projects office to a full-fledged division its first supercomputers were installed at Ames. In January 1987, NAS staff and in Ames’ Central Computing Facility, equipment were relocated to the new starting with a Cray X-MP-12 in 1984. -
HOW MODERATE-SIZED RISC-BASED Smps CAN OUTPERFORM MUCH LARGER DISTRIBUTED MEMORY Mpps
HOW MODERATE-SIZED RISC-BASED SMPs CAN OUTPERFORM MUCH LARGER DISTRIBUTED MEMORY MPPs D. M. Pressel Walter B. Sturek Corporate Information and Computing Center Corporate Information and Computing Center U.S. Army Research Laboratory U.S. Army Research Laboratory Aberdeen Proving Ground, Maryland 21005-5067 Aberdeen Proving Ground, Maryland 21005-5067 Email: [email protected] Email: sturek@arlmil J. Sahu K. R. Heavey Weapons and Materials Research Directorate Weapons and Materials Research Directorate U.S. Army Research Laboratory U.S. Army Research Laboratory Aberdeen Proving Ground, Maryland 21005-5066 Aberdeen Proving Ground, Maryland 21005-5066 Email: [email protected] Email: [email protected] ABSTRACT: Historically, comparison of computer systems was based primarily on theoretical peak performance. Today, based on delivered levels of performance, comparisons are frequently used. This of course raises a whole host of questions about how to do this. However, even this approach has a fundamental problem. It assumes that all FLOPS are of equal value. As long as one is only using either vector or large distributed memory MIMD MPPs, this is probably a reasonable assumption. However, when comparing the algorithms of choice used on these two classes of platforms, one frequently finds a significant difference in the number of FLOPS required to obtain a solution with the desired level of precision. While troubling, this dichotomy has been largely unavoidable. Recent advances involving moderate-sized RISC-based SMPs have allowed us to solve this problem. -
Introduction to Analysis of Algorithms Introduction to Sorting
Introduction to Analysis of Algorithms Introduction to Sorting CS 311 Data Structures and Algorithms Lecture Slides Monday, February 23, 2009 Glenn G. Chappell Department of Computer Science University of Alaska Fairbanks [email protected] © 2005–2009 Glenn G. Chappell Unit Overview Recursion & Searching Major Topics • Introduction to Recursion • Search Algorithms • Recursion vs. NIterationE • EliminatingDO Recursion • Recursive Search with Backtracking 23 Feb 2009 CS 311 Spring 2009 2 Unit Overview Algorithmic Efficiency & Sorting We now begin a unit on algorithmic efficiency & sorting algorithms. Major Topics • Introduction to Analysis of Algorithms • Introduction to Sorting • Comparison Sorts I • More on Big-O • The Limits of Sorting • Divide-and-Conquer • Comparison Sorts II • Comparison Sorts III • Radix Sort • Sorting in the C++ STL We will (partly) follow the text. • Efficiency and sorting are in Chapter 9. After this unit will be the in-class Midterm Exam. 23 Feb 2009 CS 311 Spring 2009 3 Introduction to Analysis of Algorithms Efficiency [1/3] What do we mean by an “efficient” algorithm? • We mean an algorithm that uses few resources . • By far the most important resource is time . • Thus, when we say an algorithm is efficient , assuming we do not qualify this further , we mean that it can be executed quickly . How do we determine whether an algorithm is efficient? • Implement it, and run the result on some computer? • But the speed of computers is not fixed. • And there are differences in compilers, etc. Is there some way to measure efficiency that does not depend on the system chosen or the current state of technology? 23 Feb 2009 CS 311 Spring 2009 4 Introduction to Analysis of Algorithms Efficiency [2/3] Is there some way to measure efficiency that does not depend on the system chosen or the current state of technology? • Yes! Rough Idea • Divide the tasks an algorithm performs into “steps”. -
Software Design Pattern Using : Algorithmic Skeleton Approach S
International Journal of Computer Network and Security (IJCNS) Vol. 3 No. 1 ISSN : 0975-8283 Software Design Pattern Using : Algorithmic Skeleton Approach S. Sarika Lecturer,Department of Computer Sciene and Engineering Sathyabama University, Chennai-119. [email protected] Abstract - In software engineering, a design pattern is a general reusable solution to a commonly occurring problem in software design. A design pattern is not a finished design that can be transformed directly into code. It is a description or template for how to solve a problem that can be used in many different situations. Object-oriented design patterns typically show relationships and interactions between classes or objects, without specifying the final application classes or objects that are involved. Many patterns imply object-orientation or more generally mutable state, and so may not be as applicable in functional programming languages, in which data is immutable Fig 1. Primary design pattern or treated as such..Not all software patterns are design patterns. For instance, algorithms solve 1.1Attributes related to design : computational problems rather than software design Expandability : The degree to which the design of a problems.In this paper we try to focous the system can be extended. algorithimic pattern for good software design. Simplicity : The degree to which the design of a Key words - Software Design, Design Patterns, system can be understood easily. Software esuability,Alogrithmic pattern. Reusability : The degree to which a piece of design can be reused in another design. 1. INTRODUCTION Many studies in the literature (including some by 1.2 Attributes related to implementation: these authors) have for premise that design patterns Learn ability : The degree to which the code source of improve the quality of object-oriented software systems, a system is easy to learn. -
Curtis Huttenhower Associate Professor of Computational Biology
Curtis Huttenhower Associate Professor of Computational Biology and Bioinformatics Department of Biostatistics, Chan School of Public Health, Harvard University 655 Huntington Avenue • Boston, MA 02115 • 617-432-4912 • [email protected] Academic Appointments July 2009 - Present Department of Biostatistics, Harvard T.H. Chan School of Public Health April 2013 - Present Associate Professor of Computational Biology and Bioinformatics July 2009 - March 2013 Assistant Professor of Computational Biology and Bioinformatics Education November 2008 - June 2009 Lewis-Sigler Institute for Integrative Genomics, Princeton University Supervisor: Dr. Olga Troyanskaya Postdoctoral Researcher August 2004 - November 2008 Computer Science Department, Princeton University Adviser: Dr. Olga Troyanskaya Ph.D. in Computer Science, November 2008; M.A., June 2006 August 2002 - May 2004 Language Technologies Institute, Carnegie Mellon University Adviser: Dr. Eric Nyberg M.S. in Language Technologies, December 2003 August 1998 - November 2000 Rose-Hulman Institute of Technology B.S. summa cum laude, November 2000 Majored in Computer Science, Chemistry, and Math; Minored in Spanish August 1996 - May 1998 Simon's Rock College of Bard A.A., May 1998 Awards, Honors, and Scholarships • ISCB Overton PriZe (Harvard Chan School, 2015) • eLife Sponsored Presentation Series early career award (Harvard Chan School, 2014) • Presidential Early Career Award for Scientists and Engineers (Harvard Chan School, 2012) • NSF CAREER award (Harvard Chan School, 2010) • Quantitative -
Infiniband Shines on the Top500 List of World's Fastest Computers
InfiniBand Shines on the Top500 List of World’s Fastest Computers InfiniBand Drives Two Top Ten Supercomputers and Gains Widespread Adoption for Clustering and Storage PITTSBURGH, PA - November 9, 2004 - (SuperComputing 2004) – Mellanox® Technologies Ltd, the leader in performance business and technical computing interconnects, announced today that the InfiniBand interconnect is used on more than a dozen systems on the prestigious Top500 list of the world's fastest computers, including two systems which achieved a top ten ranking. The latest Top500 list (www.top500.org) was unveiled this week at SuperComputing 2004 – the world’s leading conference on high performance computing (HPC). This represents more than a 400% growth since last year when InfiniBand technology made its debut on the list with just three entries. The Top500 computer list is a bellwether technology indicator for the broader performance busi- ness computing and technical computing markets. InfiniBand is being broadly adopted for numer- ically intensive applications including CAD/CAM, oil and gas exploration, fluid dynamics, weather modeling, molecular dynamics, gene sequencing, etc. These applications benefit from the high throughput, low latency InfiniBand interconnect - which allows industry standard servers to be connected together to create powerful computers at unmatched price/performance levels. These InfiniBand clustered computers deliver a 20X price/performance advantage vs. traditional mainframe systems. InfiniBand enables NASA’s Columbia supercomputer to claim its status as the second fastest computer in the world. Columbia uses InfiniBand to connect twenty Itanium-based Silicon Graphics platforms into a 10,240 processor supercomputer that achieves over 51.8 Tflops of sus- Mellanox Technologies Inc. -
ALGORITHMIC EFFICIENCY INDICATOR for the OPTIMIZATION of ROUTE SIZE Ciro Rodríguez National University Mayor De San Marcos
3C Tecnología. Glosas de innovación aplicadas a la pyme. ISSN: 2254 – 4143 Ed. 34 Vol. 9 N.º 2 Junio - Septiembre ALGORITHMIC EFFICIENCY INDICATOR FOR THE OPTIMIZATION OF ROUTE SIZE Ciro Rodríguez National University Mayor de San Marcos. Lima, (Perú). E-mail: [email protected] ORCID: https://orcid.org/0000-0003-2112-1349 Miguel Sifuentes National University Mayor de San Marcos. Lima, (Perú). E-mail: [email protected] ORCID: https://orcid.org/0000-0002-0178-0059 Freddy Kaseng National University Federico Villarreal. Lima, (Perú). E-mail: [email protected] ORCID: https://orcid.org/0000-0002-2878-9053 Pedro Lezama National University Federico Villarreal. Lima, (Perú). E-mail: [email protected] ORCID: https://orcid.org/0000-0001-9693-0138 Recepción: 06/02/2020 Aceptación: 23/03/2020 Publicación: 15/06/2020 Citación sugerida: Rodríguez, C., Sifuentes, M., Kaseng, F., y Lezama, P. (2020). Algorithmic efficiency indicator for the optimization of route size. 3C Tecnología. Glosas de innovación aplicadas a la pyme, 9(2), 49-69. http://doi.org/10.17993/3ctecno/2020. v9n2e34.49-69 49 3C Tecnología. Glosas de innovación aplicadas a la pyme. ISSN: 2254 – 4143 Ed. 34 Vol. 9 N.º 2 Junio - Septiembre ABSTRACT In software development, sometimes experienced programmers have difficulty determining before performing their tests, which algorithm will work best to solve a particular problem, and the answer to the question will always depend on the type of problem and nature of the data to be used, in this situation, it is necessary to identify which indicator is the most useful for a specific type of problem and especially in route optimization. -
Epstein Institute Seminar Ise
EPSTEIN INSTITUTE SEMINAR ▪ ISE 651 The Many Faces of Regularization: from Signal Recovery to Online Algorithms ABSTRACT - Regularization plays important and distinct roles in optimization. In the first part of the talk, we consider sample- efficient recovery of signals with low-dimensional structure, where the key is choosing the right regularizer. While regularizers are well- understood for signals with a single structure (l1 norm for sparsity, nuclear norm for low rank matrices, etc.), the situation is more complicated when the signal has several structures simultaneously (e.g., sparse phase retrieval, sparse PCA). A common approach is to combine the regularizers that are sample-efficient for each individual structure. We present an analysis that challenges this approach: we prove it can be highly suboptimal in the number of samples, thus new regularizers are needed for sample-efficient recovery. Regularization is also employed for algorithmic efficiency. In the second part of the talk, we consider online resource allocation: sequentially allocating resources in response to online demands, with resource constraints that couple the decisions across time. Such problems arise in operations research (revenue management), computer science (online packing & covering), and e-commerce (?Adwords? problem in internet advertising). We examine primal- dual algorithms with a focus on the (worst-case) competitive ratio. We show how certain regularization (or smoothing) can improve this ratio, and how to seek the optimal regularization by solving a Dr. Maryam Fazel convex problem. This approach allows us to design effective Associate Professor regularization customized for a given cost function. The framework Department of Electrical and also extends to certain semidefinite programs, such as online D- Computer Engineering optimal and A-optimal experiment design problems. -
Science Journals — AAAS
RESEARCH ◥ and sporadically and must ultimately face di- REVIEW SUMMARY minishing returns. As such, we see the big- gest benefits coming from algorithms for new COMPUTER SCIENCE problem domains (e.g., machine learning) and from developing new theoretical machine There’s plenty of room at the Top: What will drive models that better reflect emerging hardware. ◥ Hardware architectures computer performance after Moore’s law? ON OUR WEBSITE can be streamlined—for Read the full article instance, through proces- Charles E. Leiserson, Neil C. Thompson*, Joel S. Emer, Bradley C. Kuszmaul, Butler W. Lampson, at https://dx.doi. sor simplification, where Daniel Sanchez, Tao B. Schardl org/10.1126/ a complex processing core science.aam9744 is replaced with a simpler .................................................. core that requires fewer BACKGROUND: Improvements in computing in computing power stalls, practically all in- transistors. The freed-up transistor budget can power can claim a large share of the credit for dustries will face challenges to their produc- then be redeployed in other ways—for example, manyofthethingsthatwetakeforgranted tivity. Nevertheless, opportunities for growth by increasing the number of processor cores in our modern lives: cellphones that are more in computing performance will still be avail- running in parallel, which can lead to large powerful than room-sized computers from able, especially at the “Top” of the computing- efficiency gains for problems that can exploit 25 years ago, internet access for nearly half technology stack: software, algorithms, and parallelism. Another form of streamlining is the world, and drug discoveries enabled by hardware architecture. domain specialization, where hardware is cus- powerful supercomputers. Society has come tomized for a particular application domain. -
Understanding and Improving Graph Algorithm Performance
Understanding and Improving Graph Algorithm Performance Scott Beamer Electrical Engineering and Computer Sciences University of California at Berkeley Technical Report No. UCB/EECS-2016-153 http://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/EECS-2016-153.html September 8, 2016 Copyright © 2016, by the author(s). All rights reserved. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission. Understanding and Improving Graph Algorithm Performance by Scott Beamer III A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Computer Science in the Graduate Division of the University of California, Berkeley Committee in charge: Professor Krste Asanovi´c,Co-chair Professor David Patterson, Co-chair Professor James Demmel Professor Dorit Hochbaum Fall 2016 Understanding and Improving Graph Algorithm Performance Copyright 2016 by Scott Beamer III 1 Abstract Understanding and Improving Graph Algorithm Performance by Scott Beamer III Doctor of Philosophy in Computer Science University of California, Berkeley Professor Krste Asanovi´c,Co-chair Professor David Patterson, Co-chair Graph processing is experiencing a surge of renewed interest as applications in social networks and their analysis have grown in importance. Additionally, graph algorithms have found new applications in speech recognition and the sciences. In order to deliver the full potential of these emerging applications, graph processing must become substantially more efficient, as graph processing's communication-intensive nature often results in low arithmetic intensity that underutilizes available hardware platforms.