npn BJT Stages: Common-Emitter (CE) Small-Signal Model of CE Amplifier

1. Bias amplifier in high- region n The small-signal model is evaluated at the bias point; we assume that the current gain is bo = 100 and the Early voltage is VAn = 25 V: Note that the source RS and the load resistor RL are removed for determining the bias point; the small-signal source is ignored, as well. gm = IC / Vth (at room temperature) Use the load-line technique to find VBIAS = VBE and IC = ISUP. rp = bo/ gm = 10 kW 2. Determine two-port model parameters ro = VAn / IC = 100 kW

n Substitute small-signal model for BJT; VCC and VBIAS are short-circuited for small-signals

EE 105 Fall 2000 Page 1 Week 10 EE 105 Fall 2000 Page 2 Week 10 Two-Port Model: CE Amplifier Common-Base Amplifier n Use amplifier form for model (not mandatory) Input current is applied to the emitter (with a bias ) and the output current is taken from the collector n Rin = rp, Rout = ro || roc, Gm = gm by inspection

n Compare with CS amplifier inferior input resistance superior transconductance

about the same output resistance (assuming ro dominates)

EE 105 Fall 2000 Page 3 Week 10 EE 105 Fall 2000 Page 4 Week 10 Two-Port Model Common-Collector Amplifier n See text for details of nodal analysis n Circuit configuration

Rin@ 1 ¤ gm , Rout@ roc[ro(1 + gm(rp RS)) ] , Ai = –bo ¤ (1 + bo) @ –1

n CB stage is an excellent current buffer

n : if is “on” (i.e., not cutoff), then Comparison with the CG stage: VBIAS - VOUT = 0.7 V. Plot -- note the effect of the source resistance on the output resistance

if RS is much greater than rp, then the output resistance is approximately:

Rout» roc[bro]

Alternative name ... emitter follower

EE 105 Fall 2000 Page 5 Week 10 EE 105 Fall 2000 Page 6 Week 10 Two-Port Model Summary of BJT Single-Stage n Two-port model: Why no pnp’s?

presence of rp makes the analysis more involved than for a

Note 1: both the input and the output resistances depend on the load and source resistances, respectively (note typo in Fig. 8.47 in text) Note 2: this model is approximate and can give erroneous results for extremely low values of RL. However, it is very convenient for hand analysis.

Comparison with CD stage: CC’s input resistance: high but not infinity

CC’s output resistance: generally lower (but watch out for large RS)

EE 105 Fall 2000 Page 7 Week 10 EE 105 Fall 2000 Page 8 Week 10 Single-Stage MOS and BJT Amplifier DC Voltage and Current Sources

n Output characteristics of a BJT or MOSFET look like a family of current sources ... how do we pick one?

specify the gate-source voltage VGS in order to select the desired current level for a MOSFET ( specify VBE exactly for a BJT) how do we generate a precise voltage? ... we use a current source to set the current in a “diode-connected” MOSFET

(wait a minute ... where do we find IREF? Assume that one is available!)

æW ö 2 iD = IREF+ iOUT @ ------m Cox(vOUT– VTn ) è2Lø n

EE 105 Fall 2000 Page 9 Week 10 EE 105 Fall 2000 Page 10 Week 10 DC Voltage Sources Totem Pole Voltage Sources n Solving for the output voltage n Define a series of bias voltages between the positive and the negative supply voltages.

IREF+ iOUT vOUT= VTn+ ------æ-----W-öm C è2Lø n ox

-2 If ID = 100 mA, mn = 50 mAV , (W / L) = 20, VTn = 1 V, then

VOUT = 1.45 V for IOUT = 0 A. n Stack up two diode-connected MOSFETs

n In practice, output currents are small (or zero), so that the DC bias voltages are set by IREF

EE 105 Fall 2000 Page 11 Week 10 EE 105 Fall 2000 Page 12 Week 10 MOSFET Current Sources MOSFET Current Sources (cont.)

n Bias the n-channel MOSFET with a MOSFET DC voltage source! n Output current is scaled from IREF by a geometrical ratio:

æö2 çI ÷ i = i = æ-----W-ö m C V + ------REF - –V OUT D2 èø n oxçTn Tn ÷ 2L 2 çæW ö ÷ è------mnCox ø è2Lø 1

æ(W¤ L )2ö IOUT= ç------÷ IREF è(W¤ L )1ø n Intuitively, VREF is set by IREF and determines the output current of M2

IREF VREF= VTn+ ------=VGS1 = VGS2 æW ö ------mnCox è2Lø 1

Substituting into the drain current of M2 (and neglecting (1 + lnVDS2) term)

æW ö 2 iOUT= iD2 = ------mnCox(VGS2 – VTn ) è2Lø 2

EE 105 Fall 2000 Page 13 Week 10 EE 105 Fall 2000 Page 14 Week 10 MOSFET Current Source Equivalent Circuit The Current Source

n Small-signal model: source resistance is ro2 by inspection n In order to boost the source resistance, we can study our single-stage building blocks and recognize that a common-gate is attractive, due to its high output resistance

n Combine output resistance with DC output current for approximate equivalent circuit ... actual iOUT vs. vOUT characteristics are those of M2 with VGS2 = VREF

n Adapting the output resistance for a amplifier, the cascode current source has a source resistance of

roc= (1 + gm4ro2)ro4 » gm4ro4ro2 n Penalty for cascode:

needs larger VOUT to function

The model is only valid for vDS = vOUT > vDS(SAT) = VGS - VTn

EE 105 Fall 2000 Page 15 Week 10 EE 105 Fall 2000 Page 16 Week 10 MOSFET Current “Mirrors” Two-Port Parameters for Single-Stage Amplifiers n n-channel current source sinks current to ground ... how do we source current from the positive supply? Answer: p-channel current sources...? Input Resistance Output Resistance Amplifier Type Controlled Source Rin Rout

Common Gm = gm rp ro || roc Emitter

Common Gm = gm infinity ro || roc Source

Common Ai = -1 1 / gm roc || [(1 + gm(rp||RS)) ro], Base for gmro >> 1

Common 1 / gm, (vsb = 0) roc ||[(1 + gm RS)ro], (vsb=0) Gate Ai = -1 -otherwise- -otherwise- 1 / (gm + gmb) roc || [(1+ (gm + gmb)RS) ro] both for ro >> RS n By mixing n-channel and p-channel diode-connected devices, we can produce Common Av = 1 rp + bo(ro || roc|| RL) (1 / gm ) + RS / bo current sinks and sources from a reference current connected to VDD or ground. Collector

Common Av = 1 if vsb = 0, infinity 1 / gm if vsb = 0, Drain -otherwise- -otherwise- gm / (gm + gmb) 1 / (gm + gmb)

Note: appropriate two-port model is used, depending on controlled source

EE 105 Fall 2000 Page 17 Week 10 EE 105 Fall 2000 Page 18 Week 10 Sinusoidal Function Review Frequency Response

Sinusoidal functions are important is analog signal processing Key concept: small-signal models for amplifiers are linear and therefore, cosines and sines are solutions of the linear differential equations which arise v(t)= vcos (wt + f) from R, C, and controlled source (e.g., Gm) networks. phase (degrees amplitude frequency or radians) (half of (radian) ... w = 2p f = 2p (1/T) n The problem: finding the solutions to the differential equations is TEDIOUS peak-to-peak) and provides little insight into the behavior of the circuit!

vout(t) v1(t)= vcos (wt) R vs(t) C v2(t)= vcos (wt – 45 ) 2p w = ------T T

1. EECS 20/120: periodic functions can be represented as sums of sinusoids functions at different frequencies. 2. The response of a circuit to a sinusoidal input signal, as a function of the frequency, leads to insights into the behavior of the circuit.

EE 105 Fall 2000 Page 19 Week 10 EE 105 Fall 2000 Page 20 Week 10 Phasors Circuit Analysis with Phasors

It is much more efficient to work with imaginary exponentials as “representing” the n The current through a capacitor is proportional to the derivative of the voltage: sinusoidal voltages and currents ... since these functions are solutions of linear d differential equations and i(t)= C v(t) dt jwt jwt We assume that all signals in the circuit are represented by sinusoids. ---d- (e )= jw(e ) dt Substitution of the phasor expression for voltage leads to: How to connect the exponential to the measured function v(t)? Conventionally, v(t) is the real part of the of the imaginary exponential jwt jwt d jwt jwt (jwt + f) jf jwt v(t)®Ve ¼Ie = C (Ve )= jwCVe v(t)= vcos(wt + f) ® Re(ve ) = Re(ve e ) dt where v is the amplitude and f is the phase of the sinusoidal signal v(t). which implies that the ratio of the phasor voltage to the phasor current through a The phasor V is defined as the complex number capacitor (the impedance) is

jf V= ve V 1 Z(jw)= ---= ------I jwC Therefore, the measured function is related to the phasor by

n Implication: the phasor current is linearly proportional to the phasor voltage, making it possible to solve circuits involving capacitors and inductors as rapidly jwt v(t)= Re(Ve ) as resistive networks ... as long as all signals are sinusoidal.

EE 105 Fall 2000 Page 21 Week 10 EE 105 Fall 2000 Page 22 Week 10 Phasor Analysis of the Low-Pass Filter Frequency Response of LPF Circuits

n Voltage divider with impedances -- The phasor ratio Vout / Vin is called the transfer function for the circuit

How to describe Vout / Vin?

complex number ... could plot Re(Vout / Vin) and Im(Vout / Vin) versus frequency polar form translates better into what we measure on the oscilloscope ... the magnitude (determines the amplitude) and the phase

n “Bode plots”:

magnitude and phase of the phasor ratio:Vout / Vin range of frequencies is very wide (DC to 1010 Hz, for some amplifiers) Replacing the capacitor by its impedance, 1 / (jwC), we can solve for the therefore, plot frequency axis on log scale ratio of the phasors V / V out in range of magnitudes is also very wide: therefore, plot magnitude on log scale

Vout 1/jwC Convention: express the magnitude in decibels “dB” by ------= ------V R + 1/jwC in V V multiplying by jwC/jwC leads to ------out- = 20log ------out- Vin dB Vin V ------out- = ------1 - phase is usually expressed in degrees (rather than radians): Vin 1 + jwRC

V Im(V ¤ V ) Ð------out- = atan ------out in - Vin Re(Vout¤ Vin )

EE 105 Fall 2000 Page 23 Week 10 EE 105 Fall 2000 Page 24 Week 10 Complex Algebra Review

* Magnitudes: 2 2 Z Z1 X1 + Y1 ----1- = ------= ------, where Z Z2 2 2 2 X2 + Y2

Z1 = X1 + jY1 Z2 = X2 + Y2

* Phases:

Z1 Y1 Y2 Ð----- = ÐZ1 – ÐZ2 = atan------– atan ------Z2 X1 X2

* Examples:

EE 105 Fall 2000 Page 25 Week 10