sensors
Article LDMOS Channel Thermometer Based on a Thermal Resistance Sensor for Balancing Temperature in Monolithic Power ICs
Tingyou Lin 1,*, Yingchieh Ho 2,* and Chauchin Su 3
1 Institute of Communications Engineering, National Chiao-Tung University, Hsinchu 30010, Taiwan 2 Department of Electrical Engineering, National Dong-Hwa University, Hualien 97401, Taiwan 3 Department of Electrical Engineering, National Chiao-Tung University, Hsinchu 30010, Taiwan; [email protected] * Correspondence: [email protected] (T.L.); [email protected] (Y.H.); Tel.: +886-3-571-2121 (ext. 54429) (T.L.)
Received: 16 April 2017; Accepted: 10 June 2017; Published: 15 June 2017
Abstract: This paper presents a method of thermal balancing for monolithic power integrated circuits (ICs). An on-chip temperature monitoring sensor that consists of a poly resistor strip in each of multiple parallel MOSFET banks is developed. A temperature-to-frequency converter (TFC) is proposed to quantize on-chip temperature. A pulse-width-modulation (PWM) methodology is developed to balance the channel temperature based on the quantization. The modulated PWM pulses control the hottest of metal-oxide-semiconductor field-effect transistor (MOSFET) bank to reduce its power dissipation and heat generation. A test chip with eight parallel MOSFET banks is fabricated in TSMC 0.25 µm HV BCD processes, and total area is 900 × 914 µm2. The maximal temperature variation among the eight banks can reduce to 2.8 ◦C by the proposed thermal balancing system from 9.5 ◦C with 1.5 W dissipation. As a result, our proposed system improves the lifetime of a power MOSFET by 20%.
Keywords: monolithic power ICs; temperature sensor; oscillator; thermal balancing; power metal-oxide-semiconductor (MOS); calibration
1. Introduction Monolithic power integrated circuits (ICs) are popular in small and medium power applications such as power modules for LED lighting and portable devices [1–3]. High-voltage (HV) switching metal-oxide-semiconductor field-effect transistor (MOSFETs) and low-voltage (LV) control circuits are integrated in a single chip for not only reducing the circuit footprint but also decreasing the ICs package cost. Both the static power dissipation and the power efficiency can be improved accordingly. However, thermal management and reliability are significant challenges [4–7]. Most monolithic power ICs use lateral double-diffused MOSFETs (LDMOSs) as the switching devices. They are inferior to discrete switches, such as vertical double-diffused MOSFETs (DMOSs) or integrated gate bipolar transistors (IGBT) in that they have larger turn-on resistances Ron [8]. A larger Ron implies greater 2 power dissipation, Pd = IL Ron. However, the temperature distribution is affected by many kinds of factors. As the number of transistors is more than 10,000 in a discrete power MOSFET IC, the transistor’s lifetime will decrease as the channel temperature exceeds 75 ◦C. Therefore, the on-chip channel temperature sensing is necessary to optimize the operations of power MOSFET. A high-voltage power MOSFET that is constructed as a parallel MOSFET bank of multiple smaller transistors is called a large array device. The transistors are arranged in a sophisticated manner so that load current is uniformly distributed to them in parallel. Many layout styles, including multi-fingers,
Sensors 2017, 17, 1397; doi:10.3390/s17061397 www.mdpi.com/journal/sensors Sensors 2017, 17, 1397 2 of 14 Sensors 2017, 17, 1397 2 of 14 manner so that load current is uniformly distributed to them in parallel. Many layout styles, including multi-fingers, waffle, overlapping circular gate, wave, and diamond styles have been waffle,developed. overlapping However, circular the uniform gate, wave, distribution and diamond of the load styles current have is been still difficult developed. to guarantee However, [9]. the uniformFigure distribution1 shows an ofinfrared the load thermal current photograph is still difficult of a to 45 guarantee V N-type [ 9power]. Figure MOS1 shows with ana infraredpower thermaldissipation photograph of 1 W. of The a 45 temperature V N-type power at the MOSsubstrate with ring a power is 53.3–55.2 dissipation °C, and of 1 that W. Theat the temperature top metal at theabove substrate the ringtransistor is 53.3–55.2 channel◦C, is and42.4–46.1 that at °C. the However, top metal aboveboth the the temperatures transistor channel are not is 42.4–46.1the exact◦ C. However,temperature both in the the temperatures transistor channel. are not Back-end the exact layers temperature could cause in thethe transistorinfrared thermal channel. method Back-end of layerstemperature could cause measuring the infrared to yield thermal erroneous method results of temperature owing to die measuring surface condition to yield erroneous and radiative results owingtransfer to die [10]. surface As a conditionrule of thumb, and radiative every 10 transfer°C increases [10]. Asin the a rule channel of thumb, temperature every 10 decreases◦C increases the in thelifetime channel of temperature semiconductor decreases device in the a half lifetime [11]. of semiconductor device in a half [11].
FigureFigure 1. 1.Infrated Infrated thermalthermal photo of of a a power power MOSFET. MOSFET.
ThermalThermal resistance resistance model model is is a populara popular method method to to derive derive channel channel temperature temperature from from the the case case or or the ambientthe ambient temperatures, temperatures, but it but is an it is average an average value. valu Thee. The finite finite element element (FE) (FE) thermal thermal model model simulates simulates the the thermal characterization of high-power modules by using RC network for thermal impedance thermal characterization of high-power modules by using RC network for thermal impedance [12]. It is [12]. It is effective to design heat dissipations in the presets, if the equivalent RC network is effective to design heat dissipations in the presets, if the equivalent RC network is completely tracked. completely tracked. Some on-chip temperature sensors have been proposed to measure exact Some on-chip temperature sensors have been proposed to measure exact temperature from solid-state temperature from solid-state devices. These sensors are inherently sensitive to temperature. Diodes devices. These sensors are inherently sensitive to temperature. Diodes have been used in their analog have been used in their analog counterparts because the yield voltage is a positive temperature counterparts because the yield voltage is a positive temperature coefficient due to reverse saturation coefficient due to reverse saturation current IS [13]. However, the diodes and analog to digital currentconverterIS [13 (ADC)]. However, are not thesuitable diodes for andthe high-resol analog toution digital power converter IC applications (ADC) are owing not suitableto their large for the high-resolutionlayout size, nonlinearity power IC characteristics, applications owing and large to their temperature large layout variations size, in nonlinearity measurements. characteristics, In [14], a anddiode large is temperatureused and an ADC variations is applied in measurements. to perform the Inreadout. [14], a Moreover, diode is used the system and an requires ADC is appliedthe area to ◦ performoverhead the and readout. has to Moreover, work at over the 100 system °C. In requires some cases, the areabandgap-based overhead and voltage has toreference work at circuits over 100 are C. Inused some as cases, their bandgap-based voltages are proportional voltage reference to absolute circuits temperature are used as their(PTAT) voltages [15]. areA differential proportional totemperature absolute temperature sensor is used (PTAT) to [determinate15]. A differential the efficiency temperature of Radio sensor frequency is used (RF) to determinatelinear power the efficiencyamplifiers of Radio[16]. In frequencyaddition, a (RF) voltage-to-frequency linear power amplifiers converter [16 is]. used In addition, to increase a voltage-to-frequency the resolution and convertersimplifies is usedthe calibration to increase method. the resolution Apart from and simplifiesabove, even the in calibration most digital method. ICs, ring Apart oscillators from above, as eventemperature in most digital sensors ICs, arering used oscillators due to delay as temperaturelines, which depend sensors on are device used duetemperature to delay [17–23]. lines, which As dependtemperature on device sensors temperature need to be [17 embedded–23]. As temperature near the channel sensors of needpower to MOS, be embedded the ring oscillators near the channel and of powerbandgap-based MOS, the sensors ring oscillators are not suit andable bandgap-based for MOS bank sensors because are of not latch-up suitable rule for violation MOS bank and because the of latch-uplayout area rule in violation consideration. and the Temperature layout area inbalancing consideration. technologies Temperature are common balancing in the technologies multi-core are commonprocessor in thefor multi-corecontrolling processor the performances for controlling of each the core performances and further of eachreducing core andand furtherbalancing reducing the andtemperatures. balancing the In temperatures.[24], the strategy In of [24 the], the equali strategyzing temperature of the equalizing in integrated temperature circuits in has integrated been reported to the optimum choice of the stabilized chip temperature. However, the technique is seldom circuits has been reported to the optimum choice of the stabilized chip temperature. However, the used in power applications. technique is seldom used in power applications. In this paper, a method of thermal balance with on-chip temperature monitoring is proposed for In this paper, a method of thermal balance with on-chip temperature monitoring is proposed monolithic power ICs. The method identifies the hottest of MOSFET bank and reduces its power and for monolithic power ICs. The method identifies the hottest of MOSFET bank and reduces its thermal dissipation. The temperature-sensing device is an on-chip poly-silicon strip. A temperature- power and thermal dissipation. The temperature-sensing device is an on-chip poly-silicon strip. A temperature-to-frequency converter (TFC) is developed to quantize an on-chip temperature as a digital code. For considering the chip area and balancing the control bits, the power MOSFET Sensors 2017, 17, 1397 3 of 14
Sensors 2017, 17, 1397 3 of 14 to-frequency converter (TFC) is developed to quantize an on-chip temperature as a digital code. For considering the chip area and balancing the control bits, the power MOSFET architecture can be dividedarchitecture into can eight be dividedbanks to into monitor eight banksthe channe to monitorl temperature the channel in temperaturethe bank level. in the An bank average level. temperatureAn average temperature monitor is proposed monitor is because proposed the because temper theature temperature will be saturated will be saturatedto a DC value to a DCafter value the chipafter working the chip workingfor a while. for aBased while. on Based the output on the of output the temperature of the temperature sensor, the sensor, hottest the hottestdevice can device be identified.can be identified. The equivalent The equivalent duty cycle duty can cycle thus can be thus adjusted. be adjusted. The rest of the paperpaper isis organizedorganized asas follows.follows. Section Section 22 developsdevelops anan on-chipon-chip temperaturetemperature monitoring technique. Section Section 33 introducesintroduces thethe pulse-width-modulationpulse-width-modulation (PWM)(PWM) methodologymethodology forfor temperature balancing.balancing. Section Section4 details 4 details the corresponding the corresponding circuit implementation circuit implementation and measurements and measurementsmade on a 0.25 madeµm 1P3M on a test0.25 chip. μm 1P3M Finally, test Section chip. 5Finally, draws Section conclusions. 5 draws conclusions.
2. Materials Materials and Methods Proposed On-Chip Temperature MonitoringMonitoring Figure2 2presents presents the the system system block block diagram diagram of the proposedof the proposed on-chip thermal on-chip balancing thermal architecture, balancing architecture,which is composed which is of composed two parts. of The two right parts. part The includes right part a includes temperature a temperature sensor with sensor eight with MOSFET eight MOSFETbanks in a banks parallel, in ana parallel, 8-1 Mux, an and 8-1 an Mux, RC oscillator and an RC (OSC). oscillator Each MOSFET (OSC). Each bank MOSFET has an individual bank has gate an individualcontrol signal gate and control a temperature signal and sensing a temperature poly resistor. sensing The poly 8-1 resistor. Mux is usedThe 8-1 to selectMux is one used resistor to select for onesensing resistor the localfor sensing temperatures the local and temperatures is connected and to the is OSC.connected The left to partthe OSC. includes The theleft thermal part includes balancing the thermalcontroller, balancing which is controller, used to perform which thermalis used to balancing, perform whichthermal is balancing, verified by which a field is programmable verified by a field gate programmablearray (FPGA) and gate the array principle (FPGA) is introducedand the principle in Section is introduced3. in Section 3.
Figure 2. ProposedProposed thermal balancing architecture.
The sensing device in our temperature sensor is a poly-silicon strip, which can be placed next to The sensing device in our temperature sensor is a poly-silicon strip, which can be placed next to the drain/source of the MOSFET bank under consideration. Figure 3 presents the eight parallel banks. the drain/source of the MOSFET bank under consideration. Figure3 presents the eight parallel banks. A poly-silicon strip (thick gray line) is embedded in the middle of each MOSFET bank. Each bank has A poly-silicon strip (thick gray line) is embedded in the middle of each MOSFET bank. Each bank has a total width of 5000 μm (50 μm × 50 fingers × 2 blocks), and the layout of poly and oxide diffusion a total width of 5000 µm (50 µm × 50 fingers × 2 blocks), and the layout of poly and oxide diffusion (OD) layers as shown in Figure 4. The embedded sensors use to measure each of the MOSFET banks (OD) layers as shown in Figure4. The embedded sensors use to measure each of the MOSFET banks and notify the temperature variation within neighboring cells. and notify the temperature variation within neighboring cells. The change in resistance of the integrated resistor with temperature is
2 R(T) = RO × 1 + TC1 × ∆T + TC2·∆T (1) where RO is the resistance at room temperature, TC1 and TC2 are the first and second-order temperature coefficients, and ∆T is the change in temperature. TSMC design guideline indicates that ∆R/RO equal to −9% in a poly resistor for any change in temperature (∆T) varies from 25 to 150 ◦C, whereas TC2 has a small effect on resistance because TC1 >> TC2 (larger than two orders). The simulated temperature coefficient is ∆R/R −9% TC1 = 0 = = −0.072%/◦C. (2) S ∆T 150 − 25
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FigureFigure 3.3. EquivalentEquivalent circuit circuit of eight of MOSFET eight MOSFET banks with banks poly-silicon with strips poly-silicon as temperature strips sensing as temperature devices.
sensingFigure devices.3. Equivalent circuit of eight MOSFET banks with poly-silicon strips as temperature sensing devices.
Figure 4. Layout of each MOSFET bank with a temperature sensor.
Figure 4. Layout of each MOSFET bank with a temperature sensor. The change Figurein resistance 4. Layout of the of integrated each MOSFET resistor bank with with temperature a temperature is sensor. The change in resistance of the integrated= × 1+ 1×∆ + 2∙∆ resistor with temperature is (1)
Figurewhere 5R showsO is the the resistance detail circuitry at room oftemperature, the proposed TC1 TFC, and whichTC2 are is athe stable first multi-vibratorand second-order where = × 1+ 1×∆ + 2∙∆ (1) RT istemperature a poly resistor coefficients, of the and poly-silicon ΔT is the change temperature in temperature. sensor andTSMC a design capacitor guideline (C) is indicates added tothat adjust where RO is the resistance at room temperature, TC1 and TC2 are the first and second-order the frequencyΔR/RO equal of to the −9% OSC. in a The poly OSC resistor includes for any two change rail-to-rail in temperature comparators (ΔT) varies and anfrom set-reset 25 to 150 (SR) °C, latch. temperature coefficients, and ΔT is the change in temperature. TSMC design guideline indicates that The oscillationwhereas TC2 period has a is small as follows. effect on resistance because TC1 >> TC2 (larger than two orders). The simulatedΔR/RO equal temperature to −9% in coefficienta poly resistor is for any change in temperature (ΔT) varies from 25 to 150 °C, whereas TC2 has a small effect on resistance because TC1 >> TC2 (larger! than two orders). The ∆ / % V 1 = = Vdd=− −0.072%/ Vlow . high (2) simulated temperatureτ =coefficientτ + τ =is R ×∆ C × ln + ln . (3) 1 2 T V − V V ∆ / % dd high low Figure 5 shows the detail circuitry 1 = of the =proposed= TFC, −0.072%/ which is. a stable multi-vibrator where ∆ (2) RT is a poly resistorV of the poly-siliconV temperatureV sensor and a capacitor (C) is added× R to× adjustC thef For example,Figure 5 showsdd = the 2.5 detail V, low circuitry= 0.15 V,of andthe proposedhigh = 2.35 TFC, V which and set, is a so stableτ = 5.5 multi-vibratorT and where= 1/τ. The designfrequency parameters of the OSC. are The set OSC as follows. includes The two poly-silicon rail-to-rail comparators strip is 2 µ andm wide an set-reset and 480 (SR)µm latch. long The with an oscillationRT is a poly period resistor is asof thefollows. poly-silicon temperature sensor and a capacitor (C) is added to adjust the equivalentfrequency resistance of the OSC. of 41 The kΩ OSCand includesC is 8 pF. two According rail-to-rail to comparators Equation (3), and the an set-reset oscillation (SR) period latch. The is 1.8 µs, and theoscillation oscillation period frequency is as follows. is = 554 kHz.+ = × × + . (3) Based on Equation (1), the frequency or the period can be obtained to determine RT if C is For example, Vdd = 2.5 V, = Vlow = 0.15+ V,= and × × Vhigh = 2.35 V and set,+ so τ = 5.5. × RT × C and f = 1/τ. The(3) known. The measuring time determines the accuracy of temperatures, which can be derived as design parameters are set as follows. The poly-silicon strip is 2 μm wide and 480 μm long with an follows. Suppose that τ and τmax are the minimal and maximal periods, according to Equation (1), equivalentFor example, resistance Vddmin =of 2.5 41 V, k ΩVlow and = 0.15 C isV, 8and pF. V Accordinghigh = 2.35 V toand Equation set, so τ (3),= 5.5 the × R oscillationT × C and f =period 1/τ. The is at maximal and minimal operating temperatures, T and T . N is the resolution and the number of 1.8design μs, andparameters the oscillation are set frequency as follows. is The554 kHz.poly-silicon max strip minis 2 μm wide and 480 μm long with an temperatureequivalent levels resistance between of 41T kΩand andT C is. 8 The pF. measuringAccording to time Equationτ must (3), the satisfy oscillation period is Based on Equation (1), maxthe frequencymin or the period can be obtainedmeas to determine RT if C is known. The1.8 μ measurings, and the oscillation time determines frequency the is accuracy 554 kHz. of temperatures, which can be derived as follows. τmeas τmeas Based on Equation (1), the frequency or the period can be obtained to determine RT if C is known. Suppose that τmin and τmax are the minimal −and maximal≥ N .periods, according to Equation (1), at (4) The measuring time determines the accuracyτmin ofτ maxtemperatures, which can be derived as follows.
Suppose that τmin and τmax are the minimal and maximal periods, according to Equation (1), at τmax·τmin τmeas ≥ × N. (5) τmax − τmin Sensors 2017, 17, 1397 5 of 14
maximal and minimal operating temperatures, Tmax and Tmin. N is the resolution and the number of temperature levels between Tmax and Tmin. The measuring time τmeas must satisfy Sensors 2017, 17, 1397 5 of 14 − ≥ . (4)