Compact Fenwick Trees for Dynamic Ranking and Selection
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Podcast Ch23a
Podcast Ch23a • Title: Bit Arrays • Description: Overview; bit operations in Java; BitArray class • Participants: Barry Kurtz (instructor); John Helfert and Tobie Williams (students) • Textbook: Data Structures for Java; William H. Ford and William R. Topp Bit Arrays • Applications such as compiler code generation and compression algorithms create data that includes specific sequences of bits. – Many applications, such as compilers, generate specific sequences of bits. Bit Arrays (continued) • Java binary bit handling operators |, &, and ^ act on pairs of bits and return the new value. The unary operator ~ inverts the bits of its operand. BitBit OperationsOperations x y ~x x | y x & y x ^ y 0 0 1 0 0 0 0 1 1 1 0 1 1 0 0 1 0 1 1 1 0 1 1 0 Bit Arrays (continued) Bit Arrays (continued) • Operator << shifts integer or char values to the left. Operators >> and >>> shift values to the right using signed or unsigned arithmetic, respectively. Assume x and y are 32-bit integers. x = 0...10110110 x << 2 = 0...1011011000 x = 101...11011100 x >> 3 = 111101...11011 x = 101...11011100 x >>> 3 = 000101...11011 Bit Arrays (continued) Before performing the bitwise operator |, &, or ^, Java performs binary numeric promotion on the operands. The type of the bitwise operator expression is the promoted type of the operands. The rules of promotion are as follows: • If either operand is of type long, the other is converted to long. • Otherwise, both operands are converted to type int. In the case of the unary operator ~, Java converts a byte, char, short to int before applying the operator, and the resulting value is an int. -
Binary Index Trees a Cumulative Frequency Array Allows Us To
Binary Index Trees A cumulative frequency array allows us to calculate the sum of the range of values in O(1), as long as there are no changes to the data once the queries start. But consider situations where we might change the value at an index in an array, then query for the sum of a range of values in the array, followed by some more changes and more queries. In this sort of situation, a cumulative frequency array would still give us O(1) query times, but it would take O(n) time to update after each change!!! (Basically, if we change one index in a cumulative frequency array, all other indexes above it would have to have this value added to it as well.) Here is a quick illustration: Current cumulative frequency array: Index 0 1 2 3 4 5 6 7 8 Value 2 4 4 4 6 8 11 13 17 Now, consider adding the value 2 to the data, recalling that index i stores the number of values less than or equal to i. The adjusted array is: Index 0 1 2 3 4 5 6 7 8 Value 2 4 5 5 7 9 12 14 18 We had to edit each index 2 or greater, which would take O(n) for a cumulative frequency array of size n. Thus, we want a new arrangement where both the query AND the update are relatively fast. The creative insight here is that perhaps if we store data in a different way, perhaps we can reduce the update time by quite a bit while incurring only a modest increase in query time. -
B-Bit Sketch Trie: Scalable Similarity Search on Integer Sketches
b-Bit Sketch Trie: Scalable Similarity Search on Integer Sketches Shunsuke Kanda Yasuo Tabei RIKEN Center for Advanced Intelligence Project RIKEN Center for Advanced Intelligence Project Tokyo, Japan Tokyo, Japan [email protected] [email protected] Abstract—Recently, randomly mapping vectorial data to algorithms intending to build sketches of non-negative inte- strings of discrete symbols (i.e., sketches) for fast and space- gers (i.e., b-bit sketches) have been proposed for efficiently efficient similarity searches has become popular. Such random approximating various similarity measures. Examples are b-bit mapping is called similarity-preserving hashing and approximates a similarity metric by using the Hamming distance. Although minwise hashing (minhash) [12]–[14] for Jaccard similarity, many efficient similarity searches have been proposed, most of 0-bit consistent weighted sampling (CWS) for min-max ker- them are designed for binary sketches. Similarity searches on nel [15], and 0-bit CWS for generalized min-max kernel [16]. integer sketches are in their infancy. In this paper, we present Thus, developing scalable similarity search methods for b-bit a novel space-efficient trie named b-bit sketch trie on integer sketches is a key issue in large-scale applications of similarity sketches for scalable similarity searches by leveraging the idea behind succinct data structures (i.e., space-efficient data structures search. while supporting various data operations in the compressed Similarity searches on binary sketches are classified -
List of Algorithms
List of Algorithms Swiss Olympiad in Informatics September 13, 2012 This list contains a few algorithms that may prove useful when solving SOI or IOI related tasks. The current IOI Syllabus can be found here: http://people.ksp.sk/~misof/ioi-syllabus/ioi-syllabus.pdf Please note that this list simply serves as an outline and that tasks are not limited by the algorithms listed below. However, one can also participate (and even be successful) without knowing the algorithms listed below. To guide you better, the most important topics are in bold. • Sorting1 • Binary Search • Data Structures Stack1 Queue1 List: Linked List, Doubly Linked List1 Tree Sets1 and Tree Maps1 (Binary Search Trees) Priority Queue1 Double ended queue1 Binary Heap Data Structure Interval Tree Segment Tree Disjoint{set Data Structure (Union{Find) Rational Numbers Bignum (Addition, Subtraction, Multiplication, Division) Quad Tree optional: Binary Indexed Tree (BIT) (Fenwick Tree) • Graph Algorithms DFS (Depth{First Search) BFS (Breadth{First Search) Connected Components Topological Sorting (toposort) Shortest Path · Dijkstra's Algorithm · Bellman{Ford Algorithm · Floyd{Warshall's Algorithm (all{pairs shortest path) MST (Minimum Spanning Tree) · Kruskal's Algorithm · Prim's Algorithm · Find Articulation Points (articfind) · Hierholzer's Algorithm (for finding Euler cycles) • Dynamic Programming (DP) Prefix Sum Edit Distance LCS (Longest Common Subsequence) LIS (Longest Increasing Subsequence) MCM (Matrix Chain Multiplication) MER (Maximum Empty Rectangle) -
Efficient Data Structures for High Speed Packet Processing
Efficient data structures for high speed packet processing Paolo Giaccone Notes for the class on \Computer aided simulations and performance evaluation " Politecnico di Torino November 2020 Outline 1 Applications 2 Theoretical background 3 Tables Direct access arrays Hash tables Multiple-choice hash tables Cuckoo hash 4 Set Membership Problem definition Application Fingerprinting Bit String Hashing Bloom filters Cuckoo filters 5 Longest prefix matching Patricia trie Giaccone (Politecnico di Torino) Hash, Cuckoo, Bloom and Patricia Nov. 2020 2 / 93 Applications Section 1 Applications Giaccone (Politecnico di Torino) Hash, Cuckoo, Bloom and Patricia Nov. 2020 3 / 93 Applications Big Data and probabilistic data structures 3 V's of Big Data Volume (amount of data) Velocity (speed at which data is arriving and is processed) Variety (types of data) Main efficiency metrics for data structures space time to write, to update, to read, to delete Probabilistic data structures based on different hashing techniques approximated answers, but reliable estimation of the error typically, low memory, constant query time, high scaling Giaccone (Politecnico di Torino) Hash, Cuckoo, Bloom and Patricia Nov. 2020 4 / 93 Applications Probabilistic data structures Membership answer approximate membership queries e.g., Bloom filter, counting Bloom filter, quotient filter, Cuckoo filter Cardinality estimate the number of unique elements in a dataset. e.g., linear counting, probabilistic counting, LogLog and HyperLogLog Frequency in streaming applications, find the frequency of some element, filter the most frequent elements in the stream, detect the trending elements, etc. e.g., majority algorithm, frequent algorithm, count sketch, count{min sketch Giaccone (Politecnico di Torino) Hash, Cuckoo, Bloom and Patricia Nov. -
K-Mer Data Structures Rayan Chikhi CNRS, Univ
k-mer data structures Rayan Chikhi CNRS, Univ. Lille, France CGSI - July 24, 2018 Baseline problem In-memory representation of a large set of short k-mers: e.g. ACTGAT GTATGC ATTAAA GAATTG ... (Indirect) applications ● Assembly ● Error-correction of reads ● Detection of similarity between sequences ● Detection of distances between datasets ● Alignment ● Pseudoalignment / quasi-mapping ● Detection of taxonomy ● Indexing large collections of sequencing datasets ● Quality control ● Detection of events (e.g. SNPs, indels, CNVs, alt. transcription) ● ... Goals of this lecture ● Broad sweep of state of the art, with applications ● Refresher of basic CS elements Au programme: ● Basic structures (Bloom Filters, CQF, Hashing, Perfect Hashing) ● k-mer data structures (SBT, BFT, dBG ds) ● Some reference-free applications k-mers Sequences of k consecutive letters, e.g. ACAG or TAGG for k=4 Problem statement: Framing the problem Representation of a set of k-mers: ACTGAT 6 11 Large set of k-mers : 10 - 10 elements GTATGC k in [11; 103] .. Problem statement: Operations to support Representation of a set of k-mers: - Construction (from a disk stream) ACTGAT - Membership (“is X in the set?”) GTATGC - Iteration (enumerate all elements in the set) - ... .. 106 - 1011 elements Extensions: k: 11 - 500 - Associate value(s) to k-mers (e.g. abundance) - - Navigate the de Bruijn graph Problem statement: Data structures Representation of a set of k-mers: ACTGAT “In computer science, a data structure is a GTATGC particular way of organizing and storing data in a -
On Updating and Querying Submatrices
On Updating and Querying Submatrices Jason Yang Mentor: Jun Wan MIT PRIMES Computer Science October 19, 2020 Jason YangMentor: Jun Wan On Updating and Querying Submatrices Range update-query problem A is an array of N numbers A range R = [l; r] is the set of indices fijl ≤ i ≤ rg update(R; v): for all i 2 R, set A[i] to A[i] + v query(R): return mini2R A[i] Segment tree + lazy propagation: O(log N) time updates and queries Jason YangMentor: Jun Wan On Updating and Querying Submatrices Generalizations Using different operators update(R; v): 8i 2 R; A[i] A[i] 5 v query(R; v) : return 4i2R A[i] If 5 and 4 are associative, segment tree + lazy propagation usually works (but not always) Ex. (5; 4) = (+; +) (∗; +) ( ; min) This problem and variants have applications in LCA in a tree image retrieval Jason YangMentor: Jun Wan On Updating and Querying Submatrices Generalizations 2 dimensions: the array becomes a matrix ranges fijl ≤ i ≤ rg becomes submatrices [l0; r0][l1; r1] = fijl0 ≤ i ≤ r0g × fjjl1 ≤ j ≤ r1g We call this the submatrix update-query problem. Jason YangMentor: Jun Wan On Updating and Querying Submatrices Previous Work Generalizing segment tree seems to be very difficult update query d = 1 Segment Tree O(log N) O(log N) d = 2 2D Segment Tree O(N log N) O(log2 N) Quadtree O(N) O(N) d = 2, special operator pairs (5; 4) 2D Fenwick Tree (Mishra) O(16 log2 N) O(16 log2 N) 2D Segment Tree (Ibtehaz) O(log2 N) O(log2 N) 2D Segment Tree (ours) O(log2 N) O(log2 N) Jason YangMentor: Jun Wan On Updating and Querying Submatrices Intuition Why is -
CMU SCS 15-721 (Spring 2020) :: OLTP Indexes (Trie Data Structures)
ADVANCED DATABASE SYSTEMS OLTP Indexes (Trie Data Structures) @Andy_Pavlo // 15-721 // Spring 2020 Lecture #07 2 Latches B+Trees Judy Array ART Masstree 15-721 (Spring 2020) 3 LATCH IMPLEMENTATION GOALS Small memory footprint. Fast execution path when no contention. Deschedule thread when it has been waiting for too long to avoid burning cycles. Each latch should not have to implement their own queue to track waiting threads. Source: Filip Pizlo 15-721 (Spring 2020) 3 LATCH IMPLEMENTATION GOALS Small memory footprint. Fast execution path when no contention. Deschedule thread when it has been waiting for too long to avoid burning cycles. Each latch should not have to implement their own queue to track waiting threads. Source: Filip Pizlo 15-721 (Spring 2020) 4 LATCH IMPLEMENTATIONS Test-and-Set Spinlock Blocking OS Mutex Adaptive Spinlock Queue-based Spinlock Reader-Writer Locks 15-721 (Spring 2020) 5 LATCH IMPLEMENTATIONS Choice #1: Test-and-Set Spinlock (TaS) → Very efficient (single instruction to lock/unlock) → Non-scalable, not cache friendly, not OS friendly. → Example: std::atomic<T> std::atomic_flag latch; ⋮ while (latch.test_and_set(…)) { // Yield? Abort? Retry? } 15-721 (Spring 2020) 5 LATCH IMPLEMENTATIONS Choice #1: Test-and-Set Spinlock (TaS) → Very efficient (single instruction to lock/unlock) → Non-scalable, not cache friendly, not OS friendly. → Example: std::atomic<T> std::atomic_flag latch; ⋮ while (latch.test_and_set(…)) { // Yield? Abort? Retry? } 15-721 (Spring 2020) 6 LATCH IMPLEMENTATIONS Choice #2: Blocking OS Mutex → Simple to use → Non-scalable (about 25ns per lock/unlock invocation) → Example: std::mutex std::mutex m; ⋮ m.lock(); // Do something special... m.unlock(); 15-721 (Spring 2020) 6 LATCH IMPLEMENTATIONS Choice #2: Blocking OS Mutex → Simple to use → Non-scalable (about 25ns per lock/unlock invocation) → Example: std::mutex std::mutex m; pthread_mutex_t ⋮ m.lock(); futex // Do something special.. -
Space- and Time-Efficient String Dictionaries
Tokushima University Ph.D. Thesis Space- and Time-Efficient String Dictionaries z間¹率hB間¹率noD文W列辞ø Author: Supervisor: Shunsuke Kanda Prof. Masao Fuketa A thesis submitted in fulfillment of the requirements for the degree of Doctor of Philosophy in the Graduate School of Advanced Technology and Science Department of Information Science and Intelligent Systems March 2018 iii Abstract In modern computer science, the management of massive data is a fundamental problem because the amount of data is growing faster than we can easily handle them. Such data are often represented as strings such as documents, Web contents and genomics data; therefore, data structures and algorithms for space-efficient string processing have been developed by many researchers. In this thesis, we focus on a string dictionary that is an in-memory data structure for storing a set of strings. It has been traditionally used to manage vocabulary in natural language processing and information retrieval. The size of the dictionaries is not problematic because of Heaps’ Law. However, string dictionaries in recent applications, such as Web search engines, RDF stores, geographic information systems and bioinformatics, need to handle very large datasets. As the space usage of string dictionaries is a significant issue in those applications, it is necessary to develop space-efficient data structures. If limited to static applications, existing data structures have already achieved very high space efficiency by exploiting succinct data structures and text compression techniques. For example, state-of-the-art string dictionaries can be implemented in space up to 5% of the original dataset size. However, there remain trade-off problems among space efficiency, lookup-time performance and construction costs. -
A New Algorithm for Updating and Querying Sub-Arrays Of
A New Algorithm for Updating and Querying Sub-arrays of Multidimensional Arrays Pushkar Mishra Computer Laboratory, University of Cambridge [email protected] Abstract Given a d-dimensional array A, an update operation adds a given constant C to each element within a continuous sub-array of A. A query operation computes the sum of all the elements within a continuous sub-array of A. The one-dimensional update and query handling problem has been studied intensively and is usually solved using segment trees with lazy propagation technique. In this paper, we present a new algorithm incorporating Binary Indexed Trees and Inclusion-Exclusion Principle to accomplish the same task. We extend the algorithm to update and query sub-matrices of matrices (two-dimensional array). Finally, we propose a general form of the algorithm for d-dimensions which d d achieves O(4 ∗ log n) time complexity for both updates and queries. This is an improvement over the previously known algorithms which utilize hierarchical data structures like quadtrees and octrees d−1 and have a worst-case time complexity of Ω(n ) per update/query. Keywords: Algorithm; Data Structure; Multidimensional Array; Binary Indexed Tree; Range-update; Range-query. 1 Introduction The problem of updating and querying sub-arrays of multidimensional arrays is of consequence to sev- eral fields including data management, image processing and geographical information systems. The one-dimensional version of this problem has conventionally been solved using segment trees with lazy propagation technique. We show in this paper that a d-dimensional segment tree (d> 1) supports lazy propagation only along one out of the d dimensions. -
Reconfigurable Architecture for Minimal Perfect Sequencing Using the Convey Hybrid Core Computer Chad Michael Nelson Iowa State University
Iowa State University Capstones, Theses and Graduate Theses and Dissertations Dissertations 2012 RAMPS: reconfigurable architecture for minimal perfect sequencing using the Convey hybrid core computer Chad Michael Nelson Iowa State University Follow this and additional works at: https://lib.dr.iastate.edu/etd Part of the Bioinformatics Commons, and the Computer Engineering Commons Recommended Citation Nelson, Chad Michael, "RAMPS: reconfigurable architecture for minimal perfect sequencing using the Convey hybrid core computer" (2012). Graduate Theses and Dissertations. 12846. https://lib.dr.iastate.edu/etd/12846 This Thesis is brought to you for free and open access by the Iowa State University Capstones, Theses and Dissertations at Iowa State University Digital Repository. It has been accepted for inclusion in Graduate Theses and Dissertations by an authorized administrator of Iowa State University Digital Repository. For more information, please contact [email protected]. RAMPS: reconfigurable architecture for minimal perfect sequencing using the Convey hybrid core computer by Chad Michael Nelson A thesis submitted to the graduate faculty in partial fulfillment of the requirements for the degree of MASTER OF SCIENCE Major: Computer Engineering Program of Study Committee: Joseph Zambreno, Major Professor Phillip Jones Heike Hofmann Iowa State University Ames, Iowa 2012 Copyright ⃝c Chad Michael Nelson, 2012. All rights reserved. ii DEDICATION For Erin, family, and friends... thank you. Life would not be so sweet without you all. iii TABLE OF CONTENTS LIST OF TABLES . v LIST OF FIGURES . vi ACKNOWLEDGEMENTS . vii ABSTRACT . viii CHAPTER 1. OVERVIEW . 1 CHAPTER 2. REVIEW OF LITERATURE . 3 CHAPTER 3. PRELIMINARIES . 6 3.1 Background on DNA Sequencing . -
The Guide to Xillybus Lite
The guide to Xillybus Lite Xillybus Ltd. www.xillybus.com Version 2.1 1 Introduction3 1.1 General....................................3 1.2 Obtaining Xillybus Lite............................4 2 Usage5 2.1 Sample design................................5 2.2 Host application interface..........................6 2.3 Logic design interface............................7 2.3.1 Register related signals.......................7 2.3.2 Module hierarchy...........................8 2.3.3 32-bit aligned register access....................9 2.3.4 Unaligned register access...................... 12 2.4 Interrupts................................... 16 3 Xillybus Lite on non-Xillinux projects 17 3.1 Applying the IP core............................. 17 3.2 Modifying the device tree.......................... 21 3.3 Compiling the Linux driver.......................... 23 3.4 Installing the driver.............................. 24 Xillybus Ltd. www.xillybus.com 3.5 Loading and unloading the driver...................... 24 The guide to Xillybus Lite 2 Xillybus Ltd. www.xillybus.com 1 Introduction 1.1 General Xillybus Lite is a simple kit for easy access of registers in the logic fabric (PL) by a user space program running under Linux. It presents an illusion of a bare-metal environment to the software, and a trivial interface of address, data and read/write- enable signals to the logic design. Using this kit frees the development team from dealing with the AXI bus interface as well as Linux kernel programming, and allows a straightforward memory-like control of the peripheral without the operating system or the bus protocol coming in the way. The kit consists of an IP core and a Linux driver. These are included in the Xillinux distribution for the Zedboard (versions 1.1 and up), and are also available for download separately for inclusion in projects.