Fpga-Based Hardware Emulation Arcade System Final Report
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FPGA-BASED HARDWARE EMULATION ARCADE SYSTEM FINAL REPORT May 11-14 Tony Milosch, Cory Mohling, Danny Funk, David Gartner, John Alexander Client: Joseph Zambreno Advisor: Phillip Jones April 27, 2011 1 TABLE OF CONTENTS List of figures i List of tables ii Definitions ii Executive Summary 1 Problem Statement 2 Operating Environment 2 Intended Users and Uses 3 Assumptions and Limitations 3 Expected End Product and Other Deliverables 3 Proposed Approach 4 Statement of Work 8 Estimated Resources 10 Schedule 10 Detailed Design 11 Testing and Evaluation 25 Acknowledgments 28 Closing Material 28 LIST OF FIGURES Figure 1: NES System Overview 12 Figure 2: CPU Memory Map 13 Figure 3: PPU Memory Map 15 Figure 4: The left side shows what is displayed to the screen, while the right side shows the name tables used to display the image. 17 Figure 5: This image shows how eight sprites are used to create the Mario character. 17 Figure 6: System design for boot loader 19 Figure 7: Base Arcade Cabinet Structure without control panel 21 Figure 8: Detachable Control Panel 21 Figure 9: Screw position will not be visible from outside 22 Figure 10: Opening for light bulb and custom marquee 22 i Figure 11: Opening on cabinet for coin door 23 Figure 12: Coin door blue print 23 Figure 13: Control panel is fixed to hinges 24 Figure 14: Control panel layout 24 Figure 15: Final Cabinet Implementation 26 LIST OF TABLES Table 1: Memory mapped I/O 16 Table 2: Monitor Specifications 25 DEFINITIONS ALU – Arithmetic Logical Unit CPU – Central Processing Unit FPGA - Field Programmable Gate Array I/O – Input / Output NES – Nintendo Entertainment System PCB – Printed Circuit Board PPU – Picture Processing Unit VGA – Video Graphics Array VHDL – Very High Speed Integrated Circuit Hardware Description Language ii EXECUTIVE SUMMARY The Iowa State Reconfigurable Computing Lab would like a way to showcase the capabilities of reprogrammable hardware. To accomplish this, our group will showcase that a simple FPGA board can replace the entire NES. This project is the continuation of a past group that created a simple emulation of the NES. Our primary goal was to continue the work done by the past group and improve the presentation of the system by building an arcade cabinet. We ran into several major issues while improving on last year’s project. The project was not very robust, so we spent some time making the system more robust. Also, we found several online emulation tests that we worked on to get them to pass. As we made these changes, the system wasn’t appearing to improve functionality. Therefore, our client decided to switch the direction of our project to using a software emulator on the FPGA board. We integrated this software emulator into our project, which allowed us to play several more games (over 100). In order to select from this list of games, our team developed a boot loader program. This program simply displayed all the games and allowed the user to use the joystick and buttons to select the game they wish to play. Finally, we built a professional arcade cabinet reminiscent of arcade machines from the 1980’s to house the entire system. Our team is composed of five computer engineering seniors. We have all taken Computer Organization and Design (CPRE 381), and all have experience with computer architecture. Our group divided tasks between the three main modules: designing the FPGA, building the arcade cabinet, and developing the boot loader. 1 PROJECT PLAN PROBLEM STATEMENT GENERAL PROBLEM STATEMENT We had a partially working emulator from the past group, but it didn’t include audio, side scrolling, or cartridge based memory. The inherited system was not capable of playing multiple games, or a way to select from multiple games efficiently. To make the system more presentable, we need to create a professional looking arcade cabinet to enclose the emulation system that could be used repeatedly in demonstrations. MARKET / LITERATURE REVIEW We looked into the various other software emulators for examples on ways that other individuals have solved common NES emulation problems. Additionally, we found a similar project (https://rm-rfroot.net/nes_fpga/) that provided very valuable knowledge. Research was performed on other individual’s experiences in building custom arcade cabinets. GENERAL SOLUTION APPROACH To enable side scrolling, we attempted to further understand and develop the PPU that was implemented last year. To enable audio on the FPGA board, we tried to further develop the CPU. The boot loader and game selection was implemented using C and Xilinx libraries. Research was conducted on other arcade cabinet projects to gain knowledge on ideas and direction to take with the design of the arcade cabinet. OPERATING ENVIRONMENT When the system is in its final location, it will be in a climate controlled environment. It will not need to withstand extreme temperatures or physical shock. However, it may encounter small amounts of dust. An example location would be a lobby of a building on campus. The entire system must be capable to be powered up and running for several hours at a time running off of standard 120VAC. 2 INTENDED USERS AND USES INTENDED USERS The intended users of the system are anyone that will be visiting the computer engineering facilities at Iowa State University. This includes current and future students, faculty, and visiting family members. For example the system was demonstrated in Coover for VEISHEA for the public. INTENDED USES The system will be used to showcase the capabilities of reconfigurable hardware and to promote the department and Iowa State University. The system should be representative of the interaction users have with professional arcade machines. We don’t expect people to treat the emulator in such a way that could cause damage to the system. We don’t expect that the entire system needs to be easily portable, but the FPGA board and controls should be. ASSUMPTIONS AND LIMITATIONS ASSUMPTIONS The one semester remaining is an adequate time period to complete the project The system will be used by one or two users simultaneously Documentation provided online will provide sufficient information to aid us in solving any unforeseen problems. We will have adequate funding to complete the project. All supplies purchased online will arrive in a timely manner. LIMITATIONS The one semester remaining time period is a firm deadline. The system will be powered by a standard 120 volt wall outlet. Limited budget. The Xilinx FPGA boards have a limited amount of logical resources that the entire system must fit on. The system must be designed around the NES ROM files and instruction set. EXPECTED END PRODUCT AND OTHER DELIVERABLES The final design includes a FPGA board that runs the entire NES. The emulation includes side scrolling, audio, support for extended cartridge based memory, and boot loader. The boot loader allows the user to dynamically choose games to play while the system is running. The system is housed in a specially designed arcade cabinet that allows others to use the system easily. It includes a new control system that uses joysticks and buttons that are incorporated as part of the cabinet. We will also have several documents as deliverables as well. These documents are a project plan, a design document, and a report of our implementation and testing. We created a project website containing weekly status reports, project plan presentation, project design draft presentation, and design review presentation, poster, and final review presentation slides. 3 PROPOSED APPROACH FUNCTIONAL REQUIREMENTS FPGA FR 1.1 – All NES specific emulation must be performed entirely in hardware. FR 1.2 – Entire emulation system must be contained within the FPGA Xilinx570X board. Emulator FR 2.1 – Emulator must support the instruction set used by the original NES system. FR 2.2 – Emulator must be able to run a NES ROM file from an outside source. I/O Controls FR 3.1.1 – Emulator must accept input from arcade style controls. FR 3.1.2 – Emulator must accept original NES button inputs. FR 3.1.3 – Emulator must respond to controller input with the same latency as the original NES. FR 3.1.4 – Emulator must accept controls for up to two players. Video FR 3.2.1 – System must be able to display images to a connected display. FR 3.2.2 – System must output video to a screen at the original NES frame rate. FR 3.2.3 – Emulator must use a color palette consistent with the original NES color palette. FR 3.2.4 – Must be compatible with VGA Output. Audio FR 3.3.1 – Emulator must generate background music and sound effects for NES games. FR 3.3.2 – Emulator must generate sound effects with the same latency as the original NES. Boot Loader FR 4.1 – Must be able to display a selectable list of games to the connected display. FR 4.2 – Must be able to load the selected ROM file to the emulator without modifying the FPGA. Cabinet FR 5.1 – Cabinet must be able to support a 103 lb. monitor. FR 5.2 – Cabinet must accept a standard 120 VAC source to power the system. FR 5.3 - Cabinet must fit through 34” x 83” door NONFUNCTIONAL REQUIREMENTS NFR 1.1 – Emulator must be contained within a removable control box. NFR 1.2 – All components of the emulator should be implemented as independent modules. NFR 1.3 – The Cabinet should be sturdy enough to resist collapse under normal usage. NFR 1.4 – Users should be able to easily understand how to play a game without off-screen instructions. NFR 1.5 – Joystick and button layout should be ergonomic.