28th EuroForth Conference (Preprint Proceedings) September 14-16, 2012 Exeter College Oxford England Preface EuroForth is an annual conference on the Forth programming language, stack machines, and related topics, and has been held since 1985. The 28th Euro- Forth finds us in Oxford for the second time (after 1997). The three previ- ous EuroForths were held in Exeter, England (2009), in Hamburg, Germany (2010) and in Vienna, Austria (2011). Information on earlier conferences can be found at the EuroForth home page (http://www.euroforth.org/). Since 1994, EuroForth has a refereed and a non-refereed track. This year there were two submissions to the refereed track, and one was accepted (50% acceptance rate). For more meaningful statistics, I include the numbers since 2006: 13 submissions, 8 accepts, 62% acceptance rate. Each paper was sent to at least three program committee members for review, and they all produced reviews. One paper was co-authored by a program committee member, who was not involved in the review; the reviews of all papers (including the one co-authored by the PC member) are anonymous to the authors. I thank the authors for their papers and the reviewers and program committee for their service. Several papers were submitted to the non-refereed track in time to be included in the printed proceedings. These online proceedings (http:// www.euroforth.org/ef12/papers/) also contain papers and presentations that were too late to be included in the printed proceedings. Also, some of the papers included in the printed proceedings were updated for these online proceedings. Workshops and social events complement the program. This year’s EuroForth was organized by Janet Nelson. Anton Ertl Program committee M. Anton Ertl, TU Wien (chair) David Gregg, Trinity College Dublin Ulrich Hoffmann, FH Wedel University of Applied Sciences Jaanus P¨oial, Estonian Information Technology College, Tallinn Bradford Rodriguez, T-Recursive Technology Bill Stoddart Additional Reviewer Reuben Thomas, Adsensus Ltd. 3 Contents Refereed papers Andrew Read: The N.I.G.E. Machine: an FPGA based micro-computer sys- tem for prototyping experimental scientific hardware .....................5 Non-refereed papers Dirk Bruehl: Forth for Education – 4E4th and 4E4th IDE .............. 23 Stephen Pelc: Notation Matters ........................................ 39 Bill Stoddart, Campbell Ritchie, Steve Dunne: Forth Semantics for Compiler Verification ................................................... ..........45 Willi Stricker: Connection of a Forth Target with a Forth Host ......... 59 Late and revised non-refereed papers Ian van Breda: Building an LR parser using Forth ......................63 Ian van Breda: Some comments on the proposed Forth Standard ....... 82 M. Anton Ertl: Methods in objects2: Duck Typing and Performance ....96 Late presentations Bernd Paysan: net2o: Transport Layer — Implemented ............... 104 Bernd Paysan: Recognizers ............................................108 4 The N.I.G.E. Machine: an FPGA based micro-computer system for prototyping experimental scientic hardware Andrew Read May 2012 [email protected] Abstract This paper describes the N.I.G.E. Machine, a user-expandable micro-computer sys- tem that runs on an FPGA development board and is designed specically for the rapid prototyping of experimental scientic hardware or other devices. The key components of the system include a stack-based softcore CPU optimized for embedded control, a FORTH software environment, and a exible digital logic layer that interfaces the micro-computer components with the external environment. The system has been demonstrated on a Digilent Nexys 2 development board and in an example scientic experiment involving a light source and sensor. 1 Introduction 1.1 Overall concept The N.I.G.E. Machine's primary intended application is as an electronic control and mea- surement unit for experimental scientic apparatus. The concept is to combine the merits of a traditional computer-based control system with the exibility of Field Programmable Gate Arrays (FPGAs), and a rapid prototyping environment. This is done using a FORTH based, harmonized hardware-software system and a commodity FPGA development board. FPGAs are integrated circuits with recongurable internal logic components and inter- connects that can be repeatedly reprogrammed with fresh logic designs at the time of use. The functional capability of FPGAs is broadly equivalent to traditional integrated circuits, although operating parameters dier. Logic designs are written in a hardware description language such as VHDL or Verilog and then downloaded to the FPGA as a binary le after being synthesized by the development tools of the relevant FPGA manufacturer. Typically new logic designs are tested on special circuit boards (development boards) that host an FPGA alongside commonly used peripheral components such as external memory, switches, indicators, and connectors. The N.I.G.E. Machine is a complete, user-expandable micro-computer system with ex- tensive input/output (I/O) capabilities, hosted on a low-cost FPGA development board. It comprises (a) a general purpose, stack-based, 32-bit softcore CPU that has a number of optimizations for embedded control such as deterministic execution and rapid interrupt re- sponse time, (b) FORTH system software, and (c) a set of digital logic interface components including both peripherals for development use (keyboard, video) and also user-expandable peripherals for application specic interface logic (interrupt controller, hardware registers, and various I/O ports). The softcore CPU and the other digital logic components are coded in VHDL[1] and the FORTH environment is coded in the assembly language of the softcore CPU. The N.I.G.E 1 5 Machine has been implemented and tested on a Digilent Nexys 2 development board with a Xilinx Spartan-3E XC3S1200E FPGA. With a keyboard and video monitor connected to the board, the system is a fully operational, stand-alone native FORTH environment from power on. A short video has been made to demonstrate[2]. 1.2 Engineering approach Typically there will be three layers of engineering in an application for prototyping an experimental scientic apparatus: The physical layer: The scientic hardware, with actuators and sensors, driven by some electronic circuitry. The external electronic circuitry is connected to the N.I.G.E. Machine through the numerous expansion connectors available on the host FPGA development board, routing to free I/O pins on the FPGA. The digital logic interface layer: Factory or custom (written in VHDL) digital logic interface peripherals directly interface with the external electronic circuitry and provide I/O functionality for the micro-computer system. The use of application-specic, custom digital logic interface peripherals permits greater scope for high-speed pre-processing of external signals and for processing multiple external signals in parallel than is possible with typical xed-logic I/O ports. In addition, complete exibility is permitted in the interface specication and design. The digital logic interface components are connected into the micro-computer architecture largely through hardware registers and external interrupts. The micro-computer layer: The micro-computer system, built on the softcore CPU and the FORTH system software, is the platform both for the interactive prototyping of the external hardware and the custom digital logic interface, and also for running the nal operating software. 1.3 Comparison to alternatives Other platforms have existed for some time that also combine elements of this engineering approach, for example: • The use of a digital logic layer interfacing with the scientic apparatus parallels that of the CMS and ATLAS detectors at CERN. In the case of these detectors, the volume of measurement data and the speed with which it is generated necessitates a digital logic layer ahead of the computer layer to identify potentially interesting events and lter out the remainder before further processing. The CERN detectors are very high performance designs and extremely expensive. • Numerous commodity, easy-to-use microcontrollers, such as the Atmel ATMEGA or Parallax Propeller provide a CPU with direct access to digital I/O ports alongside a selection of xed-function hardware resources such as counters and timers. FORTH is sometimes implemented on such microcontroller platforms. • Standard commercial or open source FPGA softcores are available that can be cong- ured directly by the FPGA development tools, for example the Xilinx MicroBlaze[15]. • A number of small softcores have been designed specically to execute FORTH[3, 4, 5, 6, 7, 8]. Several aspects of the J1[3] have directly inspired this project. The N.I.G.E. Machine does not intend to compete head-on with any one of these alternatives, but rather oer something novel in the way that it brings dierent aspects together to create a exible platform particularly focused on enabling rapid, small-scale, scientic research and development. In particular: 2 6 • The N.I.G.E. Machine works with FPGA development boards that are easy-to-use and aordable, so they are within the range of small labs and individuals. • The N.I.GE. Machine is a fully integrated micro-computer system with video and keyboard facilities (rather than a purely embedded system). • No complex or slow-to-use tool chain is required for software development. FORTH is instantly available at power-on. • Rather than than relying on generic, xed-function