High-Frequency Oscillator Design with Independent Gate Finfet a Thesis

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High-Frequency Oscillator Design with Independent Gate Finfet a Thesis High-Frequency Oscillator Design with Independent Gate FinFET A thesis presented to the faculty of the Russ College of Engineering and Technology of Ohio University In partial fulfillment of the requirements for the degree Master of Science Yunus Kelestemur December 2019 © 2019 Yunus Kelestemur. All Rights Reserved. 2 This thesis titled High-Frequency Oscillator Design with Independent Gate FinFET by YUNUS KELESTEMUR has been approved for the School of Electrical Engineering and Computer Science and the Russ College of Engineering and Technology by Savas Kaya Professor of Electrical Engineering Mei Wei Dean, Russ College of Engineering and Technology 3 ABSTRACT YUNUS KELESTEMUR, M.S., December 2019, Electrical Engineering and Computer Science High-Frequency Oscillator Design with Independent Gate FinFET Director of Thesis: Savas Kaya There is an increasing demand for wireless communication because of its convenience for the system-on-chip (SoC) paradigm that integrates the whole system on a single chip. Most of SoC applications such as 5G mobile network, car radar, network-on- chip (NoC) communication require high-frequency oscillators. In particular, the wireless links that can be adapted for on-chip communication can greatly expand the power and latency concerns in future many-core (64 and above) computers. The transmitters in the NoC routers would need very high-frequency wireless channels that must be driven by extremely compact and efficient oscillators that can operate as high as 500 GHz. In this thesis, two high-frequency voltage-controlled oscillators are presented without using any varactors to control the frequency of oscillation. The independent gate (IG) FinFETs are used to tune the oscillation frequency of the oscillators and simulations are carried out using Cadence Virtuoso design tools and BSIM-IMG transistor models inserted into a 65 nm RF-CMOS design kit. The first oscillator design is based on Colpitts architecture using 65 nm IG-FinFETs. The oscillator has 165 GHz oscillation frequency with 3% tunability. The power consumption of the oscillator is 50mW and the area is less than 0.001mm2. The phase noise of the oscillator at 1 MHz is -70 dBc/Hz. The second oscillator design is based on the cross-coupled push-push oscillator 4 architecture using 45 nm IG-FinFETs. The oscillator has 250 GHz oscillation frequency with 2% tunability. The power consumption of the oscillator is 12 mW and the area is less than 0.01mm2. The phase noise of the oscillator at 1 MHz is -82 dBc/Hz. Besides the novel oscillator topologies and their encouraging performance figures, this work also incorporates several other unique aspects, including the use of BSIM-IMG based models in connection with an RF-CMOS design kit, utilization of tunable transistor parasitics for VCO design and incorporation of accurate modeling of 3D inductors obtained via 3D electro-magnetic solvers into the circuit analysis. Although the performance predictions are limited by the finite accuracy of the BSIM model at such elevated frequencies and by the lack of detailed layout rules for the IG-FinFETs, the work performed in this thesis lends strong credence to this transistor architecture for compact circuit development in analog mm-wave circuits in general and SoC wireless applications in particular. 5 TABLE OF CONTENTS Page Abstract ...........................................................................................................................3 List of Tables...................................................................................................................7 List of Figures .................................................................................................................8 Chapter 1 : Introduction ...................................................................................................9 1.1 Overview .............................................................................................................9 1.2 Thesis Objectives ............................................................................................... 12 1.3 Thesis Contributions and Layout ........................................................................ 12 Chapter 2 : Background ................................................................................................. 13 2.1 MOSFET ........................................................................................................... 13 2.1.1 Operation .................................................................................................. 14 2.1.2 Current-Voltage(I-V) Characteristics ......................................................... 15 2.1.3 High-Frequency Model.............................................................................. 17 2.1.4 Derivatives of MOSFET ............................................................................ 20 2.2 IG-FinFET ......................................................................................................... 22 2.2.1 Operation .................................................................................................. 22 2.3 Oscillators .......................................................................................................... 25 2.3.1 Phase Noise ............................................................................................... 26 2.4 Simulation tools ................................................................................................. 27 2.4.1 Cadence Virtuoso CAD Environment ........................................................ 28 2.4.2 BSIM ........................................................................................................ 28 2.4.3 Keysight Advanced Design Systems .......................................................... 30 Chapter 3 : Colpitts Oscillator Design ............................................................................ 32 3.1 Colpitts Oscillator .............................................................................................. 32 3.2 Design with IG-FinFET ..................................................................................... 33 3.3 Simulation Results and Analysis ........................................................................ 36 3.4 Summary ........................................................................................................... 40 Chapter 4 : Cross coupled Push-Push Oscillator Design ................................................. 41 4.1 Cross Coupled Push-Push Oscillator .................................................................. 41 4.2 Design with IG-FinFET ..................................................................................... 44 4.3 Simulations Results and Analysis ....................................................................... 46 6 4.4 Summary ........................................................................................................... 51 Chapter 5 : Conclusions and Future Work ...................................................................... 52 5.1 Conclusions ....................................................................................................... 52 5.2 Future Work ....................................................................................................... 56 References ..................................................................................................................... 58 Appendix A: BSIM Model File ...................................................................................... 63 Appendix B: Netlist Files............................................................................................... 65 Appendix C: Papers Contributed During The Course of This Degree ............................. 67 7 LIST OF TABLES Page Table 5.1 : Similar contemporary oscillators .................................................................. 54 8 LIST OF FIGURES Page Figure 2.1 : Top view of thin-body n-Channel MOSFET .............................................. 15 Figure 2.2 : Drain current vs Drain source voltage ........................................................ 16 Figure 2.3 : Low-frequency small-signal model of MOSFET ........................................ 18 Figure 2.4 : Parasitic capacitances of a MOSFET .......................................................... 19 Figure 2.5 : High-frequency small-signal model of a MOSFET ..................................... 20 Figure 2.6 : a) SOI FinFET, b) SOI tri-gate MOSFET, c) SOI π-gate MOSFET, d) SOI Ω-gate MOSFET, e) SOI gate-all-around MOSFET, f) bulk tri-gate MOSFET ............. 21 Figure 2.7 : IG-FinFET device structure ....................................................................... 23 Figure 2.8 : Oscillator system ........................................................................................ 25 Figure 3.1 : Colpitts oscillator simplified biasing .......................................................... 32 Figure 3.2 : Modified Colpitts oscillator with IG-FinFET ............................................. 34 Figure 3.3 : Small signal model of the modified Colpitts oscillator ............................... 35 Figure 3.4 : IV curves of 65 nm IG FinFET with different back-gate bias ..................... 37 Figure 3.5 : Change in oscillation frequency with back-gate bias voltage ...................... 37 Figure 3.6 : Effects of gate width and length on oscillation frequency, power consumption and tuning range of the oscillator ............................................................
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