Linux Paging

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Operating Systems (Fall/Winter 2018) Linux Paging Yajin Zhou (http://yajin.org) Zhejiang University Acknowledgement: some pages are based on the slides from Zhi Wang(fsu). Introduction X86 Registers • General purpose registers • Segment registers • Control registers • EIP (PC) • EFLAGS System Registers GDTR, LDTR • GDTR: GDT base address and limit • Lgdt sgdt: instructions to load/store GDTR • LGTR Address Translation Step I: logical address to linear address • 根据指令的性质确定使⽤哪⼀个段寄存器 • 根据段寄存器内容，找到 segment descriptor • 从哪⾥找？GDT/LDT，表的地址在GDTR,LDTR • 根据segment descriptor找到base address。然后⽐较limit，和检查访问权限 • liner address = base + offset Step I: logical address to linear address • Q1: how to get segment selector? • DS,CS and etc • Q2: how to get the address of descriptor table? • GDTR, LDTR Step I: logical address to linear address Segment descriptor Step I: logical address to linear address Step II: liner address to physical address • CR3: get the base address of page directory • find the base address of page table based on [31:22] of linear address • Find the page table entry • Get the physical address CR3 and PDE/PTE • CR3 is in PCB and saved/restored during context switch PAE • Physical address extension • 4G physical address space -> 64GB • 32 bit linear address ->52 bit physical address CR3 in PAE • 31:5 -> Page directory pointer • 4 entries, each entry 64 bit. PDPTE0, PDPTE1, PDPTE2, PDPTE3 PDPTE Linear to physical address with PAE • Step I: select PDPTE using [31:30] of linear address. Bit p of PDPTE should be 1 • Step II: address of page directory table is in [51:12] of PDPTE (相当于 CR3)。 There are 512 entries (8 bytes each) in page directory table. Each entry is called page directory entry (PDE). • PDE: [51:12] : [51:12] of PDPTE . [11:3] : [29:21] of linear address, bit [2:0] is zero • Step III: find PTE (page table entry) • PTE: bit [51:12]: PDE. [11:3]: [20:12] of linear address, [2:0]: 0 • Step IV: get physical address. [51:12]: PTE, BIT [11:0]: liner address CR3 Talk is cheap, show me the code! Setup Segment Registers • Set up segment registers when creating a new thread Value • __KERNEL_CS: 12X8 = 96 • __KERNEL_DS: 13X8 = 104 • __USER_DS = 15X8 + 3 = 120 + 3 • __USER_CS = 14X8 + 3 = 110 + 3 Linux uses GDT, not LDT We will show the value of the GDT entry later! Context switch Experiment Ubuntu 1004, 32 bit 参考: http://ilinuxkernel.com/?p=1276 Kernel module • Dump registers Kernel module • Read physical address from a character device Tool to dump memory in user space : Results Output of the user program • PAE is enabled. • GDTR is at 0xc1a40000 (linear address) -> physical address: 0x1a40000. • Temp address: 0xBF95216C Logical -> Linear • GDT entry at index 15 (offset is 15 x 8). • 0x00cff3000000FFFF Logical -> Linear • 0x00cff3000000FFFF -> Base address = 0 • Linear address = logical address Segment descriptor Linear -> Physical • Temp address: BF95216C • 1011 1111 1001 0101 0010 0001 0110 1100 • Locate PDPTE • cr3=2E1DF000 • PDPTE2=0x000000002E2D2001 -> page directory base address (physical address) = 0x2e2d2000 Linear -> Physical • 0x2e2d2000 + 0x1fc(11 1111 100)x 8 = 0x2e2d2FE0 -> page directory entry address • Page table base address: 0x00002E4E4000 (67 is flag) Linear -> Physical • PTE address: 0x00002E4E4000 + 1 0101 0010b*8 = 0x00002E4E4a90 • Physical frame address: 0x2649900 (0x67 and the highest 8: flag) • Physical address: 0x26499000 + 0001 0110 1100b = 0X2649916c • 0x2649916c Logical Address Linear Address Physical Address • 0xBF95216C -> 0xBF95216C -> 0x2649916c HW9 is out.

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Virtual Memory - Paging

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X86 Memory Protection and Translation

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Operating Systems

UC Santa Barbara Operating Systems Christopher Kruegel Department of Computer Science UC Santa Barbara http://www.cs.ucsb.edu/~chris/ Virtual Memory and Paging UC Santa Barbara • What if a program is too big to be loaded in memory • What if a higher degree of multiprogramming is desirable • Physical memory is split in page frames • Virtual memory is split in pages • OS (with help from the hardware) manages the mapping between pages and page frames 2 Mapping Pages to Page Frames UC Santa Barbara • Virtual memory: 64KB • Physical memory: 32KB • Page size: 4KB • Virtual memory pages: 16 • Physical memory pages: 8 3 Memory Management Unit UC Santa Barbara • Automatically performs the mapping from virtual addresses into physical addresses 4 Memory Management Unit UC Santa Barbara • Addresses are split into a page number and an offset • Page numbers are used to look up a table in the MMU with as many entries as the number of virtual pages • Each entry in the table contains a bit that states if the virtual page is actually mapped to a physical one • If it is so, the entry contains the number of physical page used • If not, a page fault is generated and the OS has to deal with it 5 Page Tables UC Santa Barbara • Page tables contain an entry for each virtual table • If virtual memory is big (e.g., 32 bit and 64 bit addresses) the table can become of unmanageable size • Solution: instead of keeping them in the MMU move them to main memory • Problem: page tables are used each time an access to memory is performed.
Lecture 15 15.1 Paging

CMPSCI 377 Operating Systems Fall 2009 Lecture 15 Lecturer: Emery Berger Scribe: Bruno Silva,Jim Partan 15.1 Paging In recent lectures, we have been discussing virtual memory. The valid addresses in a process' virtual address space correspond to actual data or code somewhere in the system, either in physical memory or on the disk. Since physical memory is fast and is a limited resource, we use the physical memory as a cache for the disk (another way of saying this is that the physical memory is \backed by" the disk, just as the L1 cache is \backed by" the L2 cache). Just as with any cache, we need to specify our policies for when to read a page into physical memory, when to evict a page from physical memory, and when to write a page from physical memory back to the disk. 15.1.1 Reading Pages into Physical Memory For reading, most operating systems use demand paging. This means that pages are only read from the disk into physical memory when they are needed. In the page table, there is a resident status bit, which says whether or not a valid page resides in physical memory. If the MMU tries to get a physical page number for a valid page which is not resident in physical memory, it issues a pagefault to the operating system. The OS then loads that page from disk, and then returns to the MMU to ﬁnish the translation.1 In addition, many operating systems make some use of pre-fetching, which is called pre-paging when used for pages.
X86 Memory Protection and Translation

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Darwin: Mac OS X's Core OS

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CS420: Operating Systems Paging and Page Tables

CS420: Operating Systems Paging and Page Tables YORK COLLEGE OF PENNSYLVANIA YORK COLLEGE OF PENNSYLVANIA YORK COLLEGE OF PENNSYLVANIA YORK COLLEGE OF PENNSYLVANIA 'GHI<GJHK&L<MNK'GHI<GJHK&L<MNK 'GONJHK&P@JJHG 'GONJHK&P@JJHG MFIF&'<IJ@QH&'@OK MFIF&'<IJ@QH&'@OK !<GR%&'@ !<GR%&'@ James Moscola 'HGPOJ&N<F&012 'HGPOJ&N<F&012 !"#$%&'())*+,-.)/.&0123454670!"#$%&'())*+,-.)/.&0123454670 YORK COLLEGE OF PENNSYLVANIA Department of Engineering & Computer Science 'GHI<GJHK&L<MNK 8.9:;*&<:(#.="#>&1015?26511??8.9:;*&<:(#.="#>&1015?26511?? @A9/**/")*&<B!&C(>&1015?2D50633@A9/**/")*&<B!&C(>&1015?2D50633'GONJHK&P@JJHG York College of Pennsylvania 05?3352775?30? 05?3352775?30? MFIF&'<IJ@QH&'@OK EEEF+C:F(A; EEEF+C:F(A; !<GR%&'@ 'HGPOJ&N<F&012 !""#$%%&'$#()*$&+$,-$%.$"!""#$%%&'$#()*$&+$,-$%.$" !"#$%&'())*+,-.)/.&0123454670 8.9:;*&<:(#.="#>&1015?26511?? @A9/**/")*&<B!&C(>&1015?2D50633 05?3352775?30? EEEF+C:F(A; !""#$%%&'$#()*$&+$,-$%.$" CS420: Operating Systems Based on Operating System Concepts, 9th Edition by Silberschatz, Galvin, Gagne COLLEGE CATALOG 2009–2011 COLLEGE CATALOG COLLEGE CATALOG 2009–2011 COLLEGE CATALOG COLLEGE CATALOG 2009–2011 COLLEGE CATALOG College Catalog 2009–2011College Catalog 2009–2011 College Catalog 2009–2011 !""#$%&'()*+,--.../ 012$1$"..."34#3$4.56 !""#$%&'()*+,--.../ 012$1$"..."34#3$4.56 !""#$%&'()*+,--.../ 012$1$"..."34#3$4.56 Paging • Paging is a memory-management scheme that permits the physical address space of a process to be noncontiguous - Avoids external fragmentation - Avoids the need for compaction - May still have
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Virtual Memory and Linux

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Sharing Page Tables in the Linux Kernel

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