Hardware Data Value Tracing in Multicores

HARDWARE DATA VALUE TRACING IN MULTICORES by MOUNIKA PONUGOTI A DISSERTATION Submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in The Department of Electrical & Computer Engineering to The School of Graduate Studies of The University of Alabama in Huntsville HUNTSVILLE, ALABAMA 2019 i In presenting this dissertation in partial fulfillment of the requirements for a Doctor of Philosophy degree from The University of Alabama in Huntsville, I agree that the Library of this University shall make it freely available for inspection. I further agree that permission for extensive copying for scholarly purposes may be granted by my advisor or, in his/her absence, by the Chair of the Department or the Dean of the School of Graduate Studies. It is also understood that due recognition shall be given to me and to The University of Alabama in Huntsville in any scholarly use which may be made of any material in this dissertation. (student signature) (date) ii DISSERTATION APPROVAL FORM Submitted by Mounika Ponugoti in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Computer Engineering and accepted on behalf of the Faculty of the School of Graduate Studies by the dissertation committee. We, the undersigned members of the Graduate Faculty of The University of Ala- bama in Huntsville, certify that we have advised and/or supervised the candidate on the work described in this dissertation. We further certify that we have reviewed the dissertation manuscript and approve it in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Computer Engineering. Committee Chair (Dr. Aleksandar Milenkovic) (date) Committee Member (Dr. Rhonda Gaede) (date) Committee Member (Dr. Mohammad Haider) (date) Committee Member (Dr. Tauhidur Rahman) (date) Committee Member (Dr. Earl Wells) (date) Department Chair (Dr. Ravi Gorur) (date) College Dean (Dr. Shankar Mahalingam) (date) Graduate Dean (Dr. David Berkowitz) (date) iii ABSTRACT The School of Graduate Studies The University of Alabama in Huntsville Degree Doctor of Philosophy College/Dept. Engineering/Electrical & Computer Engineering Name of Candidate Mounika Ponugoti Title Hardware Data Value Tracing in Multicores Embedded computing systems powered by modern systems-on-a-chip (SoCs) running sophisticated software applications are indispensable in modern communi- cation, transportation, infrastructure, medicine, military, and entertainment. Semi- conductor technology trends have enabled the design of SoCs that often combine multiple processor cores, hardware accelerators, direct memory controllers, and pe- ripheral interfaces, all connected through an on-chip interconnect. Faster, cheaper, and smaller SoCs have in turn enabled new applications that may have tens of mil- lions of lines of code. These trends have led to rising software engineering costs in modern embedded systems that currently account for over 80% of the total engineering costs. Recent studies found that software developers spend over 50% of their time finding and fixing software bugs. Thus, software debugging is one of the most challenging aspects of embedded system development due to growing hardware and software complexity, limited visibility of system components, and tightening time-to- market. Providing powerful debugging tools to software developers is thus critical to expedite software development and improve software reliability. To find software bugs faster, developers often rely on on-chip trace modules with large buffers to capture program execution traces with minimum interference with program execution. However, high volumes of trace data and the high cost of iv trace modules limit visibility into the system operation to only short program seg- ments that are often insufficient to locate software bugs. This dissertation introduc- es a new hardware/software technique for capturing and filtering read data value traces in multicores that enables a complete reconstruction of parallel program execution. The proposed technique called mcFiltrate (multicore cache filtered read data trace) utilizes tracking of data reads in data caches and cache coherence protocol states to minimize the number of trace messages that needs to be streamed out of the target platform to the software debugger. The effectiveness of the proposed technique is determined by analyzing the required trace port bandwidth and trace buffer sizes as a function of the data cache size and the number of processor cores. The experimental environment utilizes architectural execution-driven simulator running benchmarks from two suites, Splash2 and Parsec. The results of the experimental evaluation show that the proposed technique significantly reduces the required trace port bandwidth, from 12.2 to 59.6 for a single core processor and from 13.4 to 73.9 times for an octa core processor, when compared to the state-of-the-art Nexus-like read data value tracing. The proposed technique reduces the requirements for the on-chip trace buffers by several orders of magnitude and the number of required trace port pins by up to 16 times when compared to the state-of-the-art Nexus-like tracing. Consequently, mcFiltrate enables continuous on-the-fly data tracing while requiring modest changes on the hardware platform and the software debugger. Abstract Approval: Committee Chair (Dr. Aleksandar Milenkovic) Department Chair (Dr. Ravi Gorur) Graduate Dean (Dr. David Berkowitz) v This dissertation is dedicated to the love and energy that made it possible vi ACKNOWLEDGMENTS First and foremost, I would like to express my deepest gratitude to my advisor, Dr. Aleksandar Milenkovic. I would not be in this position without his continuous support, guidance, and encouragement. He always inspired me with his patience even in the very odd times. He has shared profound knowledge with me since I started working with him. I feel lucky to work with a professor like him who can un- derstand the educational background and personality of the student from different countries and guide them accordingly. I sincerely hope to be like him professionally and personally in my future and continue to collaborate with him. I would like to thank Dr. Rhonda Gaede, Dr. Mohammad Haider, Dr. Tau- hidur Rahman, and Dr. Earl Wells for serving on my committee. I would like to thank Dr. Ravi Gorur, Chair of the Electrical and Computer Engineering Depart- ment, for supporting me financially with a teaching assistantship. I would like to thank teaching and non-teaching staff members for teaching me valuable skills and helping whenever required during my time at the University of Alabama in Hunts- ville. Also, I would like to thank Mr. Igor Semenov, Mr. Prawar Poudel, and Mr. Ranjan Hebbar for sharing their knowledge and answering questions whenever I ask them without judging the level of the question. I would like to thank Mr. Amrish K. Tewar who always inspires and teaches me new things whenever I approach him. Finally, I would like to thank Mr. Srinivas R. Mynampally and his family for taking care of me since my arrival to the USA. I would like to express my deepest gratitude to my parents, Bhagavanth R. Ponugoti and Vimala Ponugoti, and my husband, Vamshi K. Vanapally, for their unconditional love and support. vii TABLE OF CONTENTS Page LIST OF FIGURES ...................................................................................................... ix LIST OF TABLES ........................................................................................................ xv INTRODUCTION ...................................................................................16 Motivation ......................................................................................................19 mcFiltrate: Multicore Cache-Filtered Read Data Trace ...............................20 Main Contributions ........................................................................................21 Dissertation Outline ......................................................................................23 BACKGROUND AND MOTIVATION ...................................................24 Software Tracing ............................................................................................25 Software Tracing Frameworks ...............................................................27 Hardware Tracing ..........................................................................................32 Types of Hardware Tracing ....................................................................32 Trace and Debug Infrastructure.............................................................34 State-of-the-art Commercial Hardware Trace Solutions ..............................37 Motivation ......................................................................................................43 Memory Read Data Value Tracing to Detect Race Conditions ..............43 Memory Read Data Value Tracing Challenges ......................................46 RELATED WORK ..................................................................................51 Record and Replay .........................................................................................52 viii Trace Compression.........................................................................................53 Software Trace Compression ..................................................................53 Hardware Trace Compression ................................................................56

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