DOCSLIB.ORG

I.Mx in Automotive

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
I.Mx in Automotive I.MX IN AUTOMOTIVE CARL CHIEN / FAE EXTERNAL USE i.MX Automotive Customers • NXP has solid, long-standing customer relationships with nearly every automotive manufacturer and Tier 1 supplier in the world. We know what it takes to meet the stringent requirements of the global automotive market • NXP has dedicated account teams for most car OEM’s including BMW, GM, Ford, Chrysler, Daimler, VW/Audi, Fiat, Renault, PSA, Volvo, and Hyundai Kai 1 EXTERNAL USE WHY I.MX? 2 EXTERNAL USE i.MX Applications Processor Values • Scalability for Maximum Platform Reuse − Pin compatibility and software portability − CPU (single/dual/quad, asymmetric), GPU, IO − Software: Linux, Android, Windows-embedded, RTOS • Trust Trust Crypto − Longevity: minimum of 10-15 years in all markets − Quality, robustness, zero-defect methodology − Security and Safety Anti- − Qualifications: Automotive AEC-Q100, JEDEC Industrial and Tamper Consumer www.nxp.com/productlongevity • Enablement for Ease of Use − Industry-leading ecosystem, partnerships and support − Design collateral, distribution, communities − System solutions: SoC, sensors, memory, PMIC, connectivity 3 EXTERNAL USE WHY I.MX? SCALABILITY 4 EXTERNAL USE i.MX Roadmap Product Qual Proposal Planning Execution Production i.MX 9 Samples i.MX 8QuadMax i.MX 8QuadPlus i.MX 8Quad i.MX 8Dual i.MX 6Quad i.MX 6QuadPlus i.MX 6Dual i.MX 6DualPlus i.MX 8DualLite i.MX 6DL i.MX 8QuadXPlus Integration i.MX 6Solo i.MX 6SL i.MX 7Dual i.MX 8DualXPlus Performance and i.MX5x i.MX 6SoloX i.MX 7Solo i.MX 8DualX i.MX3x i.MX 6UL Vybrid i.MX 7ULP i.MX 6ULL i.MX2x Prior to 2014 2015 2016 2017 ProductionARM9 Cortex-A8 A5+M4 A7 A35+M4 A72+A53+M4 ARM11 Cortex-A9 A9+M4 A7+M4 A53+M4 5 EXTERNAL USE i.MX 6 Series: Supreme Scalability and Flexibility Leverage One Design into Diverse Product Portfolio Scalable series of TEN ARM-based SoC Families i.MX i.MX i.MX i.MX i.MX i.MX i.MX i.MX i.MX i.MX 6ULL 6UltraLite 6SoloLite 6SoloX 6Solo 6DualLite 6Dual 6DualPlus 6Quad 6QuadPlus i.MX 6UltraLite i.MX 6UltraLite i.MX 6SoloLite i.MX 6SoloX i.MX 6Solo i.MX 6DualLite i.MX 6Dual i.MX 6DualPlus i.MX 6Quad i.MX i.MX i.MX i.MX i.MX i.MX i.MX i.MX i.MX i.MX 6ULL 6UltraLite 6SoloLite 6SoloX 6Solo 6DualLite 6Dual 6DualPlus 6Quad 6QuadPlus Family Family Family Family Family Family Family Family Family Family Pin-to-pin Pin-to-pin Compatible Compatible Software Compatible Expanded series for performance, power efficiency and lower BOM 6 EXTERNAL USE i.MX 8 FAMILY 7 EXTERNAL USE i.MX 8 Series: 3 families of parts with targeted features M4 6QuadPlus i.MX 8 family 6Quad Advanced Graphics and Performance ARM ® v8-A (32-bit/ 64-bit) 6DualPlus M4 i.MX 8M family 6Dual Advanced Audio and Video ARM ® v8-A 6DualLite (32-bit/ 64-bit) Pin-to-pin Compatible Pin-to-pin M4 6Solo i.MX 8X family M4 6SoloX Safety Critical & Efficient Performance ARM ® v8-A (32-bit/ 64-bit) Software Compatible 6SoloLite M4 6UltraLite i.MX 7 Power Efficiency & BOM Cost Optimizations ® 6xLL ARM v7-A (32-bit) ARM® v7-A 8 EXTERNAL USE i.MX 8 Series: Supreme Scalability and Flexibility NEW Scalable series of THREE ARM-based SoC Families A72 A35 A53 A53 i.MX 8X Family M4 i.MX 8M Family M4 i.MX 8 Family M4 i.MX i.MX i.MX i.MX 8M i.MX 8M i.MX 8M i.MX 8M i.MX 8 i.MX 8 i.MX 8 8DualX- 8QuadX- 8DualX Solo Dual QuadLite Quad Quad QuadPlus QuadMax Plus Plus i.MX 6UltraLite i.MX 6UltraLite i.MX 6SoloLite i.MX 6SoloX i.MX 6Solo i.MX 6DualLite i.MX 6Dual i.MX 6DualPlus i.MX 6Quad i.MX 6QuadPlus Pin Compatible Pin Compatible Pin Compatible Software Compatible 9 EXTERNAL USE i.MX 8 Family CPU GPU Virtual Vision Display VPU DDR Up and 3.5x 5x New 10x 4x 8x 3x i.MX 8QMax To The 2.5x 2.5x New 5x 4x 8x 3x Right i.MX 8QPlus 1.5x 2.5x New 5x 4x 8x 3x i.MX 8Quad i.MX 6QuadPlus 10 EXTERNAL USE i.MX 8 - The Dance of the Logos 3.0 3 LPDDR4 OctoSPI Full upgrade across all major peripheral 3.4Mbps classes embedded 2.2 DSI CSI 11 EXTERNAL USE i.MX 8 FAMILY eCOCKPIT SOLUTIONS 12 EXTERNAL USE Full Integration eCockpit on i.MX 8 Family e-cockpit http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx- i.MX 8 Series applications-processors/i.mx-8-processors/i.mx-8-family-processors-transforming-inter-actions- in-ways-youve-never-imagined/i.mx-8-family-arm-cortex-a53-cortex-a72-virtualization-vision- Cluster, Heads Up Display, 3d-graphics-4k-video:i.MX8?tab=Design_Support_Tab Infotainment, Driver Awareness 13 EXTERNAL USE Before eCockpit … Function Duplication over Multiple Platforms 14 EXTERNAL USE i.MX 8 eCockpit Design example 55 MPH 0.4 mi Turn ►► Infotainment Display De-serializer Cluster Display De-serializer HUD Eliminated: RSE ECU housing and design NRE 10-12 Layer PCB Serializer Serializer Serializer Ethernet 10 layer cluster PCB Additional e-Cockpit ECU 5-6 power supplies / circuit protection requirements: CAN DDR Vehicle i.MX 8Q/QP/QM Applications Processor & Software Advanced Applications Processor MCU Processor (Delta from Infotainment SoC) 256MB DDR / 128MB NOR I/O NAND/ eMMC ASIL B ARM Hypervisor Cluster VMCU + ASIL B OS Additional DDR / Additional program NVM Speaker AM/FM NOR Power WiFi TV DAB/HD Cluster plus optional HUD LVDS Serializers CAN Tx/Rx and harness Cluster plus optional HUD Deserializers Debug ports and hardware Discrete components and connectors 15 EXTERNAL USE i.MX 8 Family eCockpit Solutions Optional High Performance 3D High Performance 3D HUD Secondary Display Cluster Infotainment Display Advantages i.MX 8 Display Processor 0 i.MX Display Processor 1 • Dual Independent Display Controllers • Configurable GPU Cores 3D GPU Complex • Single Monolithic GPU • Dual Independent GPUs i.MX 8 GPU Core 0 i.MX 8 GPU Core 1 • Industry Standard ARM enablement ASIL-B OS OPEN OS • SoC Level Virtualization HYPERVISOR A5x Series A7x Series CPU Cluster 0 CPU Cluster 1 16 EXTERNAL USE i.MX SOFTWARE 17 EXTERNAL USE Leadership Software – i.MX Linux Enablement i.MX 6 and 7 series GA on • Silver Member of Linux Foundation Linux kernel • Silver Member AGL Working Group Bronze Member 4.1 (Oct/16) • Over the past 15 years shipping i.MX applications processors, there have been 39,000+ Linux downloads • Multiple i.MX 6 series customer engagements are using GENIVI solutions • NXP has more compliant platforms than ANY semiconductor vendor • Reference: http://www.genivi.org/compliant-products 18 EXTERNAL USE i.MX Android Enablement Commitment: 11 (soon to be 12) Android OS versions released over past 8 years Android Broad Acceptance: 25,000+ downloads of BSP to date Nougat Fast Development: ~4 months from development start to production release on coming multiple Android versions 1H/17 Cross market robustness: Automotive, Embedded/Industrial, Consumer Continued support: New OS releases for min. 2 years after silicon production Leadership: i.MX – only Android system shipping in a top 5 OEM infotainment platform today 2008 2009 2010 2011 2011 2012 2012 2013 2014 2015 2016 2017 19 EXTERNAL USE Strongest Operating Systems for i.MX Applications Processors Supplier i.MX 6, 7 and 8 series i.MX 6SoloX, i.MX 7 and 8 series ARM Cortex-A technology ARM Cortex-M technology NXP Semiconductor Yocto Linux OS and Android OS FreeRTOS (Brillo OS on selected devices) Mentor Embedded Linux OS and Nucleus RTOS Nucleus RTOS Micrium uC/OS II and III RTOS uC/OS II and III RTOS QNX Neutrino RTOS - Green Hills INTEGRITY RTOS - Adeneo Windows Embedded Express Logic ThreadX RTOS (coming soon) ThreadX RTOS (coming soon) 20 EXTERNAL USE i.MX HARDWARE 21 EXTERNAL USE i.MX 6 Reference Designs (with Production Silicon) • All Boards NXP designed • All Boards NXP supported • Common set of boards for 6Q/D/DL/S i.MX 6 i.MX 6 i.MX 6 i.MX 6 i.MX 6 • SoloLite will have its own EVK i.MX 6Quad i.MX 6Dual i.MX 6Dual Lite i.MX 6Solo i.MX 6SoloLite • Dual DDR • Dual DDR • Dual DDR • Single DDR • Single DDR • EPD • EPD • EPD SABRE–AI for Auto ($1499) SABRE Platform for Smart Devices ($999) SABRE Board for Smart Devices ($399) i.MX 6SL EVK ($599) i.MX 6 maximizes use of reference boards across derivative parts 22 EXTERNAL USE Small Package Options for i.MX Processors i.MX product Smallest Ball Grid Array Package on Package Single Chip Module 3rd‐party System on families (BGA) planned (PoP) (SCM) Module (SOM) 17x14, 0.65p, 1GB or i.MX 6Quad 12x12, 0.5p, FC‐CSP 21x21, 0.8p, FC‐PBGA 624 2GB LPDDR2, 16MB Many i.MX 6Dual 569 SPI NOR + PMIC 14x14, 0.65p i.MX 6SoloX Not planned Launching soon Several 17x17, 0.8p 9x9, 0.5p Possible if good i.MX 6UltraLite TBD Several 14x14, 0.8p business case i.MX 7Dual 12x12, 0.4p Possible if good TBD Several i.MX 7Solo 19x19, 0.75p business case 23 EXTERNAL USE Introducing the SCM-i.MX 6D/6Q Discrete Capacitors, • It’s the world’s smallest single chip system. Resistors • Solution integrates fully featured dual-core or SPI NOR quad-core processor, fully integrated power i.MX 6D/Q management system, memory, and enhanced security features in a single chip system Dual Core module, all in the size of a dime.
Load more

Recommended publications
  • Arm Cortex-R52
    Arm Cortex-R52 Product Brief Benefits Overview 1. Software Separation The Cortex-R52 is the most advanced processor in the Cortex-R family delivering real-time Robust hardware-enforced software performance for functional safety. As the first Armv8-R processor, Cortex-R52 introduces separation provides confidence that support for a hypervisor, simplifying software integration with robust separation to protect software functions can’t interfere with safety-critical code, while maintaining real-time deterministic operation required in high each other. For safety-related tasks, dependable control systems. this can mean less code needs to be certified, saving time, cost and effort. Cortex-R52 addresses a range of applications such as high performance domain controllers for vehicle powertrain and chassis systems or as a safety island providing 2. Multiple OS upportS protection in complex ADAS and Autonomous Drive systems. Virtualization support gives developers flexibility, readily allowing consolidation Safety Ready of applications using multiple operating systems within a single CPU. This eases Arm Cortex-R52 is part of Arm’s Safety Ready portfolio, a collection of Arm IP that the addition of functionality without have been through various and rigorous levels of functional safety systematic flows growing the number of electronic and development. control units. Learn more at www.arm.com/safety 3. Real-Time Performance High-performance multicore clusters of Cortex-R52 CPUs deliver real-time responsiveness for deterministic systems with the lowest Cortex-R latency. 1 Specifications Architecture Armv8-R Arm and Thumb-2. Supports DSP instructions and a configurable Floating-Point Unit either with Instruction Set single-precision or double precision and Neon.
    [Show full text]
  • Application Note: QP/C MISRA-C:2004 Compliance Matrix
    QP/C MISRA Compliance Matrix Application Note QP/C™ MISRA-C:2004 Compliance Matrix Document Revision D February 2013 Copyright © Quantum Leaps, LLC info@quantum-leaps.com www.state-machine.com MISRA”, “MISRA C”, and the triangle logo are registered trademarks of MISRA Limited Table of Contents 1 Introduction ..................................................................................................................................................... 1 1.1 About MISRA-C:2004 ............................................................................................................................... 1 1.2 About QP™ ............................................................................................................................................... 1 2 Checking MISRA Compliance with PC-Lint/FlexeLint .................................................................................. 2 2.1 Structure of PC-Lint Options for QP/C ...................................................................................................... 2 2.2 QS Software Tracing and the Spy (Q_SPY) Configuration ....................................................................... 6 2.3 Checking MISRA Compliance of a QP/C Source Code ............................................................................ 6 2.4 Checking MISRA Compliance of a QP/C Application Code ...................................................................... 7 2.5 Testing Rule Coverage Against the MISRA-C Exemplar Suite ................................................................
    [Show full text]
  • UG1046 Ultrafast Embedded Design Methodology Guide
    UltraFast Embedded Design Methodology Guide UG1046 (v2.3) April 20, 2018 Revision History The following table shows the revision history for this document. Date Version Revision 04/20/2018 2.3 • Added a note in the Overview section of Chapter 5. • Replaced BFM terminology with VIP across the user guide. 07/27/2017 2.2 • Vivado IDE updates and minor editorial changes. 04/22/2015 2.1 • Added Embedded Design Methodology Checklist. • Added Accessing Documentation and Training. 03/26/2015 2.0 • Added SDSoC Environment. • Added Related Design Hubs. 10/20/2014 1.1 • Removed outdated information. •In System Level Considerations, added information to the following sections: ° Performance ° Clocking and Reset 10/08/2014 1.0 Initial Release of document. UltraFast Embedded Design Methodology Guide Send Feedback 2 UG1046 (v2.3) April 20, 2018 www.xilinx.com Table of Contents Chapter 1: Introduction Embedded Design Methodology Checklist. 9 Accessing Documentation and Training . 10 Chapter 2: System Level Considerations Performance. 13 Power Consumption . 18 Clocking and Reset. 36 Interrupts . 41 Embedded Device Security . 45 Profiling and Partitioning . 51 Chapter 3: Hardware Design Considerations Configuration and Boot Devices . 63 Memory Interfaces . 69 Peripherals . 76 Designing IP Blocks . 94 Hardware Performance Considerations . 102 Dataflow . 108 PL Clocking Methodology . 112 ACP and Cache Coherency. 116 PL High-Performance Port Access. 120 System Management Hardware Assistance. 124 Managing Hardware Reconfiguration . 127 GPs and Direct PL Access from APU . 133 Chapter 4: Software Design Considerations Processor Configuration . 137 OS and RTOS Choices . 142 Libraries and Middleware . 152 Boot Loaders . 156 Software Development Tools . 162 UltraFast Embedded Design Methodology GuideSend Feedback 3 UG1046 (v2.3) April 20, 2018 www.xilinx.com Chapter 5: Hardware Design Flow Overview .
    [Show full text]
  • ARM Architecture
    ARM Architecture Comppgzuter Organization and Assembly ygg Languages Yung-Yu Chuang with slides by Peng-Sheng Chen, Ville Pietikainen ARM history • 1983 developed by Acorn computers – To replace 6502 in BBC computers – 4-man VLSI design team – Its simp lic ity comes from the inexper ience team – Match the needs for generalized SoC for reasonable power, performance and die size – The first commercial RISC implemenation • 1990 ARM (Advanced RISC Mac hine ), owned by Acorn, Apple and VLSI ARM Ltd Design and license ARM core design but not fabricate Why ARM? • One of the most licensed and thus widespread processor cores in the world – Used in PDA, cell phones, multimedia players, handheld game console, digital TV and cameras – ARM7: GBA, iPod – ARM9: NDS, PSP, Sony Ericsson, BenQ – ARM11: Apple iPhone, Nokia N93, N800 – 90% of 32-bit embedded RISC processors till 2009 • Used especially in portable devices due to its low power consumption and reasonable performance ARM powered products ARM processors • A simple but powerful design • A whlhole filfamily of didesigns shiharing siilimilar didesign principles and a common instruction set Naming ARM •ARMxyzTDMIEJFS – x: series – y: MMU – z: cache – T: Thumb – D: debugger – M: Multiplier – I: EmbeddedICE (built-in debugger hardware) – E: Enhanced instruction – J: Jazell e (JVM) – F: Floating-point – S: SthiiblSynthesizible version (source code version for EDA tools) Popular ARM architectures •ARM7TDMI – 3 pipe line stages (ft(fetc h/deco de /execu te ) – High code density/low power consumption – One of the most used ARM-version (for low-end systems) – All ARM cores after ARM7TDMI include TDMI even if they do not include TDMI in their labels • ARM9TDMI – Compatible with ARM7 – 5 stages (fe tc h/deco de /execu te /memory /wr ite ) – Separate instruction and data cache •ARM11 ARM family comparison year 1995 1997 1999 2003 ARM is a RISC • RISC: simple but powerful instructions that execute within a single cycle at high clock speed.
    [Show full text]
  • Blackberry QNX Multimedia Suite
    PRODUCT BRIEF QNX Multimedia Suite The QNX Multimedia Suite is a comprehensive collection of media technology that has evolved over the years to keep pace with the latest media requirements of current-day embedded systems. Proven in tens of millions of automotive infotainment head units, the suite enables media-rich, high-quality playback, encoding and streaming of audio and video content. The multimedia suite comprises a modular, highly-scalable architecture that enables building high value, customized solutions that range from simple media players to networked systems in the car. The suite is optimized to leverage system-on-chip (SoC) video acceleration, in addition to supporting OpenMAX AL, an industry open standard API for application-level access to a device’s audio, video and imaging capabilities. Overview Consumer’s demand for multimedia has fueled an anywhere- o QNX SDK for Smartphone Connectivity (with support for Apple anytime paradigm, making multimedia ubiquitous in embedded CarPlay and Android Auto) systems. More and more embedded applications have require- o Qt distributions for QNX SDP 7 ments for audio, video and communication processing capabilities. For example, an infotainment system’s media player enables o QNX CAR Platform for Infotainment playback of content, stored either on-board or accessed from an • Support for a variety of external media stores external drive, mobile device or streamed over IP via a browser. Increasingly, these systems also have streaming requirements for Features at a Glance distributing content across a network, for instance from a head Multimedia Playback unit to the digital instrument cluster or rear seat entertainment units. Multimedia is also becoming pervasive in other markets, • Software-based audio CODECs such as medical, industrial, and whitegoods where user interfaces • Hardware accelerated video CODECs are increasingly providing users with a rich media experience.
    [Show full text]
  • Blackberry Playbook OS 2.0 Performs. Best in Class Communications
    BlackBerry PlayBook OS 2.0 Performs. Best in class communications. Powerful productivity. Performance powerhouse. What’s new and exciting about PlayBook™ OS 2.0 A proven performance powerhouse PlayBook OS 2.0 builds on proven performance through powerful hardware and intuitive, easy to use gestures. BlackBerry® PlayBook™ packs a blazing fast dual core processor, two HD 1080p video cameras, and 1 GB of RAM for a high performance experience that is up to the task – whatever it may be. The best of BlackBerry® comes built-in The BlackBerry PlayBook now gives you the BlackBerry communications experience you love, built for a tablet. PlayBook OS 2.0 introduces built-in email that lets you create, edit and format messages, and built-in contacts app and social calendar that connect to your social networks to give you a complete profile ™ of your contacts, including recent status updates. So, seize the BlackBerry App World moment and share it with the power of BlackBerry. The BlackBerry PlayBook has all your favorite apps and thousands more. Games like Angry Birds and Cut The Rope, BlackBerry® Bridge™ Technology social networking sites like Facebook, and even your favorite books from Kobo - the apps you want are here for you to New BlackBerry® Bridge™ features let your BlackBerry® smartphone discover in the BlackBerry AppWorld™ storefront. act as a keyboard and mouse for your BlackBerry PlayBook, giving you wireless remote control of your tablet. Perfect for pausing a movie when your BlackBerry PlayBook is connected to your TV with An outstanding web experience an HDMI connection. Plus, if you’re editing a document or browsing BlackBerry PlayBook puts the power of the real Internet at your a webpage on your BlackBerry smartphone and want to see it on a fingertips with a blazing fast Webkit engine supporting HTML5 larger display, BlackBerry Bridge lets you switch screens to view on and Adobe® Flash® 11.1.
    [Show full text]
  • QNX Neutrino® Realtime Operating System
    PRODUCT BRIEF QNX Neutrino® Realtime Operating System QNX Neutrino® is a full-featured and robust operating system designed to enable the next-generation of products for automotive, medical and industrial embedded systems. Microkernel design and modular architecture enable customers to create highly optimized and reliable systems with low total cost of ownership. With QNX Neutrino®, embedded systems designers can create compelling, safe and secure devices built on a highly reliable operating system software foundation that helps guard against system malfunctions, malware and cyber security breaches. For over 35 years, thousands of companies have deployed and The QNX Neutrino microkernel memory-protected architecture trusted QNX realtime technology to ensure the best combination provides a foundation to build safety-critical systems. QNX of performance, security and reliability in the world’s most Neutrino® is 100% API compatible with QNX pre-certified mission-critical systems. software products that address compliance with safety certifica- tions in automotive (ISO 26262), industrial safety (IEC 61508) and Built-in mission critical reliability medical devices (IEC 62304). Time-tested and field-proven, the QNX Neutrino® is built on a true microkernel architecture. Under this system, every driver, Maximize software investments application, protocol stack, and filesystem runs outside the kernel QNX Neutrino® provides a common software platform that can be in the safety of memory-protected user space. Virtually any deployed for safety certified and non-certified projects across a component can fail and be automatically restarted without broad range of hardware platforms. Organizations can reduce aecting other components or the kernel. No other commercial duplication, costs and risks associated with the deployment of RTOS provides such a high level of fault containment and recovery.
    [Show full text]
  • OMAP 3 Family of Multimedia Applications
    OMAP™ 3 family of multimedia applications processors Revolutionizing entertainment and productivity Key features in wireless handheld commumications • Combines mobile entertainment and high-performance productivity applications. Product Bulletin • Integrates the advanced Superscalar ARM Cortex-A8 RISC core, enabling up to The OMAP™ 3 family of multimedia applications processors from Texas Instruments (TI) 3x gain in performance versus ARM11. introduces a new level of performance that enables laptop-like productivity and advanced • Designed in 45-nm (OMAP36x platform) entertainment in multimedia-enabled handsets. OMAP 3 devices support all levels of and 65-nm (OMAP34x platform) CMOS handsets, from the entry-level multimedia-enabled handsets to high-end Mobile Internet process technologies for less power Devices (MIDs). consumption and increased device performance. Entry-level Mid-level High-end • Includes integrated IVA hardware multimedia-enabled multimedia-enabled multimedia-enabled accelerators to enable multi-standard encode handsets handsets handsets decode up to HD resolution. OMAP3410 OMAP3420 OMAP3430/3440 • Available integrated image signal OMAP3610 OMAP3620 OMAP3630/3640 processor (ISP) enables faster, higher quality image capture, lower system cost TI’s OMAP 3 family of applications processors These devices can operate at a higher and lower power consumption. • Provides seamless connectivity to hard integrate the ARM Cortex-A8 superscalar frequency than previous-generation OMAP diskdrive (HDD) devices for mass storage. microprocessor
    [Show full text]
  • Automotive Foundational Software Solutions for the Modern Vehicle Overview
    www.qnx.com AUTOMOTIVE FOUNDATIONAL SOFTWARE SOLUTIONS FOR THE MODERN VEHICLE OVERVIEW Dear colleagues in the automotive industry, We are in the midst of a pivotal moment in the evolution of the car. Connected and autonomous cars will have a place in history alongside the birth of industrialized production of automobiles, hybrid and electric vehicles, and the globalization of the market. The industry has stretched the boundaries of technology to create ideas and innovations previously only imaginable in sci-fi movies. However, building such cars is not without its challenges. AUTOMOTIVE SOFTWARE IS COMPLEX A modern vehicle has over 100 million lines of code and autonomous vehicles will contain the most complex software ever deployed by automakers. In addition to the size of software, the software supply chain made up of multiple tiers of software suppliers is unlikely to have common established coding and security standards. This adds a layer of uncertainty in the development of a vehicle. With increased reliance on software to control critical driving functions, software needs to adhere to two primary tenets, Safety and Security. SAFETY Modern vehicles require safety certification to ISO 26262 for systems such as ADAS and digital instrument clusters. Some of these critical systems require software that is pre-certified up to ISO 26262 ASIL D, the highest safety integrity level. SECURITY BlackBerry believes that there can be no safety without security. Hackers accessing a car through a non-critical ECU system can tamper or take over a safety-critical system, such as the steering, brakes or engine systems. As the software in a car grows so does the attack surface, which makes it more vulnerable to cyberattacks.
    [Show full text]
  • OMAP-L138 DSP+ARM9™ Development Kit Low-Cost Development Kit to Jump-Start Real-Time Signal Processing Innovation
    OMAP-L138 DSP+ARM9™ Development Kit Low-cost development kit to jump-start real-time signal processing innovation Texas Instruments’ OMAP-L138 development kit is a new, robust low-cost development board designed to spark innovative designs based on the OMAP-L138 processor. Along with TI’s new included Linux™ Software Development Kit (SDK), the OMAP-L138 development kit is ideal for power- optimized, networked applications including industrial control, medical diagnostics and communications. It includes the OMAP-L138 baseboard, SD cards with a Linux demo, DSP/BIOS™ kernel and SDK, and Code Composer Studio™ (CCStudio) Integrated Development Environment (IDE), a power supply and cord, VGA cable and USB cable. Technical details • SATA port (3 Gbps) Key features and benefi ts The OMAP-L138 development kit is based • VGA port (15-pin D-SUB) • OMAP-L138 DSP+ARM9 software and on the OMAP-L138 DSP+ARM9 processor, a • LCD port (Beagleboard-XM connectors) development kit to jump-start real-time low-power applications processor based on • 3 audio ports signal processing innovation an ARM926EJ-S and a TMS320C674x DSP • Reduces design work with downloadable core. It provides signifi cantly lower power • 1 line in and duplicable board schematics and than other members of the TMS320C6000™ • 1 line out design fi les platform of DSPs. The OMAP-L138 processor • 1 MIC in • Fast and easy development of applica- enables developers to quickly design and • Composite in (RCA jack) tions requiring fi ngerprint recognition and develop devices featuring robust operating • Leopard Imaging camera sensor input (32- face detection with embedded analytics systems support and rich user interfaces with pin ZIP connector) • Low-power OMAP-L138 DSP+ a fully integrated mixed-processor solution.
    [Show full text]
  • OPERATING SYSTEMS.Ai
    Introduction Aeroflex Gaisler provides LEON and ERC32 users with a wide range of popular embedded operating systems. Ranging from very small footprint task handlers to full featured Real-Time Operating System (RTOS). A summary of available operating systems and their characteristics is outlined below. VxWorks The VxWorks SPARC port supports LEON3/4 and LEON2. Drivers for standard on-chip peripherals are included. The port supports both non-MMU and MMU systems allowing users to program fast and secure applications. Along with the graphical Eclipse based workbench comes the extensive VxWorks documentation. • MMU and non-MMU system support • SMP support (in 6.7 and later) • Networking support (Ethernet 10/100/1000) • UART, Timer, and interrupt controller support • PCI, SpaceWire, CAN, MIL-STD-1553B, I2C and USB host controller support • Eclipse based Workbench • Commercial license ThreadX The ThreadX SPARC port supports LEON3/4 and its standard on-chip peripherals. ThreadX is an easy to learn and understand advanced pico-kernel real-time operating system designed specifically for deeply embedded applications. ThreadX has a rich set of system services for memory allocation and threading. • Non-MMU system support • Bundled with newlib C library • Support for NetX, and USBX ® • Very small footprint • Commercial license Nucleus Nucleus is a real time operating system which offers a rich set of features in a scalable and configurable manner. • UART, Timer, Interrupt controller, Ethernet (10/100/1000) • TCP offloading and zero copy TCP/IP stack (using GRETH GBIT MAC) • USB 2.0 host controller and function controller driver • Small footprint • Commercial license LynxOS LynxOS is an advanced RTOS suitable for high reliability environments.
    [Show full text]
  • Μc/OS-II™ Real-Time Operating System
    μC/OS-II™ Real-Time Operating System DESCRIPTION APPLICATIONS μC/OS-II is a portable, ROMable, scalable, preemptive, real-time ■ Avionics deterministic multitasking kernel for microprocessors, ■ Medical equipment/devices microcontrollers and DSPs. Offering unprecedented ease-of-use, ■ Data communications equipment μC/OS-II is delivered with complete 100% ANSI C source code and in-depth documentation. μC/OS-II runs on the largest number of ■ White goods (appliances) processor architectures, with ports available for download from the ■ Mobile Phones, PDAs, MIDs Micrium Web site. ■ Industrial controls μC/OS-II manages up to 250 application tasks. μC/OS-II includes: ■ Consumer electronics semaphores; event flags; mutual-exclusion semaphores that eliminate ■ Automotive unbounded priority inversions; message mailboxes and queues; task, time and timer management; and fixed sized memory block ■ A wide-range of embedded applications management. FEATURES μC/OS-II’s footprint can be scaled (between 5 Kbytes to 24 Kbytes) to only contain the features required for a specific application. The ■ Unprecedented ease-of-use combined with an extremely short execution time for most services provided by μC/OS-II is both learning curve enables rapid time-to-market advantage. constant and deterministic; execution times do not depend on the number of tasks running in the application. ■ Runs on the largest number of processor architectures with ports easily downloaded. A validation suite provides all documentation necessary to support the use of μC/OS-II in safety-critical systems. Specifically, μC/OS-II is ■ Scalability – Between 5 Kbytes to 24 Kbytes currently implemented in a wide array of high level of safety-critical ■ Max interrupt disable time: 200 clock cycles (typical devices, including: configuration, ARM9, no wait states).
    [Show full text]