Ansi Eiaitia-530-A
DATA PRO Data Networking 2747 1 Standards
ANSI EIAITIA-530-A
In this report: Datapro Summary
Mechanical ANSI EWTIA-530-A (hereafter EIA-530-A) defines the mechanical interface characteris Characteristics ...... 2 tics between Data Termination Equipment (DTE) and Data Circuit-Terminating Equipment (DCE). It operates in conjunction with RS-422-A and RS-423-A, which define the electrical Functional Description of operation of the individual interchange circuits for balanced and unbalanced operation, re Interchange Circuits ...... 2 spectively. EIA-530-A complements RS-232-D for data rates above 20K bps and replaces RS-449 for data rates above 20K bps. Electrical Characteristics ..... 7
EIA-530-A Interchange Circuit Details ...... 9 A revision of EIA-530, EIA-530-A was ap ElA-530-A governs the mechanical and elec Note: The content of this proved in May 1992 and includes several rela trical characteristics of the interface between report has been reviewed tively minor modifications to the previous stan Data Tenninal Equipment (DTE) and Data Cir and revalidated. It is be dard. The most significant change accounts for cuit-Tenninating Equipment (DCE). The stan ing published with a new the alternative 26-position interface connector dard defines DTE as the hardware on the busi date to indicate that the (Alt A). Other revisions comprise the following: ness machine side of the interface (teleprinters, infonnation is current. • Addition of Circuits CJ (Ready for Receiv display tenninals, front-end processors, central ing), CE (Ring Indicator), and AC (Signal processing units, etc.), and DCE as the modem, Common). signal converter, or other device between the DTE and the communications line. • Use of Circuit CB (Clear to Send) for hard This report compares EIA-530-A with RS- ware flow control. 232-D, RS-449, and CCnT V.35. It also dis • Use of Local Loopback for NBusy oue cusses the mechanical and electrical characteris tics and looks at the general classification of • Change of Circuits CC (DCE Ready) and CD interchange circuits and outlines interchange cir (DTE Ready) to Category II Circuits. cuit details. Copies of EIA-530-A, RS-422-A, and RS- The new standard is compatible with EIA-530, 423-A can be obtained from the Electronic In but applications connecting versions of RS-449 dustries Assn., 2001 I Street NW, Washington, or EIA-530 (with Category I Circuits CC and DC 20006. CD) with ElA-530-A (with Category II Circuits CC and CD) require an unbalanced/balanced converter between the interfaces (see Table NIn_ Analysis terconnecting EIA RS-530-A With EIA RS-449N for circuitry connections). In 1977 the Electronic Industries Assn. (ElA) EIA-530-A operates in conjunction with either developed the RS-449, RS-422, and RS-423 of two standards specifying electrical character standards to eventually replace RS-232-C. RS- istics: RS-422-A, for balanced circuits; and RS- 449, however, never really caught on and, in 423-A, for unbalanced circuits. When each inter March 1987, EIA-530 was introduced as its in face circuit has its own ground lead, the circuit is tended replacement. RS-422 and RS-423 remain balanced. When an interface uses a common or in the revised fonns of RS-422-A and RS-423-A. . shared grounding technique, it is unbalanced. RS-232-C also outlasted RS-449 and, in January EIA-530-A is used for data communications 1987, the EIA issued RS-232-D, a revision for systems with the following characteristics: ( RS-232-C.
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• DTE serializes data bits, and the DCE puts no restrictions on use when a smaller physical connector is required (it is approxi the DTE's bit sequence arrangements. mately W' x 1/4"). In all cases, the DTE provides the cable (up to / • Communication is binary, serial, synchronous, or asynchro 200 feet), which has male (pin) contacts and a female shell (Plug nous, and control information is exchanged on separate cir connector); the DCE has a female connector. The connectors are cuits. equipped with a block that permits latching and unlatching with out a tool. The latching block also permits the use of screws to • Equipment on one side of the DTElDCE interface connects fasten the connectors together. The mechanical configuration for . directly to equipment on the other side without additional tech connections of the interface cable at points other than the demar nical considerations. cation point is not specified. • Communication is in half- and/or full-duplex modes in point When additional functions are offered in a separate unit that is to-point or multipoint configurations over two- or four-wire inserted between the DTE and DCE, the female connector is as facilities with data rates ranging from 20K bps to a nominal sociated with the DTE interface, while the male connector is a upper limit of2.IM bps. Point-to-point arrangements may op DCE interface. erate on either switched or dedicated facilities. Dedicated lines connect multipoint arrangements. Functional Description of Interchange Applications in which cable termination, signal wave shaping, Cireuits interconnection cable distance, and the interface's mechanical Interchange circuits fall into four general classifications: ground configurations must be tailored to meet specific user needs are not (or common return), data circuits, control circuits, and timing precluded, but are generally not within the standard's scope. The circuits. Table "EIA RS-530-A Interchange Circuits" outlines a list EIA-530-A connector, also used for RS-232-D, uses electrical of EIA-530-A interchange circuits showing circuit mnemonic, characteristics that, if improperly connected to some silicon de circuit name, circuit direction, and circuit type. Table "RS-530 vices designed to meet the RS-422-A and RS-423-A electrical and Nearest Equivalent CCl1T V,35" compares the connector pin characteristics specified in this recommendation, could damage assignments and the functional interchange circuits along with an those devices. equivalency table showing the nearest equivalent CCI'IT V.35 functions in relation to each EIA-530-A function. A functional EIA·53G-A/RS.232-D description of each of the EIA-530-A interchange circuits fol These standards include a specification of the D-shaped 25-pin lows. interface connector, which RS-232-C had only referenced in an appendix and never included as part of the standard. Both stan Ground or Common Return Circuits dards support testing of both local and remote DCEs through the Circuit AB and AC (Signal Commons) connects the DTE circuit Local Loopback, Remote Loopback, and Test Mode circuits. Cir ground (signal common) to the DeE circuit ground (signal com cuit names for the first 8 pins in both standards are the same, but mon) to provide a conductive route between the DTE and DCE differ on pins 9, 10, and 11, which are not used in RS-232-D. signal commons. RS-530-A achieves higher data rates than RS-232-D (greater than 20K bps) by specifying the use of balanced signals, while Data Circuits sacrificing some secondary signals and the Ring Indicator. The Circuit BA (Transmitted Data) transfers the data signals origi Ring Indicator's elimination indicates that EIA-530-A is not for nated by the DTE to the DeE. The DTE holds Circuit BA in the use in dial-up applications. binary ONE (marking) condition unless an ON condition is present on all of the following circuits: CA (Request to Send), CB EIA-53Q.A/R5-449 (Clear to Send), CC (DCE Ready), and CD (DTE Ready). The The EIA-530-A standard has officially replaced RS-449 but, DeE disregards any signal appearing on Circuit BA when an OFF while both standards are in use, EIA-530-A can be interconnected condition exists on one or more of these circuits. While an ON with RS-449 devices through a connecting cable or adapter. Table condition is maintained on each of the circuits, the DCE sends all "Interconnecting EIA RS-530·A With EIA RS-449" lists the circuit data signals transmitted across the interface on Circuit BA to the name and mnemonic, and connector contact pin for each inter communications channel. The term "data signals" includes the face. binary ONE (marking) condition, reversals, and other sequences, such as SYN coded characters that maintain timing synchroniza EIA.53Q.A/CCITT V.35 tion. EIA-530-A provides balanced (EIA-422-A) generators and re Circuit BB (Received Data) transfers DCE-generated data ceivers on interchange Circuits CA (Request to Send), CB (Clear signals to the DTE in response to line signals from a remote sta to Send), and CF (Receive Line Signal Detector). The corre tion. Circuit BB is held in the binary ONE (marking) condition sponding interchange circuits in a V.35 interface utilize CCI'IT while Circuit CF (Receive Line Signal Detector) is in the OFF V.28 (EIA-232-E) electrical characteristics. In applications con condition. On half-duplex channels, Circuit BB is held in the necting an EIA-422-A balanced generator with an EIA-232-E un marking condition when Circuit CA is ON and for a brief interval balanced receiver, a special balanced/unbalanced converter must when Circuit CA makes the transition from ON to OFF. This be employed between the interfaces. Otherwise, EIA-530-A and allows for the completion of the transmission and for the decay of CCI'IT V.35 are fully compatible. channel reflections. Mechanical Characteristics TIming Circuits Circuit DA (Transmit Signal Element TIming-DTE Source) The point of demarcation between the DTE and the DCE is at provides the DeE with transmit signal element timing data. The connector plugs on the DCE or at an interface point no further ON to OFF transition nominally indicates the center of each sig than ten feet (three meters) from the DCE. A 25-position connec nal element on Circuit BA. When Circuit DA is implemented in tor was specified for all interchange circuits in EIA-530. EIA- the DTE, the DTE provides timing data on it whenever the DTE is 530-A's alternative 26-position "Alt A" connector is specified for
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i$ Interconnecting EIA RS·530·A With EIA RS-449 \(
EIA-53()'A EIA-R8-449
Circuit Name Mnemonic Contact Contact Mnemonic Circuit Name
Shield None None Shield
Transmitted Data BA(A) 2 4 SD (A) Send Data BA(B) 14 22 SD (B)
Received Data BB (A) 3 6 RD (A) Receive Data BB(B) 16 24 RD (B)
Request to Send CA(A) 4 7 RS (A) Request to Send CA(B) 19 25 RS (B)
Clear to Send CB(A) 5 9 CS (A) Clear to Send CB (B) 13 27 CS (B)
DCE Ready CC 6 11 DM (A) Data Mode (1) 29 OM (B)
DTEReady CD 20 12 TR (A) Terminal Ready (2) 30 TR (B)
Signal Common AS 7 19 SG Signal Ground (2)
Received Une Signal CF (A) 8 13 RR (A) Receiver Ready Detector CF (B) 10 31 RR (B)
Transmit Signal DS(A) 15 5 ST(A) Send Timing Element Timing (DCE DB (B) 12 23 ST(B) Source)
Receiver Signal DD(A) 17 8 RT(A) Receive Timing Element Timing (DCE DO (8) 9 26 RT(B) Source)
Local Loopback LL 18 10 LL Local Loopback
Remote Loopback RL 21 14 RL Remote Loopback
Transmit Signal DA(A) 24 17 TT(A) Terminal Timing Element Timing (DTE DA(B) 11 35 TT(B) Source)
Test Mode TM 25 18 TM Test Mode
Ring Indicator CD 22 15 IC Incoming Call
Signal Common AC 23 20 RC Receive Common (1)
37 SC Send Common (2)
(1) For proper operation with an EIA-449 DTE, connect contacts 20 and 29. ( (2) For proper operation with an EIA-449 DCE, connect contacts 19, 3D, and 37.
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EIA RS-S3G-A Interchange Circuits /'
Circuit Mnemonic Circuit Name Circuit Direction Circuit Type
AB Signal Common Does not apply Common AC Signal Common Does not apply Common
BA Transmitted Data ToDCE Data BB Received Data From DCE Data
DA Transmit Signal Element Timing ToDCE Timing (DTE Source) DB Transmit Signal Element Timing FromDCE Timing (DCE Source) DO Receiver Signal Element Timing From DCE Timing (DCE Source)
CA Request to Send ToDCE Control CB Clear to Send From DCE Control CF Received Line Signal Detector From DCE Control CJ Ready for Receiving ToDCE Control CE Ring Indicator From DCE Control CC DCE Ready From DCE Control CD DTE Ready ToDCE Control
LL Local Loopback ToDCE Timing RL Remote Loopback ToDCE Timing TM Test Mode From DCE Timing in a POWER ON condition. The DTE can withhold timing data DeE to complete transmission of all data previously transferred on this circuit for short periods as long as Circuit CA is in the OfF across the interface on Circuit BA (Transmitted Data) and then to condition. assume a nontransmit, or receive mode, as appropriate. The DCE Circuit DB (Transmit Signal Element TIming-DCE responds to this instruction by turning OfF Circuit CB. Source) provides the DTE with transmit element timing data. The When Circuit CA is turned OfF, it is not turned ON again until DTE provides a data signal on Circuit BA in which the transitions Circuit CB has been turned OfF by the DeE. An ON condition is between signal elements occur at the time of the transitions from required on Circuit CA, as well as on Circuits CB and CC, when OfF to ON condition of the signal on Circuit DB. The DCE pro ever data is transferred across the interface on Circuit BA by the vides timing data on Circuit DB whenever the DCE is in a DTE. Circuit CA may be turned ON at any time when Circuit CB POWER ON condition. The DeE can withhold timing data on is OFF, regardless of the status of any other interface circuit. this circuit if Circuit CC is in the OfF condition. Circuit CB (Clear to Send) indicates that the DeE has been Circuit DD (Receiver Signal Element TIming-DCE conditioned to transmit data over the communications channel. Source) provides the DTE with receive signal element timing The ON condition, together with the ON on Circuit CA (Request data. The DeE provides timing data on this circuit whenever the to Send) and Circuit CC (DeE Ready), indicates to the DTE that DeE is in a POWER ON condition. The DCE can withhold tim signals on Circuit BA (Transmitted Data) will be transmitted to ing data on this circuit for short periods as long as Circuit CC is in the communication channel. The OfF condition indicates that the the OfF condition. DTE should not transfer data across the interface on Circuit BA, since this data will not be transmitted to the line. The ON condi Control Circuits tion of Circuit CB is a response to the occurrence of concurrent Circuit CA (Request to Send) controls the transmit function of ON conditions on Circuits CC and CA, delayed as appropriate by the local DCE and, on half-duplex channels, the direction of data the DeE, to allow the establishment of a data communications transmission. On one-way-only (duplex) channels, the ON condi channel to a remote DTE. Circuit CB may be turned OfF during tion holds the DeE in the transmit mode; the OfF condition sup the data transfer or test phase, independent of Circuit CA's con presses transmission. On a half-duplex channel, the ON condition dition, to signal the DTE to interrupt the transfer of data on Cir holds the DeE in the transmit mode and suppresses the receive cuit BA for a finite period of time. This capability, added in EJA- mode. The OFF condition holds the DeE in the receive mode. A 530-A, provides for OCE flow control or IX;EJDCE transition from OfF to ON instructs the DCE to enter the transmit resynchronization. mode. The DeE responds by taking any necessary action and Circuit CF (Received Line Signal Detector) indicates indicating completion of such action by turning ON Circuit CB whether the receiver in the DCE is ready to receive data signals (Clear .to Send), thereby permitting the DTE to transfer data from the communication channel, but does not indicate the rela across Circuit BA. A transition from ON to OfF instructs the tive quality of the data signals received. An equalizer's condition
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J R5-530 and Nearest Equivalent CCITT V.35 \ ~, '" EIA-53Q-A ccmV.35 Circuit Name Mnemonic Contact Contact Circuit Name Mnemonic
Shield None A Shield None
Transmitted Data BA(A) 2 P Transmitted Data 103 (A) Transmitted Data BA(B) 14 S Transmitted Data 103 (B)
Received Data BB (A) 3 R Received Data 104 (A) Received Data BB (B) 16 T Received Data 104 (A)
Request to Send CA(A) 4 C Request to Send 105 (A) Request to Send CA(B) 19 C (1)
Clear to Send CB(A) 5 0 Clear to Send 106 Clear to Send CB(B) 13
DCE Ready CC 6 E Data Set Ready 107
DTE Ready CD 20 H Data Terminal Ready 10811, 12 (2)
Signal Common AB 7 B Signal Common 102
Received LineSignal CF (A) 8 F Data Channel 109 (1) Detector Received Une Signal Detector Received LineSignal CF (B) 10 F Detector
Transmit Signal DB (A) 15 Y Transmitter Signal 114 (A) Element Timing (DCE Source) Transmit Signal DB (B) 12 AA Transmitter Signal 114 (B) Element Timing (DCE Source)
Receiver Signal DO (A) 17 V Receiver Signal 115 (A) Element Timing (DCE Element Timing Source) Receiver Signal DO (B) 9 X Receiver Signal 115 (B) Element Timing (DCE Element Timing Source)
Local Loopback LL 18 L Local Loopback 141 (2)
Remote Loopback RL 21 N Loopback/ 140 Maintenance (2)
Transmit Signal DA(A) 24 U Transmitter Signal 113 (A) (2) Element Timing (DTE Element Timing Source) Transmit Signal DA(B) 11 W Transmitter Signal 113 (B)(2) Element Timing (DTE Element Timing Source) (
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R5-530 and Nearest Equivalent CCITT V.35 (Continued) / '
EIA-530-A CCITTV.35 Circuit Name Mnemonic Contact Contact Circuit Name Mnemonic
Test Mode TM 25 NN Test Indicator 142
Ring Indicator CE 22 J Calling Indicator 125 (2)
Signal Common AC 23 B Signal Common 102
(1) Special balanced/unbalanced circuitry required between these interfaces. (2) Not included in CCITT V.35, but are provided in ISO 2593 as optional.
in a DCE does not affect Circuit CF. The ON condition indicates Circuit CD (DTE Ready) controls DCE switching to and that the DCE is receiving a signal that meets its criteria, which the from the communications channel. The ON condition prepares DeE manufacturer establishes. The OFF condition indicates that the DeE for connection to a communications channel and main no signal is being received. Circuit CF's OFF condition causes tains the connection. The OFF condition removes the DeE from Circuit BB (Received Data) to be clamped to the binary ONE the communication channel following the completion of any "in (marking) condition. processH transmission. On half-duplex channels, Circuit CF is held in the OFF condi Circuit CJ (Ready for Receiving) controls data transfer tion whenever Circuit CA (Request to Send) is in the ON condi (flow control) on Circuit BB (Received Data) when an interme tion and for a brief interval of time following Circuit CA's tran diate function, such as error control, is being used in the DCE. sition from ON to OFF. The DTE is capable of receiving data when Circuit CJ is ON. Circuit CC (DCE Ready) indicates the status of the local When Circuit CJ is implemented, Circuit CA must be considered DeE; the ON condition does not indicate that a communication to be permanently in the ON condition. channel has been established to a remote data station nor does it Circuit CE (Ring Indicator) indicates when a ringing signal indicate the status of any remote station equipment. The OFF is being received on the communications channel. The ON con condition indicates that the DTE should ignore signals appearing dition appears approximately coincident with the audible ringing. on all other interchange circuits with the exception of Circuit TM Furthermore, the DCE may be configured to only respond to spe (Test Mode). Circuit CC remains in the OFF condition for DCE cific ringing signals in those systems employing custom ring pat tests not completed through the DTElDeE interface. The circuit terns. responds normally (i.e., not clamped OFF) for DCE tests con Circuit LL (Local Loopback) controls the local loopback ducted through the DTElDeE interface. test condition in the local DeE. (See Figure "Loopback Tests" for
Figure Loop/Huk Test,
Facility Test Center \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \
Local ..... Local \ ... \ Remote .... Remote .... LL) \ .... RL) .... DTE ..... DeE , ..... DeE ..... DTE ...... ~ ...... ~ ...... TeN Localloopback and remote loopback tests as seen from the local DTE.
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Ji I," Circuit Requirements ~
DTE Control Interchange Circuits DCE Control Interchange Circuits
CA (Request to Send) CB (Clear to Send) LL (Local Loopback) CF (Receive Line Signal Detector) RL (Remote Loopback) TM (Test Mode) CD (DTE Ready) CC (DCE Ready)
details.) The ON condition instructs the DCE to transfer its output interface connector; each interchange circuit contains a pair of to its receive signal converter to check local operation. After es wires interconnecting a balanced generator and a differential re tablishing the LL test condition, the local DTE turns ON Circuit ceiver. TM. Once TM is ON, the DTE may operate in a duplex mode, using all the circuits in the interface. OFF causes the DCE to Category II Circuits are as follows: release the LL test condition. The LL test does not disable Circuit • Circuit CC (DCE Ready) IC. Circuit RL (Remote Loopback) controls the remote loop • Circuit CD (DTE Ready) back test function (see Figure HLoopback Tests"). This circuit's • Circuit LL (Local Loopback) ON condition causes the local DCE to initiate the RL test on the remote DCE. After turning RLON and detecting an ON condition • Circuit RL (Remote Loopback) on the TM (Test Mode) circuit, the local DTE can operate in a • Circuit TM (Thst Mode) duplex mode using local and remote DCE circuitry. An OFF con dition releases the RL condition. While a unit is in RL test condi Category II Circuits use the unbalanced electrical characteristics tion, communications is out-of-service to the remote DTE. When of RS-423-A. Each circuit contains one wire interconnecting an RL is activated, the DCE presents an OFF condition on Circuit unbalanced generator and a differential receiver. The RS-423-A DM and an ON condition on Circuit TM to the DTE. The local generators use wave shaping that allows operation over an inter DCE presents an ON condition on Circuit TM and allows Circuit face cable length of up to 200 feet (60 meters). The common DM to respond normally. return for Category II interchange circuits is Circuit AB (Signal Circuit TM (Test Mode) indicates that local DCE is in test Ground). condition. ON indicates a test condition, and OFF indicates nor Certain control interchange circuits require that an ON or OFF mal operation. When testing (either LL or RL) is conducted voltage be applied to them at all times for proper operation. If the through the local DTFlDCE interface, Circuit CC responds nor circuit is not associated with an operation generator, a dummy mally; when testing is not conducted through this interface, Cir generator must be provided. The circuits involved are as pre cuit CC is held in an OFF condition. sented in the "Circuit Requirements" table. A dummy generator must meet the appropriate open-circuit. Electrical Characteristics test termination, and short-circuit generator requirements of RS- 422-A or RS-423-A. It is implemented using a 2-watt, 47-ohm RS-422-A (balanced operation) and RS-423-A (unbalanced op resistor connected to a DC source of between 4 and 6 volts. A eration) specify the individual interchange circuits' electrical single dummy generator can signal over more than one inter characteristics. EIA-530-A, like RS-449, specifies the mechani change circuit. Therefore, only two dummy generators are re cal configuration of the connector and the pin assignments and quired for both ON and OFF (positive and negative) circuit con functions of the entire interface, including the timing and interre ditions. The DTE's interface cable must provide separate lationships of the various circuits. conductors for each circuit requiring a dummy generator. 1\\'0 For the purpose of assigning electrical characteristics to the conductors may be used, however: one for the positive dummy interchange circuits (defined functionally earlier in this report), generator and the other for the negative dummy generator. An EIA-530-A has defined two separate categories of circuits. Cat RS-422-A or RS-423-A POWER OFF requirement is required egory I Circuits are as follows: when any of the following circuits uses a dummy generator: • Circuit BA (Transmitted Data) • Circuit CC (DCE Ready), • Circuit BB (Received Data) • Circuit DC (DTE Ready), and • Circuit DA (Transmit Signal Element Timing, DTE Source) • Circuit CA (Request to Send). • Circuit DB (Transmit Signal Element Timing, DCE Source) The RS-422-A standard describes the relationship between sig • Circuit DD (Receiver Signal Element Timing, DCE Source) naling rate and interface cable distance for balanced interchange • Circuit CA (Request to Send) circuits. The guidelines specify that operation over 200 feet of • Circuit CB (Clear to Send) cable limits the maximum signaling rate of balanced interchange circuits to 2 million bps. Operation over cable distances greater • Circuit CF (Received Line Signal Detector) than 200 feet is possible, but viewed as a tailored application. In DTEs and DCEs, protective ground is a point that is elec ( The individual Category I Circuits use the balanced electrical trically bonded to the equipment frame. It can also be connected characteristics of 422-A. Each circuit has two leads through the to external grounds through the third wire of the power cord. It should be noted that protective ground (frame ground) is not an
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Connector Contact Assignments
Contact Number Circuit Interchange Points Circuit Category Direction to DCE Direction from DCE
1 Shield None None Does not apply Does not apply 2 BA A-A' X 3 BB A-A' X 4 CAlCJ (1) A-A' X 5 CB A-A' X
6 CC (2) A-A' n X 7 AB C-C' None Does not apply Does not apply 8 CF A-A' X 9 DD B-B' X 10 CF B-B' X
11 DA B-B' X 12 DB B-B' X 13 CB B-B' X 14 BA B-B' X 15 DB A-A' X
16 BB B-B' X 17 DD A-A' X 18 LL A-A' n X 19 CAlCJ (1) B-B' X 20 CD (2) A-A' n X
21 RL A-A' n X 22 CE A-A' n X 23 AC C-C' None Does not apply Does not apply 24 DA A-A' X 25 TM A-A' n X
26 (3)
(1) When hardware flow control is required, Circuit CA may take on the functionality of Circuit CJ. (2) Interoperation between Category I and /I circuits requires balanced/unbalanced conversion circuitry. (3) Contact 26 is contained on the Ait A connector only. No connection is to be made to this contact. interchange circuit in EIA-530-A. If the DCE and OTE equip in turn. may be connected to an external ground. usually associ ment frames must be bonded, a separate conductor that confonns ated with the power line plug. to the appropriate national or local electrical codes should be For fail-safe operation. the receivers can detect a POWER used. OFF condition in the equipment across the interface or a discon Interface connector pin number 1 facilitates the use of shield nected cable. Detection of either of these conditions is interpreted interconnecting cable, pennitting the DTE cable to carry tandem as an OFF on any of the following interchange circuits: connectorized sections with shield continuity. The DCE does not • Circuit CC (DCE Ready) connect to pin 1. except in some applications requiring electro magnetic interference (EMI) suppression. While additional provi • Circuit CA (Request to Send) sions may be necessary, they are beyond the scope of this stan • Circuit CD (OTE Ready) dard. Proper operation of the interchange circuits requires a path The receiver for each control circuit, except those control circuits between the DTE circuit ground (circuit common) and the DCE specified above, interprets the situation in which the conductor is circuit ground. which is provided by Circuit AB (Signal Ground). not implemented in the interconnecting cable as an OFFcortdi Nonnally. both the DTE and DCE should have their circuit tion. grounds connected to protective grounds (frame grounds), which.
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( Standard Interfaces for Selected Communication System Configuration
Interchange Circuit Configuration Type Sft Configuration Type SO Configuration Type ftO Configuration Type DT
AB Signal Ground M M M M
SA Transmitted Data M M M M BB Received Data M M M
DA Transmit Signal 0 0 0 Element Timing (DTE Source) DB Transmit Signal T T T Element Timing (DCE Source) DO Receiver Signal T T T Element Timing (DCE Source)
CA Request to Send M M CB Clear to Send M M CF Received Line Signal M M Detector cc DCE Ready M M M COOTE Ready S S S
LL Local Loopback 0
~ RL Remote Loopback 0 I \ TM Test Mode M M M
M-Mandatory interchange circuits for a given configuration. T-Additional interchange circuits required for synchronous operation. S-Additional interchange circuit required for switched service. O-Optional interchange circuits.
Genera. Signa. Characteristics Transfer of timing information across the interface is neces Interchange circuits transferring data signals across the interface sary whenever the timing source is capable of generating data, point hold the mark (binary ONE) and space (binary ZERO) con and it should not be restricted only to periods of actual data trans ditions for the total nominal duration of each signal element. EIA- mission. When timing data is not provided on a timing inter 334-A, "Signal Quality at Interface Between Data Processing Ter change circuit, the interchange circuit is clamped in the OFF con minal Equipment and Synchronous Data Communication dition. Tolerances on the relationship between data and associated Equipment for Serial Data Transmission," defines distortion tol timing signals follow the EIA-334-A recommendation. erances for synchronous systems. EIA-363, "Standard for Speci fying Signal Quality for Transmitting and Receiving Data Pro EIA-530·A Interchange Circuit Details cessing Terminal Equipment Using Serial Data Transmission at the Interface with Non-Synchronous Communication Equip Listed below are details of EIA-530-A's additional functions. ment, n states standard naming procedures for specifying signal quality for nonsynchronous systems. Distortion tolerances for Use of Circuits for Testing nonsynchronous systems are stated in EIA-404-A, "Standard for Three interchange circuits permit fault isolation testing done un Start-Stop Signal Quality Between Data Terminal Equipment and der DTE control: Circuit LL (Local Loopback), Circuit RL (Re Non-Synchronous Data Communication Equipment. n Inter mote Loopback), and Circuit TM (Test Mode) (see Figure "Loop change circuits sending timing signals across the interface point back Tests"). keep ON and OFF conditions for nominally equal amounts of The EIA considers the (Circuit TM) and test control (Circuit time, in keeping with the acceptable tolerances specified in EIA- LL and Circuit RL) status circuits a desirable step toward uniform 334-A. methods of fault isolation. These circuits assist DTE and DCE The accuracy and stability of the timing data on Circuit DD users in tracking down a defective unit. (Receiver Signal Element Timing) are needed only when Circuit Local Loopback (LL Test): This test condition is equivalent to CF (Received Line Signal Detector) is ON. During the OFF con CCITI test loop *3. It provides a way in which a DTE can check dition of Circuit CF, drift is acceptable; however, once the OFF to the functioning of a DTE-to-DCE interface and the transmit and ON transition of Circuit CF occurs, resynchronization of the tim receive sections of the local DCE. One may also test the local ing data on Circuit DD must occur as quickly as possible. DCE with a test set instead of through the DTE. The output of the •
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transmitting portion of the DCE is returned to the receiving sta transmitting toward DeE "E". Initial training ofDCE "Es" equal tion in the U. test through circuitry that is required for proper izer occurs during the interval between the ON condition of Cir operation. In many DeEs, the signal transmitted is unsuitable for cuit RS and the ON condition of Circuit CS of DeE "W". Initial direct connection to the receiver. In such cases, an appropriate training in the DeE "Es" receiver occurs prior to the ON condi signal shaping or conversion in the loop-around circuitry may be tion of Circuit RR of DCE "E". Circuit SQ is placed in the ON included so that any element used in normal operations is checked condition no later than the OFF-to-ON transition of Circuit RR if in the test condition. the initial training is successful. Circuit SQ's state is undefined Remote Loopback (RL Test): This test, equivalent to CCnT when Circuit RR is OFF. test loop *2, allows a DTE or a facility test center to check the If the equalizer requires a unique training signal from DCE transmission path through the remote DeE to the DTE interface "W" to achieve equalization, the states of specific interchange and the corresponding return path. In this test, Circuit SO and circuits are controlled during this process. When the normal flow Circuit RD are either isolated or disconnected from the remote of data toward DeE "W" is interrupted in order to cause DeE DTE at the interface and then connected to each other at the re "W" to transmit this unique sequence, Circuit CS of DCE "E" is mote DCE. In synchronous DeEs, a suitable transmit clock may held in the OFF condition while the command signal is being be necessary when the RL test condition is initiated. In some sent. In this situation, Circuit SQ of DeE "W" should be placed in instances, buffer storage may be required between Circuit RO and the OFF condition while receiving the command signal. Circuit Circuit SO. RO of DCE "W" may be clamped to the marking condition while Remote control of the RL test permits the automation of end the command signal is received. In the reverse direction, Circuit to-end testing of any circuit from a central location. Primarily, test CS of DeS "W" is in the OFF condition while the unique training control is suitable in point-to-point applications, but may also be signal is sent. Circuit RO of DeE "E" may be clamped to the used in multipoint arrangements with the addition of an address marking condition when the unique training signal is received. detection feature in the DCE. Test RL enables circuit verification When the equalizer attains proper adjustment, DCE liE" places without the aid of a distant DCE, supported by an inherent remote Circuit SQ in the ON condition. loopback capability in many modern DeEs. The ON states of Circuit RL and Circuit U. are mutually ex Standard Interfaces for Selected Configurations clusive, because the two test conditions may not function simul Standard sets of interchange circuits for data transmission con taneously. figurations are defined as follows: Type SR (Send-Receive), Type SO (Send-Only), Type RO (Receive-Only), and Type DT (Data Equalizers and TIming only). Table "Standard Interfaces for Selected Com Equalization is a process whereby a circuit's frequency and phase munication System Configuration" lists the interchange circuits distortions are reduced to compensate for differences in time de that must be provided for each data transmission configuration. lay and attenuation of the varying frequencies in the transmission For a given type of interface, generators and receivers must be band. An equalizer associated with the DeE may require training, provided for every interchange circuit designated M (Mandatory) a process that produces a fixed number of equally spaced refer in Table "Standard Interfaces for Selected Communication Sys ence signals. tem Configuration." In addition, generators and receivers are nec RS-449 outlines the procedures for equalizer training. The fol essary for all interchange circuits designated S and T, where the lowing example outlines a typical training sequence. DeE "E" service is switched and synchronous, respectively. - (East) has an equalizer that requires training. DeE "W" (West) is
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ANSI EIAITIA-530-A
In this report: Datapro Summary
Mechanical ANSI EIAITIA-530-A (hereafter EIA-530-A) defines the mechanical interface Characteristics ...... 3 characteristics between Data Termination Equipment (DTE) and Data Circuit Terminating Equipment (DCE). It operates in conjunction with RS-422-A and Functional Description RS-423-A, which define the electrical operation of the individual interchange cir of Interchange Circuits ...... 3 cuits for balanced and unbalanced operation, respectively. EIA-530-A comple ments RS-232-D for data rates above 20K bps and replaces RS-449 for data rates Electrical above 20K bps. Characteristics ...... 6
EIA-530-A Interchange Circuit Details ...... 10 A revision of EIA-530, EIA-530-A was ap caught on and, in March 1987, EIA-530 Note: In June 1992 the proved in May 1992 and includes several was introduced as its intended replace Electronic Industries relatively minor modifications to the previ ment. RS-422 and RS-423 remain in the re Assn. published ANSI ous standard. The most significant change vised forms of RS-422-A and RS423-A. EIAfIIA-530-A (1992), accounts for the alternative 26-position in RS-232-C also outlasted RS-449 and, in which is a revision of terface connector (Alt A). Other revisions January 1987, the EIA issued RS-232-D, a ANSI EIA-530 (1987). comprise the following: revision for RS-232-C. • Addition of Circuits CJ (Ready for Re EIA-530-A governs the mechanical and ceiving), CE (Ring Indicator), and AC electrical characteristics of the interface be (Signal Common). tween Data Terminal Equipment (DTE) and Data Circuit-Terminating Equipment • Use of Circuit CB (Clear to Send) for (DCE). The standard defines DTE as the hardware flow control. hardware on the business machine side of • Use of Local Loopback for "Busy Out." the interface (teleprinters, display termi nals, front-end processors, central process • Change of Circuits CC (DCE Ready) and ing units, etc.), and DCE as the modem, sig CD (DTE Ready) to Category II Circuits. nal converter, or other device between the DTE and the communications line. The new standard is compatible with EIA- This report compares EIA-530-A with 530, but applications cOnIlecting versions RS-232-D, RS-449, and CCITT V.35. It of RS-449 or EIA-530 (with Category I Cir also discusses the mechanical and electrical cuits CC and CD) with EIA-530-A (with characteristics and looks at the general clas Category II Circuits CC and CD) require an sification of interchange circuits and out unbalanced/balanced converter between lines interchange circuit details. the interfaces (see Table I for circuitry con Copies of EIA-530-A, RS-422-A, and nections). RS-423-A can be obtained from the Elec In 1977 the Electronic Industries Assn. tronic Industries Assn., 2001 I Street NW, (EIA) developed the RS-449, RS-422, and Washington, DC 20006. RS-423 standards to eventually replace RS- 232-C. RS-449, however, never really Analysis (- -By Vance Macdonald EIA-530-A operates in conjunction with ei Research Analyst ther of two standards specifying electrical
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Table 1. Interconnecting EIA RS·530·A With EIA RS·449
EIA-530-A EIA-RS-449
Circuit Name Mnemonic Contact Contact Mnemonic Circuit Name
Shield None None Shield
Transmitted Data BA(A) 2 4 SD(A) Send Data BA(B) 14 22 SD(B)
Received Data BB(A) 3 6 RD(A) Receive Data BB(B) 16 24 RD(B)
Request to Send CA(A) 4 7 RS(A} Request to Send CA(B) 19 25 RS(B)
Clear to Send CB(A) 5 9 CS(A) Clear to Send CB(B) 13 27 CS(B)
DCE Ready CC 6 11 DM(A) Data Mode (1) 29 DM(B)
DTE Ready CD 20 12 TR(A) Terminal Ready (2) 30 TR(B)
Signal Common AB 7 19 SG Signal Ground (2)
Received Line CF(A) 8 13 RR(A) Receiver Ready Signal Detector CF(B) 10 31 RR(B)
Transmit Signal DB (A) 15 5 ST(A) Send Timing Element Timing DB (B) 12 23 ST(B) (DCE Source)
Receiver Signal DD(A) 17 8 RT(A) Receive Timing Element Timing DD(B) 9 26 RT(B) (DCE Source)
Local Loopback LL 18 10 LL Local Loopback
Remote Loopback RL 21 14 RL Remote Loopback
Transmit Signal DA(A) 24 17 TT(A) Terminal Timing Element Timing DA(B) 11 35 TT(B) (DTE Source)
Test Mode TM 25 18 TM Test Mode
Ring Indicator CE 22 15 IC Incoming Call
Signal Common AC 23 20 RC Receive Common (1)
37 SC Send Common (2)
(1) For proper operation with an EIA-449 DTE, connect contacts 20 and 29. (2) For proper operation with an EIA-449 DCE, connect contacts 19,30, and 37.
Source: Electronic Industries Assn. EIAfTIA-530-A, 1992.
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characteristics: RS-422-A, for balanced circuits; and RS- employed between the interfaces. Otherwise, EIA-530-A 423-A, for unbalanced circuits. When each interface cir and CCITT V.35 are fully compatible. if cuit has its own ground lead, the circuit is balanced. When an interface uses a common or shared grounding tech nique, it is unbalanced. Mechanical Characteristics EIA-530-A is used for data communications systems The point of demarcation between the DTE and the DCE with the following characteristics: is at connector plugs on the DCE or at an interface point no • DTE serializes data bits, and the DCE puts no restric further than ten feet (three meters) from the DCE. A 25- tions on the DTE's bit sequence arrangements. position connector was specified for all interchange cir cuits in EIA-530. EIA-530-A's alternative 26-position "Alt • Communication is binary, serial, synchronous, or asyn A" connector is specified for use when a smaller physical chronous, and control information is exchanged on sep connector is required (it is approximately %" x 1f4"). In all arate circuits. cases, the DTE provides the cable (up to 200 feet), which • Equipment on one side of the DTE/DCE interface con has male (pin) contacts and a female shell (plug connector); nects directly to equipment on the other side without ad the DCE has a female connector. The connectors are ditional technical considerations. equipped with a block that permits latching and unlatching without a tool. The latching block also permits the use of • Communication is in half- and/or full-duplex modes in screws to fasten the connectors together. The mechanical point-to-point or multipoint configurations over two- or configuration for connections of the interface cable at four-wire facilities with data rates ranging from 20K bps points other than the demarcation point is not specified. to a nominal upper limit of 2.1 M bps. Point-to-point ar When additional functions are offered in a separate rangements may operate on either switched or dedicated unit that is inserted between the DTE and DCE, the female facilities. Dedicated lines connect multipoint arrange connector is associated with the DTE interface, while the ments. male connector is a DCE interface. Applications in which cable termination, signal wave shap ing, interconnection cable distance, and the interface's me Functional Description of Interchange chanical configurations must be tailored to meet specific Circuits user needs are not precluded,. but are generally not within the standard's scope. The EIA-530-A connector, also used Interchange circuits fall into four general classifications: for RS-232-D, uses electrical characteristics that, if im ground (or common return), data circuits, control circuits, properly connected to some silicon devices designed to and timing circuits. Table 2 outlines a list of EIA-530-A interchange circuits showing mnemonic name, circuit " ,~\ meet the RS-422-A and RS-423-A electrical characteristics specified in this recommendation, could damage those de identification, circuit direction, and circuit type. Table 3 vices. compares the connector pin assignments and the func tional interchange circuits along with an equivalency table EIA·530·A/RS·232·D showing the nearest equivalent CCITT V.35 functions in These standards include a specification of the D-shaped relation to each EIA-530-A function. A functional descrip 25-pin interface connector, which RS-232-C had only ref tion of each of the EIA-530-A interchange circuits follows. erenced in an appendix and never included as part of the Ground or Common Return Circuits standard. Both standards support testing of both local and remote DCEs through the Local Loopback, Remote Loop Circuit AB and AC (Signal Commons) connects the DTE back, and Test Mode circuits. Circuit names for the first 8 circuit ground (signal common) to the DCE circuit ground pins in both standards are the same, but differ on pins 9, (signal common) to provide a conductive route between 10, and 11, which are not used in RS-232-D. the DTE and DCE signal commons. RS-530-A achieves higher data rates than RS-232-D Data Circuits (greater than 20K bps) by specifying the use of balanced signals, while sacrificing some secondary signals and the Circuit BA (Transmitted Data) transfers the data signals Ring Indicator. The Ring Indicator's elimination indicates originated by the DTE to the DCE. The DTE holds Circuit that EIA-530-A is not for use in dial-up applications. BA in the binary ONE (marking) condition unless an ON condition is present on all of the following circuits: CA EIA·530-A/RS-449 (Request to Send), CB (Clear to Send), CC (DCE Ready), The EIA-530-A standard has officially replaced RS-449 and CD (DTE Ready). The DCE disregards any signal ap but, while both standards are in use, EIA-530-A can be pearing on Circuit BA when an OFF condition exists on interconnected with RS-449 devices through a connecting one or more of these circuits. While an ON condition is cable or adaptor. Table 1 lists the circuit name and mne maintained on each of the circuits, the DCE sends all data monic, and connector contact pin for each interface. signals transmitted across the interface on Circuit BA to the communications channel. The term "data signals" in EIA·530-A/CCITT V.35 cludes the binary ONE (marking) condition, reversals, and EIA-530-A provides balanced (EIA-422-A) generators and other sequences, such as SYN coded characters that main receivers on interchange Circuits CA (Request to Send), tain timing synchronization. CB (Clear to Send), and CF (Receive Line Signal Detec Circuit BB (Received Data) transfers DCE-generated tor). The corresponding interchange circuits in a V.35 in data signals to the DTE in response to line signals from a terface utilize CCITT V.28 (EIA-232-E) electrical charac remote station. Circuit BB is held in the binary ONE teristics. In applications connecting an EIA-422-A (marking) condition while Circuit CF (Receive Line Signal balanced generator with an EIA-232-E unbalanced re Detector) is in the OFF condition. On half-duplex chan ceiver, a special balanced/unbalanced converter must be nels, Circuit BB is held in the marking condition when Cir cuit CA is ON and for a brief interval when Circuit CA
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POWER ON condition. The DTE can withhold timing Table 2. EIA RS·530·A Interchange data on this circuit for short periods as long as Circuit CA Circuits is in the OFF condition. "- Circuit DB (Transmit Signal Element Timing-DCE Source) provides the DTE with tran.smit element timing Circuit Circuit Name Circuit Circuit Type data. The DTE provides a data signal on Circuit BA in Mnemonic Detection which the transitions between signal elements occur at the time of the transitions from OFF to ON condition of the AB Signal Does not Common signal on Circuit DB. The DCE provides timing data on Common apply Circuit DB whenever the DCE is in a POWER ON condi- AC Signal Does not Common tion. The DCE can withhold timing data on this circuit if Common apply Circuit CC is in the OFF condition. Cireuit DD (Receiver Signal Element Timing-DCE BA Transmitted ToDCE Data Source) provides the DTE with receive signal element tim- Data ing data. The DCE provides timing data on this circuit whenever the DCE is in a POWER ON condition. The BB Received Data From DCE Data DCE can withhold timing data on this circuit for short pe- riods as long as Circuit CC is in the OFF condition. DA Transmit ToDCE Timing Signal Control Circuits Element Timing (DTE Circuit CA (Request to Send) controls the transmit fune- Source) tion of the local DCE and, on half-duplex channels, the direction of data transmission. On one-way-only (duplex) DB Transmit From DCE Timing Signal channels, the ON condition holds the DCE in the transmit Element mode; the OFF condition suppresses transmission. On a Timing (DCE half-duplex channel, the ON condition holds the DCE in Source) the transmit mode and suppresses the receive mode. The DO Receiver From DCE Timing OFF condition holds the DCE in the receive mode. A tran- Signal sition from OFF to ON instructs the DCE to enter the Element transmit mode. The DCE responds by taking any neces- Timing (DCE sary action and indicating completion of such action by Source) turning ON Circuit CB (Clear to Send), thereby permitting the DTE to transfer data across Circuit BA. A transition CA Request to ToDCE Control from ON to OFF instructs the DCE to complete transmis- Send sion of all data previously transferred across the interface CB Clear to Send From DCE Control on Circuit BA (Transmitted Data) and then to assume a nontransmit, or receive mode, as appropriate. The DCE CF Received Line From DCE Control Signal responds to this instruction by turning OFF Circuit CB. Detector When Circuit CA is turned OFF, it is not turned ON again until Circuit CB has been turned OFF by the DCE. CJ Ready for ToDCE Control An ON condition is required on Circuit CA, as well as on Receiving Circuits CB and CC, whenever data is transferred across CE Ring Indicator From DCE Control the interface on Circuit BA by the DTE. Circuit CA may be CC DCEReady From DCE Control turned ON at any time when Circuit CB is OFF, regardless CD DTEReady ToDCE Control of the status of any other interface circuit. Circuit CB (Clear to Send) indicates that the DCE has been conditioned to transmit data over the communica- LL Local ToDCE Timing Loopback tions channel. The ON condition, together with the ON on Circuit CA (Request to Send) and Circuit CC (DCE RL Remote ToDCE Timing Ready), indicates to the DTE that signals on Circuit BA Loopback (Transmitted Data) will be transmitted to the communica- TM Test Mode FromDCE Timing tion channel. The OFF condition indicates that the DTE should not transfer data across the interface on Circuit BA, since this data will not be transmitted to the line. The ON Source: Electronic Industries Assn. EIAJTlA~530-A, 1992. condition of Circuit CB is a response to the occurrence of concurrent ON conditions on Circuits CC and CA, de- makes the transition from ON to OFF. This allows for the layed as appropriate by the DCE, to allow the establish- completion of the transmission and for the decay of chan- ment of a data communications channel to a remote DTE. nel reflections. Circuit CB may be turned OFF during the data transfer or Timing Circuits test phase, independent of Circuit CA's condition, to sig- nal the DTE to interrupt the transfer of data on Circuit BA Circuit DA (Transmit Signal Element Timing-DTE for a finite period of time. This capability, added in EIA- Source) provides the DCE with transmit signal element 530-A, provides for DCE flow control or DCE/DCE resyn- timing data. The ON to OFF transition nominally indi- chronization. cates the' center of each signal element on Circuit BA. Circuit CF (Received Line Signal Detector) indicates ",- When Circuit DA is implemented in the DTE, the DTE whether the receiver in the DCE is ready to receive data provides timing data on it whenever the PTE is in a
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( Table 3. RS-530 and Nearest Equivalent CCITT V.35
EIA·S30-A CCITTV.3S
Circuit Name Mnemonic Contact Contact Circuit Name Mnemonic
Shield None A Shield None
Transmitted Data BA(A) 2 P Transmitted Data 103 (A) Transmitted Data BA(B) 14 S Transmitted Data 103 (B)
Received Data BB(A) 3 R Received Data 104 (A) Received Data BB(B) 16 T Received Data 104 (A)
Request to Send CA(A) 4 C Request to Send 105 (A) Request to Send CA(B) 19 C (1)
Clear to Send CB(A) 5 D Clear to Send 106 Clear to Send CB(B) 13
DCE Ready CC 6 E Data Set Ready 107
DTE Ready CD 20 H Data Terminal 108/1, /2 (2) Ready
Signal Common AB 7 B Signal Common 102
Received Line CF(A) 8 F Data Channel 109 (1) Signal Detector Received Line Signal Detector Received Line CF(B) 10 F Signal Detector
Transmit Signal DB (A) 15 Y Transmitter Signal 114 (A) Element Timing (DCE Source) Transmit Signal DB (B) 12 AA Transmitter Signal 114 (B) Element Timing (DCE Source)
Receiver Signal DD(A) 17 V Receiver Signal 115 (A) Element Timing Element Timing (DCE Source) Receiver Signal DD(B) 9 X Receiver Signal 115 (B) Element Timing Element Timing (DCE Source)
Local Loopback LL 18 L Local Loopback 141 (2)
Remote Loopback RL 21 N Loopback/ 140 Maintenance (2)
signals from the communication channel, but does not in- being received. Circuit CF's OFF condition causes Circuit dicate the relative quality of the data signals received. An BB (Received Data) to be clamped to the binary ONE equalizer's condition in a DCE does not affect Circuit CF. (marking) condition. The ON condition indicates that the DCE is receiving a On half-duplex channels, Circuit CF is held in the OFF ( signal that meets its criteria, which the DCE manufacturer condition whenever Circuit CA (Request to Send) is in the establishes. The OFF condition indicates that no signal is ON condition and for a brief interval of time following Circuit CA's transition from ON to OFF.
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Table 3. RS-S30 and Nearest Equivalent CCITT V.3S',Continued)
' . .. -
EIA·530·A CCITTV.35
Circuit Name Mnemonic Contact Contact Circuit Name Mnemonic
Transmit Signal OA(A) 24 U Transmitter Signal 113 (A)(2) Element Timing Element Timing (OTE Source) Transmit Signal OA(8) 11 W Transmitter Signal 113 (8) (2) Element Timing Element Timing (OTE Source)
Test Mode TM 25 NN Test Indicator 142
Ring Indicator CE 22 J Calling Indicator 125 (2)
Signal Common AC 23 8 Signal Common 102
(1) Special balanced/unbalanced circuitry required between these interfaces. (2) Not included in CCITT V.35, but are provided in ISO 2593 as optional.
Source: Electronic Industries Assn. EIAfTIA-530-A, 1992.
Circuit CC (DCE Ready) indicates the status of the local Circuit RL (Remote Loopback) controls the remote DCE; the ON condition does not indicate that a communi loop back test function (see Figure 1). This circuit's ON cation channel has been established to a remote data sta condition causes the local DCE to initiate the RL test on tion nor does it indicate the status of any remote station the remote DCE. After turning RL ON and detecting an equipment. The OFF condition indicates that the DTE ON condition on the TM (Test Mode) circuit, the local should ignore signals appearing on all other interchange DTE can operate in a duplex mode using local and remote circuits with the exception of Circuit TM (Test Mode). Cir DCE circuitry. An OFF condition releases the RL condi cuit CC remains in the OFF condition for DCE tests not tion. While a unit is in RL test condition, communications completed through the DTE/DCE interface. The circuit re is out-of-service to the remote DTE. When RL is activated, sponds normally (i.e., not clamped OFF) for DCE tests the DCE presents an OFF condition on Circuit DM and an conducted through the DTE/DCE interface. ON condition on Circuit TM to the DTE. The local DCE Circuit CD (DTE Ready) controls DCE switching to and presents an ON condition on Circuit TM and allows Cir from the communications channel. The ON condition pre cuit DM to respond normally. pares the DCE for connection to a communications chan Circuit TM (Test Mode) indicates that local DCE is in nel and maintains the connection. The OFF condition re test condition. ON indicates a test condition, and OFF in moves the DCE from the communication channel dicates normal operation. When testing (either LL or RL) following the completion of any "in process" transmission. is conducted through the local DTE/DCE interface, Cir Circuit CJ (Ready for Receiving) controls data transfer cuit CC responds normally; when testing is not conducted (flow control) on Circuit BB (Received Data) when an in through this interface, Circuit CC is held in an OFF condi termediate function, such as error control, is being used in tion. the DCE. The DTE is capable of receiving data when Cir cuit CJ is ON. When Circuit CJ is implemented, Circuit CA must be considered to be permanently in the ON con Electrical Characteristics dition. RS-422-A (balanced operation) and RS-423-A (unbal Circuit CE (Ring Indicator) indicates when a ringing sig anced operation) specify the individual interchange cir nal is being received on the communications channel. The cuits' electrical characteristics. EIA-530-A, like RS-449, ON condition appears approximately coincident with the specifies the mechanical configuration of the connector audible ringing. Furthermore, the DCE may be configured and the pin assignments and functions of the entire inter to only respond to specific ringing signals in those systems face, including the timing and interrelationships of the employing custom ring patterns. various circuits. Circuit LL (Local Loopback) controls the localloopback For the purpose of assigning electrical characteristics to test condition in the local DCE. (See Figure 1 for details.) the interchange circuits (defined functionally earlier in this The ON condition instructs the DCE to transfer its output report), EIA-530-A has defined two separate categories of to its receive signal converter to check local operation. Af circuits. Category I Circuits ,are as follows: ter establishing the LL test condition, the local DTE turns • Circuit BA (Trimsmitted Data) ON Circuit TM. Once TM is ON, the DTE may operate in a duplex mode, using all the circuits in the interface. OFF • Circuit BB (Received Pata) Causes the DCE to release the LL test condition. The LL • Circuit DA (Transmit Signal Element Timing, ,DTE test does not disable Circuit Ie. Source)
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Figure 1. Loopbaek Tests
Facility Test Center, \ \ \ \ \ \ \ \ \ \ \ \ \ \ .. \ .. \ ... Local ~ Local ... Remote ... Remote ...... LL) \ ...... oIIl DTE ~ ., DTE DeE DeE R~ "" TeN Localloopback and remote loopback tests as seen from the local DTE. • Circuit DB (Transmit Signal Element Timing, DCE OlE Control Interchange DCE Control Interchange Source) Circuits Circuits • Circuit DD (Receiver Signal Element Timing, DCE Source) CA (Request to Send) CB (Clear to Send) LL(LocaILoopback) CF (Received Line Signal De • Circuit CA (Request to Send) tector) • Circuit CB (Clear to Send) RL (Remote Loopback) TM (Test Mode) • Circuit CF (Received Line Signal Detector) CD (DTE Ready) CC (DCE Ready)
The individual Category I circuits use the balanced electri cal characteristics of 422-A. Each circuit has two leads A dummy generator must meet the appropriate open-cir through the interface connector; each interchange circuit cuit, test termination, and short-circuit generator require contains a pair of wires interconnecting a balanced gener ments of RS-422-A or RS-423-A. It is implemented using a ator and a differential receiver. 2-watt, 47 -ohm resistor connected to a DC source of be tween 4 and 6 volts. A single dummy generator can signal Category II Circuits are as follows: over more than one interchange circuit. Therefore, only • Circuit CC (DCE Ready) two dummy generators are required for both ON and OFF (positive and negative) circuit conditions. The DTE's in • Circuit CD (DTE Ready) terface cable must provide separate conductors for each • Circuit LL (Local Loopback) circuit requiring a dummy generator. Two conductors may • Circuit RL (Remote Loopback) be used, however: one for the positive dummy generator and the other for the negative dummy generator. An RS- • Circuit TM (Test Mode) 422-A or RS-423-A POWER OFF requirement is required when any of the following circuits uses a dummy genera Category II Circuits use the unbalanced electrical charac tor: teristics ofRS-423-A. Each circuit contains one wire inter • Circuit CC (DCE Ready), connecting an unbalanced generator and a differential re ceiver. The RS-423-A generators use wave shaping that • Circuit DC (DTE Ready), and allows operation over an interface cable length of up to 200 • Circuit CA (Request to Send). feet (60 meters). The common return for Category II inter change circuits is Circuit AB (Signal Ground). The RS-422-A standard describes the relationship between Certain control interchange circuits require that an ON signaling rate and interface cable distance for balanced in or OFF voltage be applied to them at all times for proper terchange circuits. The guidelines specify that operation operation. If the circuit is not associated with an operation over 200 feet of cable limits the maximum signaling rate of generator, a dummy generator must be provided. The cir balanced interchange circuits to 2 million bps. Operation cuits involved are as presented here: over cable distances greater than 200 feet is possible, but viewed as a tailored application.
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Table 4. Connector Contact Assignments
Con"~ Number Circuit Interchange Points Circuit Category Direction to DCE Direction from DCE
1 Shield None None Does not apply Does not apply 2 BA A·A' X 3 BB A-A' X 4 CA/CJ(1) A-A' X 5 CB A-A' X
6 CC(2) A-A' n X 7 AB e.C' None Does not apply Does not apply 8 CF A-A' X 9 DO B-B' X 10 CF B-B' X
11 DA B-B' X 12 DB B-B' X 13 CB B-B' X 14 BA B-B' X 15 DB A-A' X
16 BB B-B' X 17 DO A-A' X 18 LL A-A' n X 19 CA/CJ (1) B-B' X 20 CD (2) A-A' n X
21 RL A-A' n X 22 CE A-A' n X 23 AC C-C' None Does not apply Does not apply 24 DA A-A' X 25 TM A-A' n X
26 (3)
(1) When hardware flow control Is required, Circuit CA may take on the functionality of Circuit CJ. (2) Interoperatlon between Category I and II circuits requires belanced/unbalanced conversion circuitry. (3) Contact 26 Is contained on the Aft A connector only. No connection Is to be made to this contact.
Source: Electronic Industries Assn. EIAJTIA-53O-A, 1992. In DTEs and DCEs, protective ground is a point that is Proper operation of the interchange circuits requires a electrically bonded to the equipment frame. It can also be path between the DTE circuit ground (circuit common) connected to external grounds through the third wire of the and the DCE circuit ground, which is provided by Circuit power cord. It should be noted that protective ground AB (Signal Ground). Normally, both the DTE and DeE (frame ground) is not an interchange circuit in EIA-530-A. should have their circuit grounds connected to protective If the DCE and DTE equipment frames must be bonded, a grounds (frame grounds), which, in tum, may be con separate conductor that conforms to the appropriate na nected to an external ground, usually associated with the tional or local electrical codes should be used. power line plug. Interface connector pin number 1 facilitates the use of For fail-safe operation, the receivers can detect a shield interconnecting cable, permitting the DTE cable to POWER OFF condition in the equipment across the inter carry tandem connectorized sections with shield continu face or a disconnected cable. Detection of either of these ity. The DCE does not connect to pin 1, except in some conditions is interpreted as an OFF on any of the following applications requiring electromagnetic interference (EMI) interchange circuits: suppression. While additional provisions may be neces sary, they are beyond the scope of this standard.
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Table 5. Standard Interfaces for Selected Communication SystelllConfiguration
Interchange Circuit Configuration Type SR Configuration Type SO Configuration Type RO Configuration Type DT
AB Signal Ground M M M M
BA Transmitted Data M M M M BB Received Data M M M
DA Transmit Signal 0 0 0 Element Timing (DTE Source) DB Transmit Signal T T T Element Timing (DCE Source) DO Receiver Signal T T T Element Timing (DCE Source)
CA Request to Send M M CB Clear to Send M M CF Received Line Signal M M Detector CC DCE Ready M M M COOTE Ready S S S
LL Local Loopback 0 RL Remote Loopback 0 TMTestMode M M M
M-Mandatory interchange circuits for a given configuration. T-Additional interchange circuits required for synchronous operation. S-Additional interchange circuit required for switched service. O-Optional interchange circuits. • Circuit CC (DCE Ready) tion tolerances for nonsynchronous systems are stated in • Circuit CA (Request to Send) EIA-404-A, "Standard for Start-Stop Signal Quality Be tween Data Terminal Equipment and Non-Synchronous • Circuit CD (DTE Ready) Data Communication Equipment." Interchange circuits sending timing signals across the interface point keep ON The receiver for each control circuit, except those control and OFF conditions for nominally equal amounts of time, circuits specified above, interprets the situation in which in keeping with the acceptable tolerances specified in EIA- the conductor is not implemented in the interconnecting 334-A. cable as an OFF condition. The accuracy and stability of the timing data on Circuit DO (Receiver Signal Element Timing) are needed only General Signal Characteristics when Circuit CF (Received Line Signal Detector) is ON. Interchange circuits transferring data signals across the in During the OFF condition of Circuit CF, drift is accept terface point hold the mark (binary ONE) and space (bi able; however, once the OFF to ON transition of Circuit nary ZERO) conditions for the total nominal duration of CF occurs, resynchronization of the timing data on Circuit each signal element. EIA-334-A, "Signal Quality at Inter DO must occur as quickly as possible. face Between Data Processing Terminal Equipment and Transfer of timing information across the interface is Synchronous Data Communication Equipment for Serial necessary whenever the timing source is capable of gener Data Transmission," defines distortion tolerances for syn ating data, and it should not be restricted only to periods of chronous systems. EIA-363, "Standard for Specifying Sig actual data transmission: When timing data is not pro nal Quality for Transmitting and Receiving Data Process vided on a timing interchange circuit, the interchange cir ing Terminal Equipment Using Serial Data Transmission cuit is clamped in the OFF condition. Tolerances on the at the Interface with Non-Synchronous Communication relationship between data and associated timing signals Equipment," states standard naming procedures for speci follow the EIA-334~A recommendation. fying signal quality for nonsynchronous systems. Distor-
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EIA-$30-A Interchange Circuit Details Equalizers / Equalization is a process whereby a circuit's frequency and Listed below are details of EIA-530-A's additional func phase distortions are reduced to compensate for differ- tions. ences in time delay and attenuation of the varying frequen- cies in the transmission band. An equalizer associated with Use of Circuits for Testing the DCE may require training, a process that produces a Three interchange circuits permit fault isolation testing fixed number of equally spaced reference signals. done under DTE control: Circuit LL (Local Loopback), RS-449 outlines the procedures for equalizer training. Circuit RL (Remote Loopback), and Circuit TM (Test The following example outlines a typical training se Mode) (see Figure 1). quence. DCE "E" (East) has an equalizer that requires The EIA considers the (Circuit TM) and test control training. DCE "W" (West) is transmitting toward DCE (Circuit LL and Circuit RL) status circuits a desirable step "E". Initial training of DCE "Es" equalizer occurs during toward uniform methods of fault isolation. These circuits the interval between the ON condition of Circuit RS and assist DTE and DCE users in tracking down a defective the ON condition of Circuit CS ofDCE "W". Initial train unit. ing in the DCE "Es" receiver occurs prior to the ON con dition of Circuit RR of DCE "E". Circuit SQ is placed in Local Loopback (LL Test): This test condition is equiva the ON condition no later than the OFF-to-ON transition lent to CCITT test loop # 3. It provides a way in which a of Circuit RR if the initial training is successful. Circuit DTE can check the functioning of a DTE-to-DCE interface SQ's state is undefined when Circuit RR is OFF. and the transmit and receive sections of the local DCE. If the equalizer requires a unique training signal from One may also test the local DCE with a test set instead of DCE "W" to achieve equalization, the states of specific through the DTE. The output of the transmitting portion interchange circuits are controlled during this process. of the DCE is returned to the receiving station in the LL When the normal flow of data toward DCE "W" is inter test through circuitry that is required for proper operation. rupted in order to cause DCE "W" to transmit this unique In many DCEs, the signal transmitted is unsuitable for di sequence, Circuit CS of DCE "E" is held in the OFF con rect connection to the receiver. In such cases, an appropri dition while the command signal is being sent. In this situ ate signal shaping or conversion in the loop-around cir ation, Circuit SQ of DCE "W" should be placed in the cuitry may be included so that any element used in normal OFF condition while receiving the command signal. Cir operations is checked in the test condition. cuit RD ofDCE "W" may be clamped to the marking con dition while the command signal is received. In the reverse Remote Loopback (RL Test): This test, equivalent to direction, Circuit CS ofDCS "W" is in the OFF condition CCITT test loop # 2, allows a DTE or a facility test center while the unique training signal is sent. Circuit RD ofDCE to check the transmission path through the remote DCE to "E" may be clamped to the marking condition when the the DTE interface and the corresponding return path. In unique training signal is received. When the equalizer at this test, Circuit SD and Circuit RD are either isolated or tains proper adjustment, DCE "E" places Circuit SQ in the disconnected from the remote DTE at the interface and ON condition. then connected to each other at the remote DCE. In syn chronous DCEs, a suitable transmit clock may be neces Standard Interfaces for Selected Configurations sary when the RL test condition is initiated. In some in Standard sets of interchange circuits for data transmission stances, buffer storage may be required between Circuit configurations are defined as follows: Type SR (Send-Re RD and Circuit SD. ceive), Type SO (Send-Only), Type RO (Receive-Only), Remote control of the RL test permits the automation and Type DT (Data and Timing only). Table 5 lists the of end-to-end testing of any circuit from a central location. interchange circuits that must be provided for each data Primarily, test control is suitable in point-to-point applica transmission configuration. For a given type of interface, tions, but may also be used in multipoint arrangements generators and receivers must be provided for every inter with the addition of an address detection feature in the change circuit designated M (Mandatory) in Table 5. In DCE. Test RL enables circuit verification without the aid addition, generators and receivers are necessary for all in of a distant DCE, supported by an inherent remote loop terchange circuits designated Sand T, where the service is back capability in many modern DCEs. switched and synchronous, respectively .• The ON states of Circuit RL and Circuit LL are mutu ally exclusive, because the two test conditions may not function simultaneously.
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EIA RS-530
In this report: EIA RS-530, approved in March 1987, de fines the mechanical interface characteris Analysis Mechanical tics between Data Termination Equipment Characteristics ...... 2 (DTE) and Data Circuit-Terminating Equipment (DCE). It operates in conjunc EIA RS-530 operates in conjunction with Functional Description tion with RS-422-A and RS-423-A, which either of two standards specifying electrical of Interchange Circuits ...... 2 define the electrical operation of the indi characteristics: RS-422-A, for balanced cir vidual interchange circuits for balanced cuits; and RS-423-A, for unbalanced cir Electrical and unbalanced operation, respectively. cuits. When each interface circuit has its Characteristics ...... 5 EIA RS-530 complements EIA RS-232-D own ground lead, the circuit is balanced. for data rates above 20K bps and will grad When an interface uses a common or EIA RS-530 Interchange ually replace RS-449 for data rates above shared grounding technique, it is unbal Circuit Details ...... 7 20Kbps. anced. r Highlights RS-530 is used for data communications i Note: The subject of systems with the following characteristics: In 1977, the Electronic Industries Associa this report is consid • DTE serializes data bits, and the DCE ered as a mature stan tion (EIA) developed the RS-449, RS-422, and RS-423 standards to eventually replace puts no restrictions on the DTE's bit se dard. No significant quence arrangements. developments are an RS-232-C. RS-449, however, never really ticipated, but because caught on and, in March 1987, EIA RS-530 • Communication is binary, serial, syn of its importance in the was introduced as its intended replace chronous, or asynchronous, and control industry, coverage is ment. RS-422 and RS-423 remain in the re information is exchanged on separate cir being continued. vised forms of RS-422-A and RS-423-A. cuits. RS-232-C also outlasted RS-449 and, in January 1987, the EIA issued RS-232-D, a • Equipment on one side of the DTE/DCE revision for RS-232-C. interface connects directly to equipment EIA RS-530 governs the mechanical and on the other side without additional tech electrical characteristics of the interface be nical considerations. tween Data Terminal Equipment (DTE) • Communication is in half- andlor full and Data Circuit Terminating Equipment duplex modes in point-to-point or mul (DCE). The standard defines DTE as the tipoint configurations over two- or four hardware on the business machine side of wire facilities with data rates ranging the interface (teleprinters, display termi from 20K bps to a nominal upper limit of nals, front-end processors, central process 2M bps. Point-to-point arrangements ing units, etc.), and DCE as the modem, sig may operate on either switched or dedi nal converter, or other device between the cated facilities. Dedicated lines connect DTE and the communications line. multipoint arrangements. This report compares EIA RS-530 with RS-232-D and RS-449. It also discusses the Applications in which cable termination, mechanical and electrical characteristics signal wave shaping, interconnection cable and looks at the general classification of in distance, and the interface's mechanical terchange circuits and outlines interchange configurations must be tailored to meet circuit details. specific user needs are not precluded, but Copies of EIA RS-530, 422-A, and are generally not within the standard's 423-A can be obtained from the Electronic scope. The EIA RS-530 connector, also Industries Association, 2001 I Street, NW, used for EIA RS-232-D, uses electrical Washington, DC 20006. characteristics that, if improperly con nected to some silicon devices designed to
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Table 1. Interconnecting EIA RS·530 with EIA RS·449
EIA-S30 EIA-RS-449 Circuit, Name, and Mnemonic Contact Contact Circuit, Name, and Mnemonic Shield Shield Transmitted Data BA (A) 2 4 SD (A) Send Data BA (B) 14 22 SD (B) Received Data BB (A) 3 6 RD (A) Receive Data BB (B) 16 24 RD (B) Request to Send CA (A) 4 7 RS (A) Request to Send CA (B) 19 25 RS (B) Clear to Send CB (A) 5 9 CS (A) Clear to Send CB (B) 13 27 CS (B) DCE Ready CC (A) 6 11 DM (A) Data Mode CC (B) 22 29 DM (B) DTE Ready CD (A) 20 12 TR (A) Terminal Ready CD (B) 23 30 TR (B) Signal Ground AB 7 19 SG Signal Ground Received Line CF (A) 8 13 RR (A) Receiver Ready Signal Detector CF (B) 10 31 RR (B) Transmit Signal DB (A) 15 5 ST (A) Send Timing Element Timing DB (B) 12 23 ST (B) (DCE Source) Receiver Signal DD (A) 17 8 RT (A) Receive Timing Element Timing DD (B) 9 26 RT (B) (DCE Source) Local Loopback LL 18 10 LL Local Loopback Remote Loopback RL 21 14 RL Remote Loopback Transmit Signal DA (A) 24 17 TI(A) Terminal Timing Element Timing DA (B) 11 35 TI (B) (DTE Source) Test Mode TM 25 18 TM Test Mode meet the RS-422-A and RS-423-A electrical characteristics Mechanical Characteristics specified in this recommendation, could damage those de vices. The point of demarcation between the DTE and the DCE is at connector plugs on the DCE or at an interface point no An RS-S30/RS-232-D Comparison further than 10 feet (three meters) from the DCE. A 25- These standards include a specification of the D-shaped position connector is specified for all interchange circuits. 25-pin interface connector, which RS-232-C had only ref In all cases, the DTE provides the cable (up to 200 feet), erenced in an appendix and never included as part of the which has male (pin) contacts and a female shell (plug con standard. Both standards support testing of both local and nector); the DCE has a female connector. The connectors remote DCEs through the Local Loopback, Remote Loop are equipped with a block that permits latching and un back, and Test Mode circuits. Circuit names for the first 8 latching without a tool. The latching block also permits the pins in both standards are the same, but differ on pins 9, use of screws to fasten the connectors together. The me 10, and 11, which are not used in RS-232-D. chanical configuration for connections of the interface ca EIA RS-530 achieves higher data rates than RS-232-D ble at points other than the demarcation point is not spec (greater than 20K bps) by specifying the use of balanced ified. signals, while sacrificing some secondary signals and the When additional functions are offered in a separate Ring Indicator. The Ring Indicator'S elimination indicates unit that is inserted between the DTE and DCE, the female that EIA RS-530 is not for use in dial-up applications. connector is associated with the DTE interface, while the male connector is a DCE interface. An EIA RS-S30/RS-449 Comparison The RS-530 standard will one day replace RS-449 but, while both standards are in use, RS-530 can be intercon Functional Description of Interchange nected with devices using RS-449 through a connecting ca Circuits ble or device. Table 1 lists the Circuit Name and Mne Interchange circuits fall into four general classifications: monic, and connector contact pin for each interface. ground (or common return), data circuits, control circuits, and timing circuits. Table 2 outlines a list of EIA RS-530 interchange circuits showing mnemonic name, circuit
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Table 2. EIA RS·530 Interchange other sequences, such as SYN coded characters that main tain timing synchronization. Circuits Circuit BB (Received Data) transfers DCE-generated data signals to the DTE in response to line signals from a remote station. Circuit BB is held in the binary ONE Circuit Circuit Name Circuit Circuit Type (marking) condition while Circuit CF (Receive Line Signal Mnemonic Detection Detector) is in the OFF condition. On half-duplex chan AB Signal Ground nels Circuit BB is held in the marking condition when Cir BA Transmitted To DCE Data cuit' CA is ON and for a brief interval when Circuit CA Data makes the transition from ON to OFF. This allows for the BB Received Data From DCE Data completion of the transmission and for the decay of chan nel reflections. DA Transmit Sig- To DCE Timing nal Element Timing Circuits Timing (DTE Circuit DA (Transmit Signal Element Timing-DTE Source) Source) provides the DCE with transmit signal element DB Transmit Sig- From DCE Timing timing data. The ON to OFF transition nominally indi nal Element Timing (DCE cates the center of each signal element on Circuit BA. Source) When Circuit DA is implemented in the DTE, the DTE DD Receiver Sig- From DCE Timing provides timing data on it whenever th~ DTE is. i~ a nal Element POWER ON condition. The DTE can WIthhold tImmg Timing (DCE data on this circuit for short periods as long as Circuit CA Source) is in the OFF condition. Circuit DB (Transmit Signal Element Timing-DCE CA Request to To DCE Control Source) provides the DTE with transmit element timing Send data. The DTE provides a data signal on Circuit BA in CB Clear to Send From DCE Control which the transitions between signal elements occur at the CF Received Line From DCE Control time of the transitions from OFF to ON condition of the Signal signal on Circuit DB. The DCE provides timing data o~ Detector Circuit DB whenever the DCE is in a POWER ON condI CC DCE Ready From DCE Control tion. The DCE can withhold timing data on this circuit if ( CD DTE Ready To DCE Control Circuit CC is in the OFF condition. \ LL Local To DCE Control Circuit DD (Receiver Signal Element Timing-DCE Loopback Source) provides the DTE with receive signal ele~en~ ti~ RL Remote To DCE Control ing data. The DCE provides timing data on t~~s ClrcUlt Loopback whenever the DCE is in a POWER ON condItIon. The TM Test Mode From DCE Control DCE can withhold timing data on this circuit for short pe riods as long as Circuit CC is in the OFF condition. Control Circuits identification, circuit direction, and circuit type. Table 3 Circuit CA (Request to Send) controls the transmit func compares the connector pin assignments and the func tion of the local DCE and, on half-duplex channels, the tional interchange circuits along with an equivalency table direction of data transmission. On one-way-only (duplex) showing the nearest equivalent EIA RS-232-D and ~CITT channels the ON condition holds the DCE in the transmit V.24 functions in relation to each EIA RS-530 functIon. A mode; the OFF condition suppresses transmission. On a functional description of each of the EIA RS-530 inter half-duplex channel, the ON condition holds the DCE in change circuits follows. the transmit mode and suppresses the receive mode. The Ground or Common Return Circuits OFF condition holds the DCE in the receive mode. A tran sition from OFF to ON instructs the DCE to enter the Circuit AB (Signal Ground) connects the DTE circuit transmit mode. The DCE responds by taking any neces ground (circuit common) to the DCE circuit ground (cir sary action and indicating completion of such acti~n. by cuit common) to provide a conductive route between the turning ON Circuit CB (Clear to Send), thereby permIttmg DTE and DCE signal commons. the DTE to transfer data across Circuit BA. A transition Data Circuits from ON to OFF instructs the DCE to complete transmis sion of all data previously transferred across the interface Circuit BA (Transmitted Data) transfers the data signals on Circuit BA (Transmitted Data) and then to assume a originated by the DTE to the DCE. The DTE holds Circuit nontransmit or receive mode, as appropriate. The DCE BA in the binary ONE (marking) condition unless an ON responds to this instruction by turning OFF Circuit CB. condition is present on all of the following circuits: CA When Circuit CA is turned OFF, it is not turned ON (Request to Send), CB (Clear to Send), CC (DCE Ready), again until Circuit CB has been turned OFF by the DCE. and CD (DTE Ready). The DCE disregards any signal ap An ON condition is required on Circuit CA, as well as on pearing on Circuit BA when an O!,F condition ex;i~ts 0!1 Circuits CB and CC, whenever data is transferred across one or more of these circuits. WhIle an ON condItIon IS the interface on Circuit BA by the DTE. Circuit CA may be maintained on each of the circuits, the DCE sends all data turned ON at any time when Circuit CB is OFF, regardless signals transmitted across the interface on Circuit BA to of the status of any other interface circuit. the communications channel. The term "data signals" in cludes the binary ONE (marking) condition, reversals, and
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Table 3. RS·530 and Nearest Equivalent RS·232·C and CCITT V.24
EIA RS-530 Circuit EIA RS-530 25 Pin CCITT V.24 Circuit EIA RS-232-D EIA RS·232·D Description Circuit Description Shield 1 Shield BA Transmitted Data 2 103 BA Transmitted Data BB Received Data 3 104 BB Received Data CA Request to Send 4 105 CA Request to Send CB Clear to Send 5 106 CB Clear to Send CC DCE Ready 6 107 CC DCE Ready AB Signal Ground 7 102 AB Signal Ground CF Received Line Signal 8 109 CF Received Line Signal Detector Detector DD Receiver Signal Ele- 9 Reserved for Testing ment timing (DCE) CF Received Line Signal 10 Reserved for Testing Detector DA Transmit Signal Ele· 11 Unassigned ment Timing (DTE) DB Transmit Signal Ele· 12 122/112 SCF/CI Secondary Received ment Timing (DCE) Line Signal Detector· IData Signal Rate Selector (DCE) CB Clear to Send 13 121 SCB Secondary Clear to Send BA Transmitted Data 14 118 SBA Secondary Transmit· ted Data DB Transmitter Signal 15 114 DB Transmitter Signal Element Timing Element Timing (DC E) (DC E) BB Received Data 16 119 SBB Secondary Received Data DD Receiver SignalEle- 17 115 DD Receiver Signal Ele· ment Timing (DCE) ment Timing (DCE) LL Local Loopback Circuit CB (Clear to Send) indicates that the DCE has ON condition and for a brief interval of time following been conditioned to transmit data over the communica Circuit CA's transition from ON to OFF. tions channel. The ON condition, together with the ON on Circuit CC (DCE Ready) indicates the status of the local Circuit CA (Request to Send) and Circuit CC (DCE DCE; the ON condition does not indicate that a communi Ready), indicates to the DTE that signals on Circuit BA cation channel has been established to a remote data sta (Transmitted Data) will be transmitted to the communica tion nor does it indicate the status of any remote station tion channel. The OFF condition indicates that the DTE equipment. The OFF condition indicates that the DTE should not transfer data across the interface on Circuit BA, should ignore signals appearing on all other interchange since this data will not be transmitted to the line. The ON circuits with the exception of Circuit TM (Test Mode). Cir condition of Circuit CB is a response to the occurrence of cuit CC remains in the OFF condition for DCE tests not concurrent ON conditions on Circuits CC and CA, de completed through the DTE/DCE interface. The circuit re layed as appropriate by the DCE, to allow the establish sponds normally (i.e., not clamped OFF) for DCE tests ment of a data communications channel to a remote DTE. conducted through the DTE/DCE interface. Circuit CF (Received Line Signal Detector) indicates Circuit CD (DTE Ready) controls DCE switching to and whether the receiver in the DCE is ready to receive data from the communications channel. The ON condition pre signals from the communication channel, but does not in pares the DCE for connection to a communications chan dicate the relative quality of the data signals received. An nel and maintains the connection. The OFF condition re equalizer's condition in a DCE does not affect Circuit CF. moves the DCE from the communication channel The ON condition indicates that the DCE is receiving a following the completion of any "in process" transmission. signal that meets its criteria, which the DCE manufacturer Circuit LL (Local Loopback) controls the local loop back establishes. The OFF condition indicates that no signal is test condition in the local DCE. (See Figure I for details.) being received. Circuit CF's OFF condition causes Circuit The ON condition instructs the DCE to transfer its output BB (Received Data) to be clamped to the binary ONE to its receive signal converter to check local operation. Af (marking) condition. ter establishing the LL test condition, the local DTE turns On half-duplex channels, Circuit CF is held in the OFF ON Circuit TM. Once TM is ON, the DTE may operate in condition whenever Circuit CA (Request to Send) is in the a duplex mode, using all the circuits in the interface. OFF
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Figure 1. Loopback Tests
Facility Test Center \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ...... Local ... Local \ ... \ Remote .... Remote ... DeE· \ ... Rl) ... DTE ~ l~ ""I DeE """I DTE TeN
Localloopback and remote loopback tests as seen/rom the local DTE. causes the DCE to release the LL test condition. The LL • Circuit DA (Transmit Signal Element Timing, DTE test does not disable Circuit IC Source) Circuit RL (Remote Loopback) controls the remote • Circuit DB (Transmit Signal Element Timing, DCE loopback test function (see Figure 1). This circuit's ON Source) condition causes the local DCE to initiate the RL test on the remote DCE. After turning RL ON and detecting an • Circuit DD (Receiver Signal Element Timing, DCE ON condition on the TM (Test Mode) circuit, the local Source) DTE can operate in a duplex mode using local and remote • Circuit CA (Request to Send) DCE circuitry. An OFF condition releases the RL condi tion. While a unit is in RL test condition, communications • Circuit CB (Clear to Send) is out-of-service to the remote DTE. When RL is activated, • Circuit CF (Received Line Signal Detector) the DCE presents an OFF condition on Circuit DM and an • Circuit CC (DCE Ready) ON condition on Circuit TM to the DTE. The local DCE presents an ON condition on Circuit TM and allows Cir • Circuit CD (DTE Ready) cuit DM to respond normally. Circuit TM (Test Mode) indicates that local DCE is in The individual Category I circuits use the balanced electri test condition. ON indicates a test condition, and OFF in cal characteristics ofEIA-422-A. Each circuit has two leads dicates normal operation. When testing (either LL or RL) through the interface connector; each interchange circuit is conducted through the local DTE/DCE interface, Cir contains a pair of wires interconnecting a balanced gener cuit CC responds normally; when testing is not conducted ator and a differential receiver. through this interface, Circuit CC is held in an OFF condi tion. Category II Circuits are as follows: • Circuit LL (Local Loopback) Electrical Characteristics • Circuit RL (Remote Loopback) RS-422-A (balanced operation) and RS-423-A (unbal • Circuit TM (Test Mode) anced operation) specify the individual interchange cir cuits' electrical characteristics. EIA RS-530, like RS-449, Category II Circuits use the unbalanced electrical charac specifies the mechanical configuration of the connector teristics of EIA-423-A. Each circuit contains one wire in and the pin assignments and functions of the entire inter terconnecting an unbalanced generator and a differential face, including the timing and interrelationships of the receiver. The EIA-423-A generators use wave shaping that various circuits. allows operation over an interface cable length of up to 200 For the purpose of assigning electrical characteristics to feet (60 meters). The common return for Category II inter the interchange circuits (defined functionally earlier in this change circuits is Circuit AB (Signal Ground). report), EIA RS-530 has defined two separate categories of Certain control interchange circuits require that an ON circuits. Category I Circuits are as follows: or OFF voltage be applied to them at all times for proper • Circuit BA (Transmitted Data) operation. Ifthe circuit is not associated with an operation • Circuit BB (Received Data)
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Table 4. Connector Contact Assignments
Contact Number Circuit Interchange Points Circuit Category Direction to DCE Direction from DCE Shield 2 8A A-A1 X 3 88 A-A1 X 4 CA A-A1 X 5 C8 A-A1 X 6 CC A-A1 X 7 A8 C-C1 X 8 CF A-A1 X 9 DO 8-81 X 10 CF 8-81 X 11 DA 8-81 X 12 08 8-81 X 13 C8 8-81 X 14 8A 8-81 X 15 D8 A-A1 X 16 88 8-81 X 17 DD A-A1 X 18 LL A-A1 X 19 CA 8-81 X 20 CD A-A1 X 21 RL A-A1 X 22 CC 8-81 X 23 CD 8-81 X 24 DA A-A1 X 25 TM A-A1 X Note: Interchange Points A-A', B-B' for each Category I circuit should be assigned twisted pairs in interconnecting cables to minimize cross talk. generator, a dummy generator must be provided. The cir and the other for the negative dummy generator. An RS- cuits involved are: 422-A or RS-423-A POWER OFF requirement is required when any of the following circuits uses a dummy genera DTE Control Interchange Cir DCE Control Interchange Cir tor: cuits cuits • Circuit CC (DCE Ready), CA (Request to Send) C8 (Clear to Send) • Circuit DC (DTE Ready), and LL(LocaILoopback) CF (Received Line Signal De • Circuit CA (Request to Send) tector) RL (Remote Loopback) TM (Test Mode) The RS-422-A standard describes the relationship between CD (DTE Ready) CC (DCE Ready) signaling rate and interface cable distance for balanced in terchange circuits. The guidelines specify that operation over 200 feet of cable limits the maximum signaling rate of balanced interchange circuits to 2 million bps. Operation A dummy generator must meet the appropriate open over cable distances greater than 200 feet is possible, but circuit, test termination, and short-circuit generator re viewed as a tailored application. quirements ofEIA-422-A or EIA-423-A. It is implemented In DTEs and DCEs, protective ground is a point that is using a 2-watt, 47-ohm resistor connected to a DC source electrically bonded to the equipment frame. It can also be of between 4 and 6 volts. A single dummy generator can connected to external grounds through the third wire of the signal over more than one interchange circuit. Therefore, power cord. It should be noted that protective ground· only two dummy generators are required for both ON and (frame ground) is not an interchange circuit in EIA RS- OFF (positive and negative) circuit conditions. The DTE's 530. If the DCE and DTE equipment frames must be interface cable must provide separate conductors for each bonded, a separate conductor that conforms to the appro circuit requiring a dummy generator. Two conductors may priate national or local electrical codes should be used. be used, however, one for the positive dummy generator Interface connector pin number I facilitates the use of shield interconnecting cable, permitting the DTE cable to
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carry tandem connectorized sections with shield continu EIA RS·530 Interchange Circuit Details ity. The DCE does not connect to pin 1, except in some applications requiring electromagnetic interference (EMI) Listed below are details ofRS-530's additional functions. suppression. While additional provisions may be neces sary, they are beyond the scope of this standard. Use of Circuits for Testing Proper operation of the interchange circuits requires a Three interchange circuits permit fault isolation testing path between the DTE circuit ground (circuit common) d?ne .under DTE control: Circuit LL (Local Loopback), and the DCE circuit ground, which is provided by Circuit CIrcUlt RL (Remote Loopback), and Circuit TM (Test AB (Signal Ground). Normally, both the DTE and DCE Mode) (see Figure 1). should have their circuit grounds connected to protective The EIA considers the (Circuit TM) and test control grounds (frame grounds), which, in turn, may be con (Circuit LL and Circuit RL) status circuits a desirable step nected to an external ground, usually associated with the toward uniform methods of fault isolation. These circuits power line plug. assist DTE and DCE users in tracking down a defective For fail-safe operation, the receivers can detect a unit. POWER OFF condition in the equipment across the inter face or a disconnected cable. Detection of either of these Local Loopback (LL Test): This test condition is equiva conditions is interpreted as an OFF on any of the following lent to CCITT test loop # 3. It provides a way in which a interchange circuits: DTE can check the functioning of a DTE-to-DCE interface and the transmit and receive sections of the local DCE. • Circuit CC (DCE Ready) One may also test the local DCE with a test set instead of • Circuit CA (Request to Send) through the DTE. The output of the transmitting portion • Circuit CD (DTE Ready) of the DCE is returned to the receiving station in the LL test through circuitry that is required for proper operation. The receiver for each control circuit, except those control In many DCEs, the signal transmitted is unsuitable for di rect connection to the receiver. In such cases, an appropri circuits specified above, interprets the situation in which ate signal shaping or conversion in the loop-around cir the conductor is not implemented in the interconnecting cuitry may be included so that any element used in normal cable as an OFF condition. operations is checked in the test condition. General Signal Characteristics Interchange circuits transferring data signals across the in Remote Loopback (RL Test): This test, equivalent to terface point hold the mark (binary ONE) and space (bi CCITT test loop # 2, allows a DTE or a facility test center nary ZERO) conditions for the total nominal duration of to check the transmission path through the remote DCE to each signal element. EIA-334-A, "Signal Quality at Inter the DTE interface and the corresponding return path. In face Between Data Processing Terminal Equipment and this test, Circuit SD and Circuit RD are either isolated or Synchronous Data Communication Equipment for Serial disconnected from the remote DTE at the interface and Data Transmission" defines distortion tolerances for syn then connected to each other at the remote DCE. In syn chronou~ systems. EIA-363, "Standard for Specifying Sig chronous DCEs, a suitable transmit clock may be neces nal Quahty for Transmitting and Receiving Data Process sary when the RL test condition is initiated. In some in ing Terminal Equipment Using Serial Data Transmission stances, buffer storage may be required between Circuit at the Interface with Non-Synchronous Communication RD and Circuit SD. Equipment," states standard naming procedures for speci Remote control of the RL test permits the automation fying signal quality for nonsynchronous systems. Distor of end-to-end testing of any circuit from a central location. hon tolerances for nonsynchronous systems are stated in Primarily, test control is suitable in point-to-point applica EIA-404-A, "Standard for Start-Stop Signal Quality Be tions, but may also be used in multipoint arrangements tween Data Terminal Equipment and Non-Synchronous with the addition of an address detection feature in the Data Communication Equipment." Interchange circuits DCE. Test RL enables circuit verification without the aid sending timing signals across the interface point keep ON of a distant DCE, supported by an inherent remote loop and OFF conditions for nominally equal amounts of time back ability in many modern DCEs. in keeping with the acceptable tolerances specified in EIA: The ON states of Circuit RL and Circuit LL are mutu 334-A. ally exclusive, because the two test conditions may not The accuracy and stability of the timing data on Circuit function simultaneously. DD (R~cei,:er Signal Element Timing) are needed only Equalizers whe~ CIrcUlt CF (Received Line Signal Detector) is ON. DUrIng the OFF condition of Circuit CF, drift is accept Equalization is a process whereby a circuit's frequency and able; however, once the OFF to ON transition of Circuit phase distortions are reduced to compensate for differ CF occurs, resynchronization of the timing data on Circuit ences in time delay and attenuation ofthe varying frequen DD must occur as quickly as possible. cies in the transmission band. An equalizer associated with Transfer of timing information across the interface is the DCE may require training, a process that produces a necessary whenever the timing source is capable of gener fixed number of equally spaced reference signals. ating data, and it should not be restricted only to periods of RS-449 outlines the procedures for equalizer training. actual data transmission. When timing data is not pro The following example outlines a typical training se vided on a timing interchange circuit, the interchange cir quence. DCE "E" (East) has an equalizer that requires (' cuit is clamped in the OFF condition. Tolerances on the training. DCE "W" (West) is transmitting toward DCE relationship between data and associated timing signals "E". Initial training of DCE "Es" equalizer occurs during follow the EIA-334-A recommendation. the interval between the ON condition of Circuit RS and
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Table 5. Standard Interfaces for Selected Communication System Configuration
Interchange Circuit Configuration Type SR Configuration Type SO Configuration Type RO Configuration Type DT AB Signal Ground M M M M BA Transmitted Data M M M M BB Received Data M M M DA Transmit Signal Ele- a a a ment Timing (DTE Source) DB Transmit Signal Ele- T T T ment Timing (DCE Source) DO Receiver Signal Ele- T T T ment Timing (DCE Source) CA Request to Send M M CB Clear to Send M M CF Received Line Signal M M Detector CC DCE Ready M M M CD DTE Ready S S S LL Local Loopback 0 RL Remote Loopback a TM Test Mode M M M M-Mandatory interchange circuits for a given configuration. T-Additional interchange circuits required for synchronous operation. S-Additional interchange circuit required for switched service. O-Optional interchange circuits. the ON condition of Circuit CS ofDCE "W". Initial train direction, Circuit CS ofDCS "w" is in the OFF condition ing in the DCE "Es" receiver occurs prior to the ON con while the unique training signal is sent. Circuit RD ofDCE dition of Circuit RR of DCE "E". Circuit SQ is placed in "E" may be clamped to the marking condition when the the ON condition no later than the OFF-to-ON transition unique training signal is received. When the equalizer at of Circuit RR if the initial training is successful. Circuit tains proper adjustment, DCE "E" places Circuit SQ in the SQ's state is undefined when Circuit RR is OFF. ON condition. If the equalizer requires a unique training signal from DCE "w" to achieve equalization, the states of specific Standard Interfaces for Selected Configurations interchange circuits are controlled during this process. Standard sets of interchange circuits for data transmission When the normal flow of data toward DCE "w" is inter configurations are defined as follows: Type SR (Send rupted in order to cause DCE "w" to transmit this unique Receive), Type SO (Send-Only), Type RO (Receive-Only), sequence, Circuit CS of DCE "E" is held in the OFF con and Type DT (Data and Timing only). Table 5 lists the dition while the command signal is being sent. In this situ interchange circuits that must be provided for each data ation, Circuit SQ of DCE "w" should be placed in the transmission configuration. For a given type of interface, OFF condition while receiving the command signal. Cir generators and receivers must be provided for every inter cuit RD ofDCE "w" may be clamped to the marking con change circuit designated M (Mandatory) in Table 5. In dition while the command signal is received. In the reverse addition, generators and receivers are necessary for all in terchange circuits designated Sand T, where the service is switched and synchronous, respectively .•
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EIA RS-530
In this report: Synopsis
Mechanical Editor's Note EIA RS-530 governs the mechanical Characteristics ...... 2 EIA RS-530, approved in March and electrical characteristics of the 1987, defines the mechanical inter interface between Data Terminal Functional Description face characteristics between Data Equipment (DTE) and Data Circuit of Interchange 3 Termination Equipment (DTE) and Terminating Equipment (DCE). The Data Circuit-Terminating Equip standard defines DTE as the hard Electrical ment (DCE). It operates in conjunc ware on the business machine side of Characteristics ...... 7 tion with RS-422-A and RS-423-A, the interface (teleprinters, display which define the electrical operation terminals, front-end processors, cen EIA RS-530 of the individual interchange circuits tral processing units, etc.), and DCE Interchange for balanced and unbalanced opera as the modem, signal converter, or Circuit Details ...... 11 tion, respectively. EIA RS-530 com other device between the DTE and plements EIA RS-232-D for data the communications line. rates above 20K bps and will gradu ally replace RS-449 for data rates This report compares EIA RS-530 above 20K bps. with RS-232-D and RS-449. It also discusses the mechanical and electri Report Highlights cal characteristics and looks at the In 1977, the Electronic Industries general classification of interchange Association (EIA) developed the RS- circuits and outlines interchange cir 449, RS-422, and RS-423 standards cuit details. to eventually replace RS-232-C. RS- 449, however, never really caught on Copies ofEIA RS-530, 422-A, and and, in March 1987, EIA RS-530 was 423-A can be obtained from the Elec introduced as its intended replace tronic Industries Association, 2001 I ment. RS-422 and RS-423 remain in Street, NW, Washington, DC 20006. the revised forms of RS-422-A and RS-423-A. RS-232-C also outlasted RS-449 and, in January 1987, the EIA issued RS-232-D, a revision for RS-232-C. (
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An RS-530/RS·232·D Comparison
These new standards include a specification of the , / D-shaped 25-pin interface connector, which RS- Analysis 232-C had only referenced in an appendix and never included as part of the standard. Both stan dards support testing of both local and remote DCEs through the Local Loopback, Remote Loop back, and Test Mode circuits. Circuit names for EIA RS-530 operates in conjunction with either of the first 8 pins in both standards are the same, but two standards specifying electrical characteristics: differ on pins 9, 10, and 11, which are not used in RS-422-A, for balanced circuits; and RS-423-A, for RS-232-D. unbalanced circuits. When each interface circuit EIA RS-530 achieves higher data rates than has its own ground lead, the circuit is balanced. RS-232-D (greater than 20K bps) by specifying the When an interface uses a common or shared use of balanced signals, while sacrificing some sec grounding technique, it is unbalanced. ondary signals and the Ring Indicator. The Ring RS-530 is used for data communications sys Indicator's elimination indicates that EIA RS-530 tems with the following characteristics: is not for use in dial-up applications. • DTE serializes data bits, and the DCE puts no restrictions on the DTE's bit sequence arrange An EIA RS-530/RS·449 Comparison ments. The RS-530 standard will one day replace RS-449 but, while both standards are in use, RS-530 can be • Communication is binary, serial, synchronous, interconnected with devices using RS-449 through or asynchronous, and control information is a connecting cable or device. Table 1 lists the Cir exchanged on separate circuits. cuit Name and Mnemonic, and connector contact • Equipment on one side of the DTE/DCE inter pin for each interface. face connects directly to equipment on the other side without additional technical consider ations. Mechanical Characteristics • Communication is in half- and/or full-duplex The point of demarcation between the DTE and modes in point-to-point or multipoint configu the DCE is at connector plugs on the DCE or at an rations over two- or four-wire facilities with interface point no further than 10 feet (three data rates ranging from 20K bps to a nominal meters) from the DCE. A 25-position connector is upper limit of 2M bps. Point-to-point arrange specified for all interchange circuits. In all cases, ments may operate on either switched or dedi the DTE provides the cable (up to 200 feet), which cated facilities. Dedicated lines connect has male (pin) contacts and a female shell (plug multipoint arrangements. connector); the DCE has a female connector. The connectors are equipped with a block that permits Applications in which cable termination, signal latching and unlatching without a tool. The latch wave shaping, interconnection cable distance, and ing block also permits the use of screws to fasten the interface's mechanical configurations must be the connectors together. The mechanical configura tailored to meet specific user needs are not pre tion for connections of the interface cable at points cluded, but are generally not within the standard's other than the demarcation point is not specified. scope. The EIA RS-530 connector, also used for When additional functions are offered in a EIA R-232-D, uses electrical characteristics that, if separate unit that is inserted between the DTE and improperly connected to some silicon devices de DCE, the female connector is associated with the signed to meet the RS-422-A and RS-423-A electri DTE interface, while the male connector is a DCE cal characteristics specified in this interface. recommendation, could damage those devices.
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( Table 1. Interconnecting EIA RS-S30 with EIA RS-449
EIA-530 EIA-RS-449 Circuit, Name, and Mnemonic Contact Contact Circuit, Name, and Mnemonic Shield Shield Transmitted Data BA (A) 2 4 SO (A) Send Data BA(B) 14 22 SO (B) Received Data BB (A) 3 6 RD (A) Receive Data BB (B) 16 24 RD (B) Request to Send CA (A) 4 7 RS (A) Request to Send CA (B) 19 25 RS (B) Clear to Send CB (A) 5 9 CS (A) Clear to Send CB (B) 13 27 CS (B) DCE Ready CC (A) 6 11 OM (A) Data Mode CC (B) 22 29 OM ~B) DTE Ready CD (A) 20 12 TR (A) Terminal Ready CD (B) 23 30 TR (B) Signal Ground AB 7 19 SG Signal Ground Received Line CF (A) 8 13 RR (A) Receiver Ready S~nal Detector CF (B) 10 31 RR (B) Transmit Signal DB (A) 15 5 ST (A) Send Timing Element Timing DB (B) 12 23 ST (B) (DCE Source) Receiver Signal DO (A) 17 8 RT (A) Receive Timing Element Timing DO (B) 9 26 RT (B) (DCE Source) Local Loopback LL 18 10 LL Local Loopback Remote Loopback RL 21 14 RL Remote Loopback Transmit Signal DA (A) 24 17 TT (A) Terminal Timing Element Timing DA (B) 11 35 TT (B) (DTE Source) Test Mode TM 25 18 TM Test Mode
Functional Description of Interchange Ground or Common Return Circuits Circuits Circuit AD (Signal Ground) connects the DTE cir Interchange circuits fall into four general classifica cuit ground (circuit common) to the DCE circuit tions: ground (or common return), data circuits, ground (circuit common) to provide a conductive control circuits, and timing circuits. Table 2 out route between the DTE and DCE signal commons. lines a list ofEIA RS-530 interchange circuits See Figure 3 for grounding arrangements. showing mnemonic name, circuit identification, circuit direction, and circuit type. Table 3 com Data Circuits pares the connector pin assignments and the func Circuit DA (Transmitted Data) transfers the data tional interchange circuits along with an signals originated by the DTE to the DCE. The equivalency table showing the nearest equivalent DTE holds Circuit BA in the binary ONE (mark EIA RS-232-D and CCITT V.24 functions in rela ing) condition unless an ON condition is present tion to each EIA RS-530 function. A functional on all of the following circuits: CA (Request to description of each of the EIA RS-530 interchange Send), CB (Clear to Send), CC (DCE Ready), and circuits follows. CD (DTE Ready). The DCE disregards any signal appearing on Circuit BA when an OFF condition exists on one or more of these circuits. While an
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.Timing Circuits Table 2. EIA RS·530 Interchange Circuit DA (Transmit Signal Element Timing Cireuits DTE Source) provides the DCE with transmit sig nal element timing data. The ON to OFF Circuit Circuit Name Circuit Circuit Type transition nominally indicates the center of each Mnemonic Detection signal element on Circuit BA. When Circuit DA is AB Signal Ground implemented in the DTE, the DTE provides tim BA Transmitted ToDCE Data ing data on it whenever the DTE is in a POWER Data ON condition. The DTE can withhold timing data BB Received Data From DCE Data on this circuit for short periods as long as Circuit DA Transmit Sig- ToDCE Timing CA is in the OFF condition. nal Element Timing (DTE Circuit DB (Transmit Signal Element Source) Timing-DCE Source) provides the DTE with DB Transmit Slg- From DCE Timing nal Element transmit element timing data. The DTE provides a Timing (DCE data signal on Circuit BA in which the transitions Source) between signal elements occur at the time of the DO Receiver Slg- From DCE Timing nal Element transitions from OFF to ON condition of the signal Timing (DCE on Circuit DB. The DCE provides timing data on Source) Circuit DB whenever the DCE is in a POWER ON CA Request to ToDCE Control Send condition. The DCE can withhold timing data on CB Clear To Send From DCE Control this circuit if Circuit CC is in the OFF condition. CF Received Line From DCE Control Circuit DD (Receiver Signal Element Signal Timing-DCE Source) provides the DTE with re Detector CC DCE Ready From DCE Control ceive signal element timing data. The DCE pro CD DTE Ready ToDCE Control vides timing data on this circuit whenever the DCE LL Local ToDCE Control is in a POWER ON condition. The DCE can with Loopback hold timing data on this circuit for short periods as RL Remote ToDCE Control long as Circuit CC is in the OFF condition. Loopback TM Test Mode From DCE Control Control Circuits Circuit CA (Request to Send) controls the transmit ON condition is maintained on each ofthe cir function of the local DCE and, on half-duplex cuits, the DCE sends all data signals transmitted channels, the direction of data transmission. On across the interface on Circuit BA to the communi one-way-only (duplex) channels, the ON condition cations channel. The term "data signals" includes holds the DCE in the transmit mode; the OFF con the binary ONE (marking) condition, reversals, dition suppresses transmission. On a half-duplex and other sequences, such as SYN coded characters channel, the ON condition holds the DCE in the that maintain timing synchronization. transmit mode and suppresses the receive mode. Circuit BB (Received Data) transfers DCE The OFF condition holds the DCE in the receive generated data signals to the DTE in response to mode. A transition from OFF to ON instructs the line signals from a remote station. Circuit BB is DeE to enter the transmit mode. The DCE re held in the binary ONE (marking) condition while sponds by taking any necessary action and indicat Circuit CF (Receive Line Signal Detector) is in the ing completion of such action by turning ON OFF condition. On half-duplex channels, Circuit Circuit CB (Clear to Send), thereby permitting the BB is held in the marking condition when Circuit DTE to transfer data across Circuit BA. A transi CA is ON and for a brief interval when Circuit CA tion from ON to OFF instructs the DCE to com makes the transition from ON to OFF. This allows plete transmission of all data previously for the completion of the transmission and for the transferred across the interface on Circuit BA decay of channel reflections.
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Figure 1. Loopback Tests '\..
Facility Test Center \ \ \ \ \ \ \ \ \ \ \, , \, , \ \ ... \ ... \ ... Local ~ Local Remote ... Remote ~ ,'"..... RL) ..... DTE DTE ~ DeE L~ ..... DeE ..... TeN
Localloopback and remote loopback tests as seen from the local DTE.
(Transmitted Data) and then to assume a nontrans Circuit CF (Received Line Signal Detector) mit, or receive mode, as appropriate. The DCE indicates whether the receiver in the DCE is ready responds to this instruction by turning OFF Circuit to receive data signals from the communication CB. channel, but does not indicate the relative quality When Circuit CA is turned OFF, it is not of the data signals received. An equalizer's condi turned ON again until Circuit CB has been turned tion in a DCE does not affect Circuit CF. The ON OFF by the DCE. An ON condition is required on condition indicates that the DCE is receiving a sig Circuit CA, as well as on Circuits CB and CC, nal that meets its criteria, which the DCE manu whenever data is transferred across the interface on facturer establishes. The OFF condition indicates Circuit BA by the DTE. Circuit CA may be turned that no signal is being received. Circuit CF's OFF ON at any time when Circuit CB is OFF, regard condition causes Circuit BB (Received Data) to be less of the status of any other interface circuit. clamped to the binary ONE (marking) condition. Circuit CD (Clear to Send) indicates that the On half-duplex channels, Circuit CF is held DCE has been conditioned to transmit data over in the OFF condition whenever Circuit CA (Re the communications channel. The ON condition, quest to Send) is in the ON condition and for a together with the ON on Circuit CA (Request to brief interval of time following Circuit CA's transi Send) and Circuit CC (DCE Ready), indicates to tion from ON to OFF. the DTE that signals on Circuit BA (Transmitted Circuit CC (DCE Ready) indicates the status Data) will be transmitted to the communication of the local DCE; the ON condition does not indi channel. The OFF condition indicates that the cate that a communication channel has been estab DTE should not transfer data across the interface lished to a remote data station nor does it indicate on Circuit BA, since this data will not be transmit the status of any remote station equipment. The ted to the line. The ON condition of Circuit CB is OFF condition indicates that the DTE should ig a response to the occurrence of concurrent ON nore signals appearing on all other interchange cir conditions on Circuits CC and CA, delayed as ap cuits with the exception of Circuit TM (Test ( propriate by the DCE, to allow the establishment Mode). Circuit CC remains in the OFF condition of a data communications channel to a remote for DCE tests not completed through the DTEI DTE. DCE interface. The circuit responds normally (i.e.,
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Table 3. RS-530 and Nearest Equivalent RS-232-C and CCITT V.24 " EIA R8-530 Circuit EIA RS-530 25 Pin CCITT V.24 Circuit EIA RS-232-D EIA RS-232-D Description Circuit Description Shield 1 Shield BA Transmitted Data 2 103 BA Transmitted Data BB Received Data 3 104 BB Received Data CA Request to Send 4 105 CA Request to Send CB Clear to Send 5 106 CB Clear to Send CC DCE Ready 6 107 CC DCE Ready AB Signal Ground 7 102 AB Signal Ground CF Received Une Sig- 8 109 CF Received Line Sig- nal Detector nal Detector DO Receiver Signal Ela- 9 Reserved for ment timing (DCE) Testing CF Resceived Une Sig- 10 Reserved for nal Detector Testing DA Transmit Signal Ele- 11 Unassigned ment Timing (DTE) DB Transmit Signal Ele- 12 122/112 SCF/CI Secondary Received ment Timing (DC E) Line Signal Detec- torIData Signal Rate Selector (DCE) CB Clear to Send 13 121 SCB Secondary Clear to Send BA Transmitted Data 14 118 SBA Secondary Trans- mitted Data DB Transmitter Signal 15 114 DB Transmitter Signal Element Timing Element Timing (DCE) (DCE) BB Received Data 16 119 SBB Secondary Received Data DO Receiver Signal Ela- 17 115 DO Receiver Signal Ele- ment Timing (DCE) ment Timing (DCE) LL Local Loopback
not clamped OFF} for DCE tests conducted a duplex mode, using all the circuits in the inter through the DTE/DCE interface. face. OFF causes the DCE to release the LL test Circuit CD (DTE Ready) controls DCE condition. The LL test does not disable Circuit IC. switching to and from the communications chan Circuit RL (Remote Loopback) controls the nel. The ON condition prepares the DCE for con remote loopback test function (see Figure 1). This nection to a communications channel and circuit's ON condition causes the local DCE to ini maintains the connection. The OFF condition re tiate the RL test on the remote DCE. After turning moves the DCE from the communication channel RL ON and detecting an ON condition on the TM following the completion of any "in process" trans (Test Mode) circuit, the local DTE can operate in a mission. duplex mode using local and remote DCE cir Circuit LL (Local Loopback) controls the local cuitry. An OFF condition releases the RL condi loopback test condition in the local DCE. (See Fig tion. While a unit is in RL test condition, ure 1 for details.) The ON condition instructs the communications is out-of-service to the remote DCE to transfer its output to its receive signal con DTE. When RL is activated, the DCE presents an verter to check local operation. After establishing OFF condition on Circuit DM and an ON condi the LL test condition, the local DTE turns ON Cir tion on Circuit TM to the DTE. The local DCE cuit TM. Once TM is ON, the DTE may operate in
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Figure 2. Generator and Receiver Connections at Inter/tu:e
(a) Category I Circuits
A ...... ~-----o------0----... -----1
~:;.....-----_c)__ --- -Q------4... -----t 8
(b) Category II Circuits
A A1 ">--_0------()------..;..;...--t
Note: The A, A1 , 8, 81 , C, and C1 designations are those specified in EIA-422-A and EIA-423-A.
Category I circuits use the balanced electrical characteristics o!EIA·422·A, while Category II circuits use the unbalanced electrical characteristics o!EIA·422·A. presents an ON condition on Circuit TM and al configuration of the connector and the pin assign lows Circuit DM to respond normally. ments and functions of the entire interface, includ Circuit TM (fest Mode) indicates that local ing the timing and interrelationships of the various DCE is in test condition. ON indicates a test con circuits. dition, and OFF indicates normal operation. When For the purpose of assigning electrical charac testing (either LL or RL) is conducted through the teristics to the interchange circuits (defined func local DTE/DCE interface, Circuit CC responds tionally earlier in this report), EIA RS-530 has normally; when testing is not conducted through defined two separate categories of circuits. Cate this interface, Circuit CC is held in an OFF condi gory I Circuits are as follows: tion. • Circuit BA (Transmitted Data) • Circuit BB (Received Data) Electrical Characteristics • Circuit DA (Transmit Signal Element Timing, RS-422-A (balanced operation) and RS-423-A (un DTESource) balanced operation) specify the individual inter • Circuit DB (Transmit Signal Element Timing, change circuits' electrical characteristics. EIA RS- DCE Source) 530, like RS-449, specifies the mechanical • Circuit DD (Receiver Signal Element timing, DCESource)
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Figure 3. / " Grounding A"angements DTE DeE r---- r
Balanced Interchange B Circuit
Balanced A Interchange Circuit
A Unbalanced Interchange Circuit
Unbalanced A Interchange Circuit
Circuit SG 100 n, 1I2w (Signal Ground Shield) 100 n, 1I2w
~~----.------;------~-*
Circuit Frame Ground Ground L GWG GWG "'Normally no connection to shield in DeE. Notes: GWG is green wire ground of power system.
Grounding provides a conductive route between the DTE and DeE signal commons.
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Table 4. Connector Contact Assignments
Contact Number Circuit Intarchange Points Circuit Category Direction to DCE Direction From DCE 1 Shield 2 BA A-At X 3 BB A-At X 4 CA A-At X 5 CB A-At X 6 CC A-At X 7 AB C-Ct X 8 CF A-At X 9 DO B-Bt X 10 CF B-Bt X 11 DA B-Bt X 12 DB B-Bt X 13 CB B-Bt X 14 BA B-Bt X 15 DB A-At X 16 BB B-Bt X 17 DO A-At X 18 LL A-At X 19 CA B-Bt X 20 CD A-At X 21 RL A-At X 22 CC B-Bt X 23 CD B-Bt X 24 DA A-At X 25 TM A-At X Note: Interchange Points A-AI, B-Bt for each Category I circuit should be assigned twisted pairs in interconnecting cables to min imize cross-talk. • Circuit CA (Request to Send) • Circuit RL (Remote Loopback) • Circuit CB (Clear to Send) • Circuit TM (Test Mode) • Circuit CF (Received Line Signal Detector) Category II Circuits use the unbalanced electrical • Circuit CC (DCE Ready) characteristics ofEIA-423-A. Each circuit contains • Circuit CD (DTE Ready) one wire interconnecting an unbalanced generator and a differential receiver. The EIA-423-A genera The individual Category I circuits use the balanced tors use wave shaping that allows operation over electrical characteristics of EIA-422-A. Each circuit an interface cable length of up to 200 feet (60 has two leads through the interface connector; each meters). The common return for Category II inter interchange circuit contains a pair of wires inter change circuits is Circuit AB (Signal Ground). connecting a balanced generator and a differential Certain control interchange circuits require receiver. that an ON or OFF voltage be applied to them at all times for proper operation. If the circuit is not Category II Circuits are as follows: associated with an operation generator, a dummy • Circuit LL (Local Loopback) generator must be provided. The circuits involved are:
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Table 5. Standard Interfaces for Selected Communication System Configuration
Interchange Circuit Configuration Type SR Configuration Type SO Configuration Type RO· Configuration Type DT AB Signal Ground M M M M BA Transmitted Data M M M M BB Received Data M M M DA Transmit Signal Ele- 0 0 0 ment Timing (DTE Source) DB Transmit Signal Ele- T T T ment Timing (DCE Source) DO Receiver Signal Ele- T T T rnent Timing (DCE Source) CA Request to Send M M CB Clear to Send M M CF Received Une Signal M M Detector CC DCE Ready M M M CD DTE Ready S S S LL Local Loopback 0 RL Remote Loopback 0 TM Test Mode M M M M-Mandatory Interchange circuits for a given configuration. T-Additional interchange circuits required for synchronous operation. S-Addltionsllnterchange circuit required for switched service. O-Options/lnterchange circuits.
DTE Control Interchange Cir DCE Control Interchange Cir other for the negative dummy generator. An RS- cuits cuits 422-A or RS-423-A POWER OFF requirement is CA (Request to Send) CB (Clear to Send) required when any of the following circuits uses a LL (Local Loopback) CF (Received Une Signal De dummy generator: tector) RL (Remote Loopback) TM (Test Mode) • Circuit CC (DCE Ready), CD (DTE Ready) CC (DCE Ready) • Circuit DC (DTE Ready), and • Circuit CA (Request to Send) A dummy generator must meet the appropriate open-circuit, test termination, and short-circuit The RS-422-A standard describes the relationship generator requirements of EIA-422-A or EIA-423- between signaling rate and interface cable distance A. It is implemented using a 2-watt, 47-ohm resis for balanced interchange circuits. The guidelines tor connected to a DC source of between 4 and 6 specify that operation over 200 feet of cable limits volts. A single dummy generator can signal over the maximum signaling rate of balanced inter more than one interchange circuit. Therefore, only change circuits to 2 million bps. Operation over two dummy generators are required for both ON cable distances greater than 200 feet is possible, and OFF (positive and negative) circuit conditions. but viewed as a tailored application. The DTE's interface cable must provide separate In DTEs and DCEs, protective ground is a conductors for each circuit requiring a dummy point that is electrically bonded to the equipment generator. Two conductors may be used, however, frame. It can also be connected to external grounds one for the positive dummy generator and the
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through the third wire of the power cord. It should synchronous systems. EIA-363, "Standard for be noted that protective ground (frame ground) is Specifying Signal Quality for Transmitting and Re not an interchange circuit in EIA RS-530. If the ceiving Data Processing Terminal Equipment Us DCE and DTE equipment frames must be bonded, ing Serial Data Transmission at the Interface with a separate conductor that conforms to the appro Non-Synchronous Communication Equipment," priate national or local electrical codes should be states standard naming procedures for specifying used. signal quality for nonsynchronous systems. Distor Interface connector pin number 1 facilitates tion tolerances for nonsynchronous systems are the use of shield interconnecting cable, permitting stated in EIA-404-A, "Standard for Start-Stop Sig the DTE cable to carry tandem connectorized sec nal Quality Between Data Terminal Equipment tions with shield continuity. The DCE does not and Non-Synchronous Data Communication connect to pin 1, except in some applications re Equipment." Interchange circuits sending timing quiring electromagnetic interference (EMI) sup signals across the interface point keep ON and pression. While additional provisions may be OFF conditions for nominally equal amounts of necessary, they are beyond the scope of this stan time, in keeping with the acceptable tolerances dard. specified in EIA-334-A. Proper operation of the interchange circuits The accuracy and stability of the timing data requires a path between the DTE circuit ground on Circuit DD (Receiver Signal Element Timing) is (circuit common) and the DCE circuit ground, needed only when Circuit CF (Received Line Sig which is provided by Circuit AB (Signal Ground). nal Detector) is ON. During the OFF condition of Normally, both the DTE and DCE should have Circuit CF, drift is acceptable; however, once the their circuit grounds connected to protective OFF to ON transition of Circuit CF occurs, resyn grounds (frame grounds), which, in turn, may be chronization of the timing data on Circuit DD connected to an external ground, usually associated must occur as quickly as possible. with the power line plug. The grounding arrange Transfer of timing information across the in ment is shown in Figure 3. terface is necessary whenever the timing source is For failsafe operation, the receivers can de capable of generating data, and it should not be tect a POWER OFF condition in the equipment restricted only to periods of actual data transmis across the interface or a disconnected cable. Detec sion. When timing data is not provided on a timing tion of either ofthese conditions is interpreted as interchange circuit, the interchange circuit is an OFF on any of the following interchange cir clamped in the OFF condition. Tolerances on the cuits: relationship between data and associated timing • Circuit CC (DCE Ready) signals follow the EIA-334-A recommendation. • Circuit CA (Request to Send) • Circuit CD (DTE Ready) EIA RS·530 Interchange Circuit Details Listed below are details of RS-530's additional The receiver for each control circuit, except those functions. control circuits specified above, interprets the situ ation in which the conductor is not implemented Use of Circuits for Testing in the interconnecting cable as an OFF condition. Three interchange circuits permit fault isolation testing done under DTE control: Circuit LL (Local General Signal Characteristics Loopback), Circuit RL (Remote Loopback), and Interchange circuits transferring data signals across Circuit TM (Test Mode) (see Figure 1). the interface point hold the mark (binary ONE) The EIA considers the (Circuit TM) and test and space (binary ZERO) conditions for the total control (Circuit LL and Circuit RL) status circuits nominal duration of each signal element. EIA-334- a desirable step toward uniform methods of fault A, "Signal Quality at Interface Between Data Pro isolation. These circuits assist DTE and DCE users ( cessing Terminal Equipment and Synchronous in tracking down a defective unit. Data Communication Equipment for Serial Data Transmission" defines distortion tolerances for
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Local Loopback (LL Test): This test condition is RS-449 outlines the procedures for equalizer equivalent to CCITT test loop # 3. It provides a training. The following example outlines a typical way in which a DTE can check the functioning of a training sequence. DCE "E" (East) has an equal DTE-to-DCE interface and the transmit and re izer that requires training. DCE "W" (West) is ceive sections of the local DCE. One may also test transmitting toward DCE "E". Initial training of the local DCE with a test set instead of through the DCE "Es" equalizer occurs during the interval be DTE. The output of the transmitting portion of the tween the ON condition of Circuit RS and the ON DCE is returned to the receiving station in the LL condition of Circuit CS of DCE "W". Initial train test through circuitry that is required for proper ing in the DCE "Es" receiver occurs prior to the operation. In many DCEs, the signal transmitted is ON condition of Circuit RR of DCE "E". Circuit unsuitable for direct connection to the receiver. In SQ is placed in the ON condition no later than the such cases, an appropriate signal shaping or con OFF-to-ON transition of Circuit RR if the initial version in the loop-around circuitry may be in training is successful. Circuit SQ's state is unde cluded so that any element used in normal fined when Circuit RR is OFF. operations are checked in the test condition. If the equalizer requires a unique training sig nal from DCE "W" to achieve equalization, the Remote Loopback (RL Test): This test, equivalent states of specific interchange circuits are controlled to CCITT test loop # 2, allows a DTE or a facility during this process. When the normal flow of data test center to check the transmission path through toward DCE "W" is interrupted in order to cause the remote DCE to the DTE interface and the cor DCE "W" to transmit this unique sequence, Cir responding return path. In this test, Circuit SD and cuit CS of DCE "E" is held in the OFF condition Circuit RD are either isolated or disconnected while the command signal is being sent. In this sit from the remote DTE at the interface and then uation, Circuit SQ of DCE "W" should be placed connected to each other at the remote DCE. In syn in the OFF condition while receiving the command chronous DCEs, a suitable transmit clock may be signal. Circuit RD of DCE "W" may be clamped to necessary when the RL test condition is initiated. the marking condition while the command signal is In some instances, buffer storage may be required received. In the reverse direction, Circuit CS of between Circuit RD and Circuit SD. DCS "W" is in the OFF condition while the Remote control of the RL test permits the unique training signal is sent. Circuit RD of DCE automation of end-to-end testing of any circuit "E" may be clamped to the marking condition from a central location. Primarily, test control is when the unique training signal is received. When suitable in point-to-point applications, but may the equalizer attains proper adjustment, DCE "E" also be used in multipoint arrangements with the places Circuit SQ in the ON condition. addition of an address detection feature in the DCE. Test RL enables circuit verification without Standard Interfaces for Selected the aid of a distant DCE, supported by an inherent Configurations remote loopback ability in many modem DCEs. Standard sets of interchange circuits for data trans The ON states of Circuit RL and Circuit LL mission configurations are defined as follows: Type are mutually exclusive, because the two test condi SR (Send-Receive), Type SO (Send-Only), Type tions may not function simultaneously. RO (Receive-Only), and Type DT (Data and Tim ing only). Table 5 lists the interchange circuits that Equalizers must be provided for each data transmission con Equalization is a process whereby a circuit's fre figuration. For a given type of interface, generators quency and phase distortions are reduced to com and receivers must be provided for every inter pensate for differences in time delay and change circuit designated M (Mandatory) in Table attenuation of the varying frequencies in the trans 5. In addition, generators and receivers are neces mission band. An equalizer associated with the sary for all interchange circuits designated Sand T, DCE may require training, a process that produces where the service is switched and synchronous, a fixed number of equally spaced reference signals. respectively.•
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