United States Patent [19J [11] Patent Number: 6,112,019 Chamdani Et Al
Illlll llllllll Ill lllll lllll lllll lllll lllll 111111111111111111111111111111111 US006112019A United States Patent [19J [11] Patent Number: 6,112,019 Chamdani et al. [45] Date of Patent: Aug. 29, 2000 [54] DISTRIBUTED INSTRUCTION QUEUE "An Efficient Algorithm for Exploring Multiple Arithmetic Units," Tomasulo IBM Journal, Jan. 1967, pp. 25-33. [75] Inventors: Joseph I. Chamdani, Marietta; Cecil 0. Alford, Lawrenceville, both of Ga. "Implementation of Precise Interrupts In Pipelined Proces sors," James E. Smith Andrew R. Pleszkun,© 1985 IEEE, [73] Assignee: Georgia Tech Research Corp., Atlanta, pp. 36-44. Ga. "Instruction Issue Logic in Pipelined Supercomputers", [21] Appl. No.: 08/489,509 Shlomo Weiss & James E. Smith,© 1984 IEEE, Transac [22] Filed: Jun. 12, 1995 tions on Computers, vol. c-33, No. 11, pp. 1012-1022 Nov. 1984. [51] Int. CI.7 ........................................................ G06F 9/22 [52] U.S. Cl. .............................................................. 395/390 "The Metafiow Architecture", Popescu et al, IEEE Micro,© [58] Field of Search ..................................... 395/376, 378, 1991 IEEE, pp. 10-13, 63-73. 395/381, 382, 391, 393, 390 [56] References Cited Primary Examiner-David Y. Eng Attorney, Agent, or Firm-Thomas, Kayden, Horstemeyer U.S. PATENT DOCUMENTS & Risley, L.L.P. 3,924,245 12/1975 Eaton et al. ....................... 395/421.09 4,725,947 2/1988 Shonai et al. ........................... 395/585 [57] ABSTRACT 4,736,288 4/1988 Shintani et al. .. ... ... ... .... ... ... ... 395 /395 4,752,873 6/1988 Shonai et al. ...................... 395/800.23 A distributed instruction queue (DIQ) in a superscalar 4,780,810 10/1988 Torii et al. .... ... ... ... ... .... ... ... ... 395 /800 microprocessor supports multi-instruction issue, decoupled 4,896,258 1/1990 Yamaguchi et al.
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