A Comprehensive Study of Real-World Numerical Bug Characteristics
Total Page:16
File Type:pdf, Size:1020Kb

Load more
Recommended publications
-
5. Data Types
IEEE FOR THE FUNCTIONAL VERIFICATION LANGUAGE e Std 1647-2011 5. Data types The e language has a number of predefined data types, including the integer and Boolean scalar types common to most programming languages. In addition, new scalar data types (enumerated types) that are appropriate for programming, modeling hardware, and interfacing with hardware simulators can be created. The e language also provides a powerful mechanism for defining OO hierarchical data structures (structs) and ordered collections of elements of the same type (lists). The following subclauses provide a basic explanation of e data types. 5.1 e data types Most e expressions have an explicit data type, as follows: — Scalar types — Scalar subtypes — Enumerated scalar types — Casting of enumerated types in comparisons — Struct types — Struct subtypes — Referencing fields in when constructs — List types — The set type — The string type — The real type — The external_pointer type — The “untyped” pseudo type Certain expressions, such as HDL objects, have no explicit data type. See 5.2 for information on how these expressions are handled. 5.1.1 Scalar types Scalar types in e are one of the following: numeric, Boolean, or enumerated. Table 17 shows the predefined numeric and Boolean types. Both signed and unsigned integers can be of any size and, thus, of any range. See 5.1.2 for information on how to specify the size and range of a scalar field or variable explicitly. See also Clause 4. 5.1.2 Scalar subtypes A scalar subtype can be named and created by using a scalar modifier to specify the range or bit width of a scalar type. -
Occam 2.1 Reference Manual
occam 2.1 reference manual SGS-THOMSON Microelectronics Limited May 12, 1995 iv occam 2.1 REFERENCE MANUAL SGS-THOMSON Microelectronics Limited First published 1988 by Prentice Hall International (UK) Ltd as the occam 2 Reference Manual. SGS-THOMSON Microelectronics Limited 1995. SGS-THOMSON Microelectronics reserves the right to make changes in specifications at any time and without notice. The information furnished by SGS-THOMSON Microelectronics in this publication is believed to be accurate, but no responsibility is assumed for its use, nor for any infringement of patents or other rights of third parties resulting from its use. No licence is granted under any patents, trademarks or other rights of SGS-THOMSON Microelectronics. The INMOS logo, INMOS, IMS and occam are registered trademarks of SGS-THOMSON Microelectronics Limited. Document number: 72 occ 45 03 All rights reserved. No part of this publication may be reproduced, stored in a retrival system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording or otherwise, without prior permission, in writing, from SGS-THOMSON Microelectronics Limited. Contents Contents v Contents overview ix Preface xi Introduction 1 Syntax and program format 3 1 Primitive processes 5 1.1 Assignment 5 1.2 Communication 6 1.3 SKIP and STOP 7 2 Constructed processes 9 2.1 Sequence 9 2.2 Conditional 11 2.3 Selection 13 2.4 WHILE loop 14 2.5 Parallel 15 2.6 Alternation 19 2.7 Processes 24 3 Data types 25 3.1 Primitive data types 25 3.2 Named data types 26 3.3 Literals -
Floating-Point Exception Handing
ISO/IEC JTC1/SC22/WG5 N1372 Working draft of ISO/IEC TR 15580, second edition Information technology ± Programming languages ± Fortran ± Floating-point exception handing This page to be supplied by ISO. No changes from first edition, except for for mechanical things such as dates. i ISO/IEC TR 15580 : 1998(E) Draft second edition, 13th August 1999 ISO/IEC Foreword To be supplied by ISO. No changes from first edition, except for for mechanical things such as dates. ii ISO/IEC Draft second edition, 13th August 1999 ISO/IEC TR 15580: 1998(E) Introduction Exception handling is required for the development of robust and efficient numerical software. In particular, it is necessary in order to be able to write portable scientific libraries. In numerical Fortran programming, current practice is to employ whatever exception handling mechanisms are provided by the system/vendor. This clearly inhibits the production of fully portable numerical libraries and programs. It is particularly frustrating now that IEEE arithmetic (specified by IEEE 754-1985 Standard for binary floating-point arithmetic, also published as IEC 559:1989, Binary floating-point arithmetic for microprocessor systems) is so widely used, since built into it are the five conditions: overflow, invalid, divide-by-zero, underflow, and inexact. Our aim is to provide support for these conditions. We have taken the opportunity to provide support for other aspects of the IEEE standard through a set of elemental functions that are applicable only to IEEE data types. This proposal involves three standard modules: IEEE_EXCEPTIONS contains a derived type, some named constants of this type, and some simple procedures. -
Mark Vie Controller Standard Block Library for Public Disclosure Contents
GEI-100682AC Mark* VIe Controller Standard Block Library These instructions do not purport to cover all details or variations in equipment, nor to provide for every possible contingency to be met during installation, operation, and maintenance. The information is supplied for informational purposes only, and GE makes no warranty as to the accuracy of the information included herein. Changes, modifications, and/or improvements to equipment and specifications are made periodically and these changes may or may not be reflected herein. It is understood that GE may make changes, modifications, or improvements to the equipment referenced herein or to the document itself at any time. This document is intended for trained personnel familiar with the GE products referenced herein. Public – This document is approved for public disclosure. GE may have patents or pending patent applications covering subject matter in this document. The furnishing of this document does not provide any license whatsoever to any of these patents. GE provides the following document and the information included therein as is and without warranty of any kind, expressed or implied, including but not limited to any implied statutory warranty of merchantability or fitness for particular purpose. For further assistance or technical information, contact the nearest GE Sales or Service Office, or an authorized GE Sales Representative. Revised: July 2018 Issued: Sept 2005 © 2005 – 2018 General Electric Company. ___________________________________ * Indicates a trademark of General -
On Various Ways to Split a Floating-Point Number
On various ways to split a floating-point number Claude-Pierre Jeannerod Jean-Michel Muller Paul Zimmermann Inria, CNRS, ENS Lyon, Universit´ede Lyon, Universit´ede Lorraine France ARITH-25 June 2018 -1- Splitting a floating-point number X = ? round(x) frac(x) 0 2 First bit of x = ufp(x) (for scalings) X All products are s computed exactly 2 2 X with one FP p 2 2 k a b multiplication a + b ! 2 k + k X (Dekker product) 2 2 X Dekker product (1971) -2- Splitting a floating-point number absolute splittings (e.g., bxc), vs relative splittings (e.g., most significant bits, splitting of the significands for multiplication); In each "bin", the sum is no bit manipulations of the computed exactly binary representations (would result in less portable Matlab program in a paper by programs) ! onlyFP Zielke and Drygalla (2003), operations. analysed and improved by Rump, Ogita, and Oishi (2008), reproducible summation, by Demmel & Nguyen. -3- Notation and preliminary definitions IEEE-754 compliant FP arithmetic with radix β, precision p, and extremal exponents emin and emax; F = set of FP numbers. x 2 F can be written M x = · βe ; βp−1 p M, e 2 Z, with jMj < β and emin 6 e 6 emax, and jMj maximum under these constraints; significand of x: M · β−p+1; RN = rounding to nearest with some given tie-breaking rule (assumed to be either \to even" or \to away", as in IEEE 754-2008); -4- Notation and preliminary definitions Definition 1 (classical ulp) The unit in the last place of t 2 R is ( βblogβ jt|c−p+1 if jtj βemin , ulp(t) = > βemin−p+1 otherwise. -
Floating Point Arithmetic
Systems Architecture Lecture 14: Floating Point Arithmetic Jeremy R. Johnson Anatole D. Ruslanov William M. Mongan Some or all figures from Computer Organization and Design: The Hardware/Software Approach, Third Edition, by David Patterson and John Hennessy, are copyrighted material (COPYRIGHT 2004 MORGAN KAUFMANN PUBLISHERS, INC. ALL RIGHTS RESERVED). Lec 14 Systems Architecture 1 Introduction • Objective: To provide hardware support for floating point arithmetic. To understand how to represent floating point numbers in the computer and how to perform arithmetic with them. Also to learn how to use floating point arithmetic in MIPS. • Approximate arithmetic – Finite Range – Limited Precision • Topics – IEEE format for single and double precision floating point numbers – Floating point addition and multiplication – Support for floating point computation in MIPS Lec 14 Systems Architecture 2 Distribution of Floating Point Numbers e = -1 e = 0 e = 1 • 3 bit mantissa 1.00 X 2^(-1) = 1/2 1.00 X 2^0 = 1 1.00 X 2^1 = 2 1.01 X 2^(-1) = 5/8 1.01 X 2^0 = 5/4 1.01 X 2^1 = 5/2 • exponent {-1,0,1} 1.10 X 2^(-1) = 3/4 1.10 X 2^0 = 3/2 1.10 X 2^1= 3 1.11 X 2^(-1) = 7/8 1.11 X 2^0 = 7/4 1.11 X 2^1 = 7/2 0 1 2 3 Lec 14 Systems Architecture 3 Floating Point • An IEEE floating point representation consists of – A Sign Bit (no surprise) – An Exponent (“times 2 to the what?”) – Mantissa (“Significand”), which is assumed to be 1.xxxxx (thus, one bit of the mantissa is implied as 1) – This is called a normalized representation • So a mantissa = 0 really is interpreted to be 1.0, and a mantissa of all 1111 is interpreted to be 1.1111 • Special cases are used to represent denormalized mantissas (true mantissa = 0), NaN, etc., as will be discussed. -
Adaptivfloat: a Floating-Point Based Data Type for Resilient Deep Learning Inference
ADAPTIVFLOAT:AFLOATING-POINT BASED DATA TYPE FOR RESILIENT DEEP LEARNING INFERENCE Thierry Tambe 1 En-Yu Yang 1 Zishen Wan 1 Yuntian Deng 1 Vijay Janapa Reddi 1 Alexander Rush 2 David Brooks 1 Gu-Yeon Wei 1 ABSTRACT Conventional hardware-friendly quantization methods, such as fixed-point or integer, tend to perform poorly at very low word sizes as their shrinking dynamic ranges cannot adequately capture the wide data distributions commonly seen in sequence transduction models. We present AdaptivFloat, a floating-point inspired number representation format for deep learning that dynamically maximizes and optimally clips its available dynamic range, at a layer granularity, in order to create faithful encoding of neural network parameters. AdaptivFloat consistently produces higher inference accuracies compared to block floating-point, uniform, IEEE-like float or posit encodings at very low precision (≤ 8-bit) across a diverse set of state-of-the-art neural network topologies. And notably, AdaptivFloat is seen surpassing baseline FP32 performance by up to +0.3 in BLEU score and -0.75 in word error rate at weight bit widths that are ≤ 8-bit. Experimental results on a deep neural network (DNN) hardware accelerator, exploiting AdaptivFloat logic in its computational datapath, demonstrate per-operation energy and area that is 0.9× and 1.14×, respectively, that of equivalent bit width integer-based accelerator variants. (a) ResNet-50 Weight Histogram (b) Inception-v3 Weight Histogram 1 INTRODUCTION 105 Max Weight: 1.32 105 Max Weight: 1.27 Min Weight: -0.78 Min Weight: -1.20 4 4 Deep learning approaches have transformed representation 10 10 103 103 learning in a multitude of tasks. -
DRAFT1.2 Methods
HL7 v3.0 Data Types Specification - Version 0.9 Table of Contents Abstract . 1 1 Introduction . 2 1.1 Goals . 3 DRAFT1.2 Methods . 6 1.2.1 Analysis of Semantic Fields . 7 1.2.2 Form of Data Type Definitions . 10 1.2.3 Generalized Types . 11 1.2.4 Generic Types . 12 1.2.5 Collections . 15 1.2.6 The Meta Model . 18 1.2.7 Implicit Type Conversion . 22 1.2.8 Literals . 26 1.2.9 Instance Notation . 26 1.2.10 Typus typorum: Boolean . 28 1.2.11 Incomplete Information . 31 1.2.12 Update Semantics . 33 2 Text . 36 2.1 Introduction . 36 2.1.1 From Characters to Strings . 36 2.1.2 Display Properties . 37 2.1.3 Encoding of appearance . 37 2.1.4 From appearance of text to multimedial information . 39 2.1.5 Pulling the pieces together . 40 2.2 Character String . 40 2.2.1 The Unicode . 41 2.2.2 No Escape Sequences . 42 2.2.3 ITS Responsibilities . 42 2.2.4 HL7 Applications are "Black Boxes" . 43 2.2.5 No Penalty for Legacy Systems . 44 2.2.6 Unicode and XML . 47 2.3 Free Text . 47 2.3.1 Multimedia Enabled Free Text . 48 2.3.2 Binary Data . 55 2.3.3 Outstanding Issues . 57 3 Things, Concepts, and Qualities . 58 3.1 Overview of the Problem Space . 58 3.1.1 Concept vs. Instance . 58 3.1.2 Real World vs. Artificial Technical World . 59 3.1.3 Segmentation of the Semantic Field . -
Floating Point Square Root Under HUB Format
View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by Repositorio Institucional Universidad de Málaga Floating Point Square Root under HUB Format Julio Villalba-Moreno Javier Hormigo Dept. of Computer Architecture Dept. of Computer Architecture University of Malaga University of Malaga Malaga, SPAIN Malaga, SPAIN [email protected] [email protected] Abstract—Unit-Biased (HUB) is an emerging format based on maintaining the same accuracy, the area cost and delay of FIR shifting the representation line of the binary numbers by half filter implementations has been drastically reduced in [3], and unit in the last place. The HUB format is specially relevant similarly for the QR decomposition in [4]. for computers where rounding to nearest is required because it is performed simply by truncation. From a hardware point In [5] the authors carry out an analysis of using HUB format of view, the circuits implementing this representation save both for floating point adders, multipliers and converters from a area and time since rounding does not involve any carry propa- quantitative point of view. Experimental studies demonstrate gation. Designs to perform the four basic operations have been that HUB format keeps the same accuracy as conventional proposed under HUB format recently. Nevertheless, the square format for the aforementioned units, simultaneously improving root operation has not been confronted yet. In this paper we present an architecture to carry out the square root operation area, speed and power consumption (14% speed-up, 38% less under HUB format for floating point numbers. The results of area and 26% less power for single precision floating point this work keep supporting the fact that the HUB representation adder, 17% speed-up, 22% less area and slightly less power for involves simpler hardware than its conventional counterpart for the floating point multiplier). -
AC Library for Emulating Low-Precision Arithmetic Fasi
CPFloat: A C library for emulating low-precision arithmetic Fasi, Massimiliano and Mikaitis, Mantas 2020 MIMS EPrint: 2020.22 Manchester Institute for Mathematical Sciences School of Mathematics The University of Manchester Reports available from: http://eprints.maths.manchester.ac.uk/ And by contacting: The MIMS Secretary School of Mathematics The University of Manchester Manchester, M13 9PL, UK ISSN 1749-9097 CPFloat: A C library for emulating low-precision arithmetic∗ Massimiliano Fasi y Mantas Mikaitis z Abstract Low-precision floating-point arithmetic can be simulated via software by executing each arith- metic operation in hardware and rounding the result to the desired number of significant bits. For IEEE-compliant formats, rounding requires only standard mathematical library functions, but handling subnormals, underflow, and overflow demands special attention, and numerical errors can cause mathematically correct formulae to behave incorrectly in finite arithmetic. Moreover, the ensuing algorithms are not necessarily efficient, as the library functions these techniques build upon are typically designed to handle a broad range of cases and may not be optimized for the specific needs of rounding algorithms. CPFloat is a C library that of- fers efficient routines for rounding arrays of binary32 and binary64 numbers to lower precision. The software exploits the bit level representation of the underlying formats and performs only low-level bit manipulation and integer arithmetic, without relying on costly library calls. In numerical experiments the new techniques bring a considerable speedup (typically one order of magnitude or more) over existing alternatives in C, C++, and MATLAB. To the best of our knowledge, CPFloat is currently the most efficient and complete library for experimenting with custom low-precision floating-point arithmetic available in any language. -
Handwritten Digit Classication Using 8-Bit Floating Point Based Convolutional Neural Networks
Downloaded from orbit.dtu.dk on: Apr 10, 2018 Handwritten Digit Classication using 8-bit Floating Point based Convolutional Neural Networks Gallus, Michal; Nannarelli, Alberto Publication date: 2018 Document Version Publisher's PDF, also known as Version of record Link back to DTU Orbit Citation (APA): Gallus, M., & Nannarelli, A. (2018). Handwritten Digit Classication using 8-bit Floating Point based Convolutional Neural Networks. DTU Compute. (DTU Compute Technical Report-2018, Vol. 01). General rights Copyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal requirements associated with these rights. • Users may download and print one copy of any publication from the public portal for the purpose of private study or research. • You may not further distribute the material or use it for any profit-making activity or commercial gain • You may freely distribute the URL identifying the publication in the public portal If you believe that this document breaches copyright please contact us providing details, and we will remove access to the work immediately and investigate your claim. Handwritten Digit Classification using 8-bit Floating Point based Convolutional Neural Networks Michal Gallus and Alberto Nannarelli (supervisor) Danmarks Tekniske Universitet Lyngby, Denmark [email protected] Abstract—Training of deep neural networks is often con- In order to address this problem, this paper proposes usage strained by the available memory and computational power. of 8-bit floating point instead of single precision floating point This often causes it to run for weeks even when the underlying which allows to save 75% space for all trainable parameters, platform is employed with multiple GPUs. -
Maconomy Restful Web Services
Maconomy RESTful Web Services Programmer’s Guide 2015 Edited by Rune Glerup While Deltek has attempted to verify that the information in this document is accurate and complete, some typographical or technical errors may exist. The recipient of this document is solely responsible for all decisions relating to or use of the information provided herein. The information contained in this publication is effective as of the publication date below and is subject to change without notice. This publication contains proprietary information that is protected by copyright. All rights are reserved. No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, or translated into another language, without the prior written consent of Deltek, Inc. This edition published April 2015. © 2015 Deltek Inc. Deltek’s software is also protected by copyright law and constitutes valuable confidential and proprietary information of Deltek, Inc. and its licensors. The Deltek software, and all related documentation, is provided for use only in accordance with the terms of the license agreement. Unauthorized reproduction or distribution of the program or any portion thereof could result in severe civil or criminal penalties. All trademarks are the property of their respective owners. ii ©Deltek Inc., All Rights Reserved Contents 1 Introduction1 1.1 The Container Abstraction..........................1 1.1.1 Card panes...............................1 1.1.2 Table panes...............................1 1.1.3 Filter panes...............................2 1.2 REST......................................2 1.2.1 Resources................................3 1.2.2 Hyperlinks...............................3 1.2.3 Other Styles of Web Services.....................3 1.2.4 Further Reading............................4 1.3 Example.....................................4 1.4 curl.......................................8 2 Basics 9 2.1 JSON and XML................................9 2.2 Language...................................