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LM4817 1W Stereo Audio Amplifier Plus Adjustable Output Limiter Plus Adjustable LDO Check for Samples: LM4817

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LM4817 1W Stereo Audio Amplifier Plus Adjustable Output Limiter Plus Adjustable LDO Check for Samples: LM4817 LM4817 www.ti.com SNAS226C –MAY 2004–REVISED FEBRUARY 2006 LM4817 1W Stereo Audio Amplifier Plus Adjustable Output Limiter Plus Adjustable LDO Check for Samples: LM4817 1FEATURES DESCRIPTION The LM4817 combines a bridge-connected (BTL) 2• Stereo BTL Amplifier stereo audio power amplifier with a low dropout • Adjustable Output Voltage Magnitude Limiter voltage regulator (LDO). The audio amplifier delivers • Adjustable LDO Regulator 1.0W to a 8Ω load with a less than 1.0% THD+N • “Click and Pop” Suppression Circuitry while operating on a 5V power supply. With VLIM set to 1.0V, the amplifier outputs are clamped to 6V , • LDO is Stable with Small-Value Ceramic p-p ±800mV. Output Capacitors • Unity-Gain Stable Audio Amplifiers With the LM4817's adjustable low-dropout (LDO) CMOS linear regulator delivers an output current of • LDO has Over-Current Protection up to 300mA, has shutdown mode (1nA, typ) low • Thermal Shutdown Protection Circuitry quiescent current (90µA, typ) and LDO voltage • TSSOP (PWP) Package (120mV, typ). The regulator is stable with small ceramic capacitive load (2.2µF, typ). The regulator APPLICATIONS includes regulation fault detection, a bandgap voltage reference, and constant current limiting. It is designed • Multimedia Monitors for low power, low current applications that can take • Portable and Desktop Computers advantage of its 300mA output current capability. • Portable Televisions The LM4817 features an externally controlled micropower shutdown mode and thermal shutdown KEY SPECIFICATIONS protection. It also utilizes circuitry that reduces "clicks and pops" during device turn-on and return from • PO (BTL): VDD = 5V, THD+N ≤ 1%, RL = 8Ω: 1.0 shutdown. W (typ) Boomer audio power amplifiers are designed • Power supply range (amplifier): 3.0 to 5.5 V specifically to use few external components and • Power supply range (LDO): 2.5 to 6.0 V provide high quality output power in a surface mount • Shutdown current: 0.07 µA (typ) package. • LDO output current: 300 mA (min) • LDO dropout voltage (IOUT = 300mA): 120 mV (typ) • LDO quiescent supply current: 90 μA (typ) • LDO shutdown supply current: 1 nA (typ) • LDO PSRR: 60 dB • LDO turn-on time: 120 ms (typ) • LDO ouput noise-voltage: 37 µVRMS (typ) 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2004–2006, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. LM4817 SNAS226C –MAY 2004–REVISED FEBRUARY 2006 www.ti.com Connection Diagram Figure 1. Top View See Package Number PWP0028A for TSSOP Typical Application VDD CS + RF 1.0 mF Audio 20 k: TANT Input RI -IN A - -OUT A 20 k: +IN A Amp A1 CI + 1 mF 20 k: 20 k: 20 k: RL 50 k: 8: - +OUT A Bypass VDD/2 Amp A2 + CB * Shutdown Audio 0.33 mF 50 k: Limiter V Input R LIM I -IN B - 2.2 mF -OUT B 20 k: Amp B1 CI +IN B + 20 k: 1 mF 15 LDO_OUT 20 k: VOUT 19 LDO_OUT 20 k: RL R 100k 1 17 LDO_VCC 8: +OUT B V LDO_SD - IN 13 Amp B2 2.2 mF LDO 14 FAULT + RF 20 k: 33 nF 12 CC R2 11 SET 18 LDO_GND GND These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM4817 LM4817 www.ti.com SNAS226C –MAY 2004–REVISED FEBRUARY 2006 Absolute Maximum Ratings Stereo Amplifier(1)(2)(3) Amplifier Supply Voltage (pins 5, 24) 6.0V LDO-VCC, LDO-OUT, LDO-SHDN, ADJ, CC, FAULT (pins 11-15, 17,19) −0.3V to 6.5V Fault Sink Current 20mA Storage Temperature −65°C to +150°C Input Voltage −0.3V to VDD +0.3V Power Dissipation(4) Internally limited ESD Susceptibility(5) 2000V ESD Susceptibility(6) 200V Junction Temperature 150°C Solder Information Small Outline Package Vapor Phase (60 sec.) 215°C Infrared (15 sec.) 220°C Thermal Resistance θJC (typ)—PWP0028A 20°C/W (4) θJA (typ)—PWP0028A 41°C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. (2) All voltages are measured with respect to the ground (GND) pins unless otherwise specified. (3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. (4) The maximum power dissipation is dictated by TJMAX, θJA, and the ambient temperature TA and must be derated at elevated temperatures. The maximum allowable power dissipation is PDMAX = (TJMAX − TA)/θJA. For the LM4817, TJMAX = 150°C. The θJAfor the LM4817 in the 28-pin PWP0028A package, when board mounted and its DAP is soldered to a 2in2 copper heatsink plane, is 41°C/W. (5) Human body model, 100pF discharged through a 1.5kΩ resistor. (6) Machine model, 220pF–240pF discharged through all pins. Operating Ratings Temperature Range TMIN ≤ TA ≤ TMAX −40°C ≤ TA ≤ 85°C Supply Voltage Pins 5, 24 3.0V ≤ VDD ≤ 5.5V Pin 17 2.5V ≤ VCC ≤ 6.0V Copyright © 2004–2006, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM4817 LM4817 SNAS226C –MAY 2004–REVISED FEBRUARY 2006 www.ti.com Stereo Amplifier Electrical Characteristics for Entire IC(1)(2) The following specifications apply for VDD = 5V unless otherwise noted. Limits apply for TA = 25°C. Symbol Parameter Conditions LM4817 Units (Limits) Typical(3) Limit(4) VDD Supply Voltage 3 V (min) 5.5 V (max) (5) IDD Quiescent Power Supply Current VIN = 0V, IO = 0A 8 15 mA (max) 5 mA (min) ISD Shutdown Current VDD applied to the SHUTDOWN pin 0.07 2 μA (min) V Shutdown Logic High Input IH 2.7 V (min) Threshold Voltage V Shutdown Logic Low Input IL 1.8 V (max) Threshold Voltage VOS Output Offset Voltage VIN = 0V 5 50 mV (max) (6) PO Output Power THD+N = 1%, f = 1kHz, RL = 8Ω 1.1 1.0 W (min) THD+N = 10%, f = 1kHz, RL = 8Ω 1.5 W THD+N Total Harmonic Distortion+Noise 20Hz ≤ f ≤ 20kHz, A = 2 VD 0.13 % RL = 8Ω, PO = 1W VLIM = 1.0V, RL = ∞, VIN = 4VP-P 5.2 VP-P (min) VLIM Limiter Clamp Voltage 6.0 VO P-P = (VOUT+ - VOUT-) 6.8 VP-P (max) PSRR Power Supply Rejection Ratio VDD = 5V, VRIPPLE = 200mVRMS, RL = 8Ω, CB = 1.0μ, fIN = 1kHz Inputs Floating 67 dB Inputs terminated with 10Ω 45 dB XTALK Channel Separation f = 1kHz, CB = 1.0μF 90 dB SNR Signal To Noise Ratio VDD = 5V, PO = 1W, RL = 8Ω 98 dB (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. (2) All voltages are measured with respect to the ground (GND) pins unless otherwise specified. (3) Typicals are measured at 25°C and represent the parametric norm. (4) Datasheet min/max specification limits are specified by design, test, or statistical analysis. (5) The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier. (6) Output power is measured at the device terminals. 4 Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM4817 LM4817 www.ti.com SNAS226C –MAY 2004–REVISED FEBRUARY 2006 LDO Electrical Characteristics (1) Unless otherwise specified, all limits guaranteed for VIN = VO +0.5V , VSHDN = VIN, CIN = COUT = 2.2μF, CCC = 33nF, TJ = 25°C. Boldface limits apply for the operating temperature extremes: −40°C and 85°C. Symbol Parameter Conditions Min(2) Typ(3) Max(2) Units VIN Input Voltage 2.5 6.0 V 100µA ≤ I ≤ 300mA -2.4 +2.4 OUT % of V ΔV Output Voltage Tolerance V = V + 0.5V(2) OUT O IN O -3 +3 SET = OUT (NOM) VO Output Adjust Range 1.25 6 V IO Maximum Output Current Average DC Current Rating 300 mA ILIMIT Output Current Limit 330 770 mA IQ Supply Current IOUT = 0mA 90 270 μA IOUT = 300mA 225 Shutdown Supply Current VO = 0V, SHDN = GND 0.001 1 μA (1)(4) VDO Dropout Voltage IOUT = 1mA 0.4 IOUT = 200mA 80 220 mV IOUT = 300mA 120 (1) ΔVO Line Regulation IOUT = 1mA, (VO + 0.5V) ≤ VI ≤ 6V -0.1 0.01 0.1 %/V Load Regulation 100μA ≤ IOUT ≤ 300mA 0.002 %/mA en Output Voltage Noise IOUT = 10mA, 10Hz ≤ f ≤ 100kHz 37 μVRMS Output Voltage Noise Density 10Hz ≤ f ≤ 100kHz, COUT = 10μF 190 nV/√Hz (1) VSHDN SHDN Input Threshold VIH, (VO + 0.5V) ≤ VI ≤ 6V 2 V VIL, (VO + 0.5V) ≤ VI ≤ 6V 0.4 ISHDN SHDN Input Bias Current SHDN = GND or IN 0.1 100 nA ISET SET Input Leakage SET = 1.3V 0.1 2.5 nA (5) VFAULT FAULTDetection Voltage VO ≥ 2.5V, IOUT = 200mA 120 280 mV FAULT Output Low Voltage ISINK = 2mA 0.115 0.25 V IFAULT FAULT Off-Leakage Current FAULT = 3.6V, SHDN = 0V 0.1 100 nA TSD Thermal Shutdown Temperature 160 °C Thermal Shutdown Hysteresis 10 TON Start-Up Time COUT = 10μF, VO at 90% of Final Value 120 μs (1) Condition does not apply to input voltages below 2.5V since this is the minimum input operating voltage.
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