The Nas Parallel Benchmarks

Total Page:16

File Type:pdf, Size:1020Kb

The Nas Parallel Benchmarks THE NAS PARALLEL BENCHMARKS 1 1 1 2 D. H. Bailey , E. Barszcz , J. T. Barton ,D.S.Browning , R. L. Carter, L. 2 2 3 1 Dagum ,R.A.Fato ohi ,P.O.Frederickson , T. A. Lasinski ,R.S. 3 2 2 2 Schreib er , H. D. Simon ,V.Venkatakrishnan and S. K. Weeratunga NAS Applied Research Branch NASA Ames Research Center, Mail Stop T045-1 Mo ett Field, CA 94035 Ref: Intl. Journal of Sup ercomputer Applications,vol. 5, no. 3 (Fall 1991), pg. 66{73 Abstract A new set of b enchmarks has b een develop ed for the p erformance evaluation of highly parallel sup ercomputers. These b enchmarks con- sist of ve \parallel kernel" b enchmarks and three \simulated appli- cation" b enchmarks. Together they mimic the computation and data movementcharacteristics of large scale computational uid dynamics applications. The principal distinguishing feature of these b enchmarks is their \p encil and pap er" sp eci cation | all details of these b enchmarks are sp eci ed only algorithmically. In this waymany of the dicul- ties asso ciated with conventional b enchmarking approaches on highly parallel systems are avoided. 1 This author is an employee of NASA Ames ResearchCenter 2 This author is an employee of Computer Sciences Corp oration. This work is supp orted through NASA Contract NAS 2-12961. 3 This author is an employee of the Research Institute for Advanced Computer Science (RIACS). This work is supp orted by the NAS Systems Division via Co op erative Agreement NCC 2-387 b etween NASA and the Universities Space Research Asso ciation. 1 Intro duction The Numerical Aero dynamic Simulation (NAS) Program, which is based at NASA Ames Research Center, is a large scale e ort to advance the state of computational aero dynamics. Sp eci cally, the NAS organization aims \to provide the Nation's aerospace researchanddevelopment communitybythe year 2000 a high-p erformance, op erational computing system capable of sim- ulating an entire aerospace vehicle system within a computing time of one to several hours" ([4], page 3). The successful solution of this \grand challenge" problem will require the development of computer systems that can p erform the required complex scienti c computations at a sustained rate nearly one thousand times greater than current generation sup ercomputers can now achieve. The architecture of computer systems able to achieve this level of p erformance will likely b e dissimilar to the shared memory multipro cessing sup ercomputers of to day. While no consensus yet exists on what the design willbe,itislikely that the system will consist of at least 1,000 pro cessors computing in parallel. Highly parallel systems with computing p ower roughly equivalent to tradi- tional shared memory multipro cessors exist to day. Unfortunately, for various reasons, the p erformance evaluation of these systems on comparable typ es of scienti c computations is very dicult. Little relevantdataisavailable for the p erformance of algorithms of interest to the computational aerophysics community on many currently available parallel systems. Benchmarking and p erformance evaluation of such systems has not kept pace with advances in hardware, software and algorithms. In particular, there is as yet no gener- ally accepted b enchmark program or even a b enchmark strategy for these systems. The p opular \kernel" b enchmarks that have b een used for traditional vector sup ercomputers, such as the Livermore Lo ops [12], the LINPACK b enchmark [9, 10] and the original NAS Kernels [7], are clearly inappropriate for the p erformance evaluation of highly parallel machines. First of all, the tuning restrictions of these b enchmarks rule out many widely used parallel extensions. More imp ortantly, the computation and memory requirements of these programs do not do justice to the vastly increased capabilities of the new parallel machines, particularly those systems that will b e available by the mid-1990s. On the other hand, a full scale scienti c application is similarly unsuitable. 1 First of all, p orting a large program to a new parallel computer architecture requires a ma jor e ort, and it is usually hard to justify a ma jor research task simply to obtain a b enchmark numb er. For that reason we b elieve that the otherwise very successful PERFECT Club b enchmark [11] is not suitable for highly parallel systems. This is demonstrated byonlyvery sparse p erformance results for parallel machines in the recent rep orts [13, 14 , 8]. Alternatively, an application b enchmark could assume the availabilityof automatic software to ols for transforming \dustydeck" source into ecient parallel co de on a variety of systems. However, such to ols do not exist to day, and many scientists doubt that they will ever exist across a wide range of architectures. Some other considerations for the development of a meaningful b ench- mark for a highly parallel sup ercomputer are the following: Advanced parallel systems frequently require new algorithmic and soft- ware approaches, and these new metho ds are often quite di erent from the conventional metho ds implemented in source co de for a sequential or vector machine. Benchmarks must b e \generic" and should not favor any particular parallel architecture. This requirement precludes the usage of any architecture-sp eci c co de, such as message passing co de. The correctness of results and p erformance gures must b e easily veri- able. This requirement implies that b oth input and output data sets must b e kept very small. It also implies that the nature of the compu- tation and the exp ected results must b e sp eci ed in great detail. The memory size and run time requirements must b e easily adjustable to accommo date new systems with increased p ower. The b enchmark must b e readily distributable. In our view, the only b enchmarking approach that satis es all of these constraints is a \pap er and p encil" b enchmark. The idea is to sp ecify a set of problems only algorithmically.Even the input data must b e sp eci ed only on pap er. Naturally, the problem has to b e sp eci ed in sucient detail that a unique solution exists, and the required output has to b e brief yet detailed 2 enough to certify that the problem has b een solved correctly. The p erson or p ersons implementing the b enchmarks on a given system are exp ected to solve the various problems in the most appropriate way for the sp eci c system. The choice of data structures, algorithms, pro cessor allo cation and memory usage are all (to the extentallowed by the sp eci cation) left op en to the discretion of the implementer. Some extension of FortranorCisrequired, and reasonable limits are placed on the usage of assembly co de and the like, but otherwise programmers are free to utilize language constructs that give the b est p erformance p ossible on the particular system b eing studied. To this end, wehave devised a numb er of relatively simple \kernels", which are sp eci ed completely in [6]. However, kernels alone are insucient to completely assess the p erformance p otential of a parallel machine on real scienti c applications. The chief diculty is that a certain data structure maybevery ecient on a certain system for one of the isolated kernels, and yet this data structure would b e inappropriate if incorp orated into a larger application. In other words, the p erformance of a real computational uid dynamics (CFD) application on a parallel system is critically dep endenton data motion b etween computational kernels. Thus we consider the complete repro duction of this data movement to b e of critical imp ortance in a b ench- mark. Our b enchmark set therefore consists of two ma jor comp onents: ve par- allel kernel b enchmarks and three simulated application b enchmarks. The simulated application b enchmarks combine several computations in a man- ner that resembles the actual order of execution in certain imp ortantCFD application co des. This is discussed in more detail in [6]. We feel that this b enchmark set successfully addresses many of the prob- lems asso ciated with b enchmarking parallel machines. Although wedonot claim that this set is typical of all scienti c computing, it is based on the key comp onents of several large aeroscience applications used by scientists on sup ercomputers at NASA Ames Research Center. These b enchmarks will b e used by the Numerical Aero dynamic Simulation (NAS) Program to evaluate the p erformance of parallel computers. 3 2 Benchmark Rules 2.1 De nitions In the following, the term \pro cessor" is de ned as a hardware unit capable of integer and oating p oint computation. The \lo cal memory" of a pro cessor refers to randomly accessible memory with an access time (latency) of less than one microsecond. The term \main memory" refers to the combined lo cal memory of all pro cessors. This includes any memory shared by all pro cessors that can b e accessed byeach pro cessor in less than one microsecond. The term \mass storage" refers to non-volatile randomly accessible storage media that can b e accessed by at least one pro cessor within forty milliseconds. A \pro cessing no de" is de ned as a hardware unit consisting of one or more pro cessors plus their lo cal memory,which is logically a single unit on the network that connects the pro cessors. The term \computational no des" refers to those pro cessing no des pri- marily devoted to high-sp eed oating p oint computation.
Recommended publications
  • Technical Report Aaron Councilman
    Extensible Parallel Programming in ableC Aaron Councilman Department of Computer Science and Engineering University of Minnesota, Twin Cities May 23, 2019 1 Introduction There are many different manners of parallelizing code, and many different languages that provide such features. Different types of computations are best suited by different types of parallelism. Simply whether a computation is compute bound or I/O bound determines whether the computation will benefit from being run with more threads than the machine has cores, and other properties of a computation will similarly affect how it performs when run in parallel. Thus, to provide parallel programmers the ability to deliver the best performance for their programs, the ability to choose the parallel programming abstractions they use is important. The ability to combine these abstractions however they need is also important, since different parts of a program will have different performance properties, and therefore may perform best using different abstractions. Unfortunately, parallel programming languages are often designed monolithically, built as an entire language with a specific set of features. Because of this, programmer's choice of parallel programming abstractions is generally limited to the choice of the language to use. Beyond limiting the available abstracts, this also means, that the choice of abstractions must be made ahead of time, since any attempt to change the parallel programming language at a later time is likely to be be prohibitive as it may require rewriting large portions of the codebase, if not the entire codebase. Extensible programming languages can offer a solution to these problems. With an extensible compiler, the programmer chooses a base programming language and can then select the set of \extensions" for that language that best fit their needs.
    [Show full text]
  • Intel® Cilk™ Plus
    Overview: Programming Environment for Intel® Xeon Phi™ Coprocessor One Source Base, Tuned to many Targets Source Compilers, Libraries, Parallel Models Multicore Many-core Cluster Multicore Multicore CPU CPU Intel® MIC Multicore Multicore and Architecture Cluster Many-core Cluster Copyright© 2014, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. Intel® Parallel Studio XE 2013 and Intel® Cluster Studio XE 2013 Phase Product Feature Benefit Intel® Threading design assistant • Simplifies, demystifies, and speeds Advisor XE (Studio products only) parallel application design • C/C++ and Fortran compilers • Intel® Threading Building Blocks • Enabling solution to achieve the Intel® • Intel® Cilk™ Plus application performance and Composer XE • Intel® Integrated Performance scalability benefits of multicore and Build Primitives forward scale to many-core • Intel® Math Kernel Library • Enabling High Performance Scalability, Interconnect Intel® High Performance Message Independence, Runtime Fabric † MPI Library Passing (MPI) Library Selection, and Application Tuning Capability ® Intel Performance Profiler for • Remove guesswork, saves time, VTune™ optimizing application makes it easier to find performance Amplifier XE performance and scalability and scalability bottlenecks Memory & threading dynamic • Increased productivity, code quality, ® Intel analysis for code quality and lowers cost, finds memory, Verify Inspector XE threading , and security defects & Tune Static Analysis for code quality
    [Show full text]
  • Part V Some Broad Topic
    Part V Some Broad Topic Winter 2021 Parallel Processing, Some Broad Topics Slide 1 About This Presentation This presentation is intended to support the use of the textbook Introduction to Parallel Processing: Algorithms and Architectures (Plenum Press, 1999, ISBN 0-306-45970-1). It was prepared by the author in connection with teaching the graduate-level course ECE 254B: Advanced Computer Architecture: Parallel Processing, at the University of California, Santa Barbara. Instructors can use these slides in classroom teaching and for other educational purposes. Any other use is strictly prohibited. © Behrooz Parhami Edition Released Revised Revised Revised First Spring 2005 Spring 2006 Fall 2008 Fall 2010 Winter 2013 Winter 2014 Winter 2016 Winter 2019* Winter 2021* *Chapters 17-18 only Winter 2021 Parallel Processing, Some Broad Topics Slide 2 V Some Broad Topics Study topics that cut across all architectural classes: • Mapping computations onto processors (scheduling) • Ensuring that I/O can keep up with other subsystems • Storage, system, software, and reliability issues Topics in This Part Chapter 17 Emulation and Scheduling Chapter 18 Data Storage, Input, and Output Chapter 19 Reliable Parallel Processing Chapter 20 System and Software Issues Winter 2021 Parallel Processing, Some Broad Topics Slide 3 17 Emulation and Scheduling Mapping an architecture or task system onto an architecture • Learn how to achieve algorithm portability via emulation • Become familiar with task scheduling in parallel systems Topics in This Chapter 17.1 Emulations Among Architectures 17.2 Distributed Shared Memory 17.3 The Task Scheduling Problem 17.4 A Class of Scheduling Algorithms 17.5 Some Useful Bounds for Scheduling 17.6 Load Balancing and Dataflow Systems Winter 2021 Parallel Processing, Some Broad Topics Slide 4 17.1 Emulations Among Architectures Need for scheduling: a.
    [Show full text]
  • An Introduction to Parallel Programming
    In Praise of An Introduction to Parallel Programming With the coming of multicore processors and the cloud, parallel computing is most cer- tainly not a niche area off in a corner of the computing world. Parallelism has become central to the efficient use of resources, and this new textbook by Peter Pacheco will go a long way toward introducing students early in their academic careers to both the art and practice of parallel computing. Duncan Buell Department of Computer Science and Engineering University of South Carolina An Introduction to Parallel Programming illustrates fundamental programming principles in the increasingly important area of shared-memory programming using Pthreads and OpenMP and distributed-memory programming using MPI. More important, it empha- sizes good programming practices by indicating potential performance pitfalls. These topics are presented in the context of a variety of disciplines, including computer science, physics, and mathematics. The chapters include numerous programming exercises that range from easy to very challenging. This is an ideal book for students or professionals looking to learn parallel programming skills or to refresh their knowledge. Leigh Little Department of Computational Science The College at Brockport, The State University of New York An Introduction to Parallel Programming is a well-written, comprehensive book on the field of parallel computing. Students and practitioners alike will appreciate the rele- vant, up-to-date information. Peter Pacheco’s very accessible writing style, combined with numerous interesting examples, keeps the reader’s attention. In a field that races forward at a dizzying pace, this book hangs on for the wild ride covering the ins and outs of parallel hardware and software.
    [Show full text]
  • Lecture Notes : Intel Xeon Phi Coprocessor - an Overview
    C-DAC Four Days Technology Workshop ON Hybrid Computing – Coprocessors/Accelerators Power-Aware Computing – Performance of Application Kernels hyPACK-2013 Mode 3 : Intel Xeon Phi Coprocessors Lecture Notes : Intel Xeon Phi Coprocessor - An Overview Venue : CMSD, UoHYD ; Date : October 15-18, 2013 C-DAC hyPACK-2013 Xeon-Phi Coprocessors : An Overview 1 An Overview of Prog. Env on Intel Xeon-Phi Lecture Outline Following topics will be discussed Understanding of Intel Xeon-Phi Coprocessor Architecture Programming on Intel Xeon-Phi Coprocessor Performance Issues on Intel Xeon-Phi Coprocessor C-DAC hyPACK-2013 Xeon-Phi Coprocessors : An Overview 2 Intel Xeon Host : An Overview of Xeon - Multi-Core and Systems with Devices Part-I Background : Xeon Host - Multi-Core & Devices C-DAC hyPACK-2013 Xeon-Phi Coprocessors : An Overview 3 Programming paradigms-Challenges Large scale data Computing – Current trends HowTrends to run Computing Programs - Observationsfaster ? You require Super Computer Era of Single - Multi-to-Many Core - Heterogeneous Computing Sequential Computing How to run Programs faster ? Fetch/Store Fast Access of data Compute Fast Processor More Memory to Manage data C-DAC hyPACK-2013 Xeon-Phi Coprocessors : An Overview 4 Multi-threaded Processing using Hyper-Threading Technology Time taken to process n threads on a single processor is significantly more than a single processor system with HT technology enabled. Multithreading Hyper-threading Technology App 0 App 1 App 2 App 0 App 1 App 2 T0 T1 T2 T3 T4 T5 T0 T1 T2 T3 T4 T5 Thread Pool Thread Pool CPU CPU CPU T0 T1 T2 T3 T4 T5 LP0 T0 T2 T4 LP1 Time T1 T3 T5 CPU 2 Threads per Processor Time Source : http://www.intel.com ; Reference : [6], [29], [31] P/C : Microprocessor and cache; SM : Shared memory C-DAC hyPACK-2013 Xeon-Phi Coprocessors : An Overview 5 Relationship among Processors, Processes, &Threads Processors Processors µPi Processes .
    [Show full text]
  • The Relevance of Opencl to HPC
    The Relevance of OpenCL to HPC . Paul Preney, OCT, M.Sc., B.Ed., B.Sc. [email protected] School of Computer Science University of Windsor Windsor, Ontario, Canada Copyright © 2015 Paul Preney. All Rights Reserved. March 4, 2015 The Relevance of OpenCL to HPC Paul Preney 2 Announced Abstract Today’s high performance computing programs are evolving to be increas- ingly more parallel, increasingly more wait-free, increasingly deployed on many different kinds of hardware including general purpose CPUs, GPGPUs, FPGAs, other custom specific-purpose hardware, etc. The OpenCL standards are platforms providing interfaces that enable deployment of programs to vir- tually any heterogeneous computing device. The OpenCL standard defines a highly-vectorizable programming language, OpenCL C, which enables the deployment of programming logic to arbitrary hardware without requiring low-level, “machine-coding” knowledge of such. The OpenCL standard is a critical component of exascale initiatives given that it is hardware neu- tral, with significant support and participation from all the major processor vendors. Unfortunately the main source of information about OpenCL is in the form of its final specifications so there is a lot of misinformation about it. This talk will explain the relevance of the OpenCL standard to the HPC community, and offer a glimpse into what high-level abstractions for OpenCL, under development by software engineers, might look like. The Relevance of OpenCL to HPC Paul Preney 3 Presentation Overview 1. HPC and OpenCL 2. The Relevance Of OpenCL To HPC 3. A Glimpse Into Possible High-Level Abstractions 4. The Future and Discussion 5. References The Relevance of OpenCL to HPC Paul Preney 4 Table of Contents 1.
    [Show full text]
  • Speculative Parallelism in Cilk++
    Speculative Parallelism in Cilk++ Ruben Perez Gregory Malecha MIT Harvard University SEAS [email protected] [email protected] ABSTRACT and are based around backtracking search, often optimized Backtracking search algorithms are useful in many domains, with heuristics. Algorithms such as these can benefit tremen- from SAT solvers to artificial intelligences for playing games dously from parallel processing because separate threads can such as chess. Searching disjoint branches can, inherently be used to search independent paths in parallel. We call be done in parallel though it can considerably increase the this strategy speculative parallelism because only one solu- amount of work that the algorithm does. Such parallelism is tion matters and as soon as that is found, all other work can speculative, once a solution is found additional work is irrele- be stopped. vant, but the individual branches each have their own poten- tial to find the solution. In sequential algorithms, heuristics While simple to describe, this use of parallelism is not always are used to prune regions of the search space. In parallel easy to implement. One parallel programming platform, implementations this pruning often corresponds to abort- cilk5 [FLR98], included language support for this type of ing existing computations that can be shown to be pursuing parallelism, but it has since been removed in more recent dead-ends. While some systems provide native support for versions of the platform adapted to C++, cilk++ [Lei09]. aborting work, Intel's current parallel extensions to C++, Our goal is to regain the power of speculative execution in a implemented in the cilk++ compiler [Lei09], do not.
    [Show full text]
  • Parallel Programming with Matlabmpi ∗
    View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by CERN Document Server Parallel Programming with MatlabMPI ∗ Jeremy Kepner ([email protected]) MIT Lincoln Laboratory, Lexington, MA 02420 July 23, 2001 Abstract MatlabMPI is a Matlab implementation of the Message Passing Interface (MPI) standard and allows any Matlab program to exploit multiple processors. MatlabMPI currently implements the basic six functions that are the core of the MPI point-to-point communications standard. The key technical innovation of MatlabMPI is that it implements the widely used MPI \look and feel" on top of standard Matlab file I/O, resulting in an extremely compact ( 100 lines) and \pure" implementation which runs anywhere Matlab runs. The performance has been tested on∼ both shared and distributed memory parallel computers. MatlabMPI can match the bandwidth of C based MPI at large message sizes. A test image filtering application using MatlabMPI achieved a speedup of 70 on a parallel computer. ∼ 1 Introduction Matlab [1] is the dominant programming language for implementing numerical computations and is widely used for algorithm development, simulation, data reduction, testing and system evaluation. Many of these computations can benefit from faster execution on a parallel computer. There have been many previous attempts to provide an efficient mechanism for running Matlab programs on parallel computers [3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14]. These efforts of have faced numerous challenges and none have received widespread acceptance. In the world of parallel computing the Message Passing Interface (MPI) [2] is the de facto standard for implementing programs on multiple processors.
    [Show full text]
  • (12) United States Patent (10) Patent No.: US 8.209,664 B2 Yu Et Al
    USOO8209.664B2 (12) United States Patent (10) Patent No.: US 8.209,664 B2 Yu et al. (45) Date of Patent: Jun. 26, 2012 (54) HIGH LEVEL PROGRAMMING 2008, OO86442 A1 4/2008 Dasdan et al. 2008.OO98375 A1 4/2008 Isard EXTENSIONS FOR DISTRIBUTED DATA 2008/0120314 A1 5/2008 Yang et al. PARALLEL PROCESSING 2008/O127200 A1 5/2008 Richards et al. 2008/0250227 A1 10, 2008 Linderman et al. (75) Inventors: Yuan Yu, Cupertino, CA (US); Ulfar 2009/0043803 A1* 2/2009 Frishberg et al. ............. 707/102 Erlingsson, Reykjavik (IS); Michael A 2009/0300656 A1* 12/2009 Bosworth et al. ............. T19,320 Isard, San Francisco, CA (US); Frank OTHER PUBLICATIONS McSherry, San Francisco, CA (US) Blelloch, Guy E., et al., “Implementation of a Portable Nested Data (73) Assignee: Microsoft Corporation, Redmond, WA Parallel Language.” School of Computer Science, Carnegie Mellon (US) University, Pittsburgh, PA, Feb. 1993, Abstract, pp. 1-28. Isard, Michael, et al., “Dryad: Distributed Data-Parallel Programs from Sequential Building Blocks.” Microsoft Research, Sillicon Val (*) Notice: Subject to any disclaimer, the term of this ley, http://research.microsoft.com/research/dv/dryad/eurosysO7. patent is extended or adjusted under 35 pdf). Mar. 23, 2007, 14 pages. U.S.C. 154(b) by 704 days. Ferreira, Renato, et al., “Data parallel language and compiler Support for data intensive applications*1.” Elsevier Science B.V., Parallel (21) Appl. No.: 12/406,826 Computing, vol. 28, Issue 5, May, 2002, 3 pages. Carpenter, Bryan, et al., “HPJava: Data Parallel Extensions to Java.” (22) Filed: Mar 18, 2009 NPAC at Syracuse University, Syracuse, NY, Feb.
    [Show full text]
  • Parallel Programming in Openmp About the Authors
    Parallel Programming in OpenMP About the Authors Rohit Chandra is a chief scientist at NARUS, Inc., a provider of internet business infrastructure solutions. He previously was a principal engineer in the Compiler Group at Silicon Graphics, where he helped design and implement OpenMP. Leonardo Dagum works for Silicon Graphics in the Linux Server Platform Group, where he is responsible for the I/O infrastructure in SGI’s scalable Linux server systems. He helped define the OpenMP Fortran API. His research interests include parallel algorithms and performance modeling for parallel systems. Dave Kohr is a member of the technical staff at NARUS, Inc. He previ- ously was a member of the technical staff in the Compiler Group at Silicon Graphics, where he helped define and implement the OpenMP. Dror Maydan is director of software at Tensilica, Inc., a provider of appli- cation-specific processor technology. He previously was an engineering department manager in the Compiler Group of Silicon Graphics, where he helped design and implement OpenMP. Jeff McDonald owns SolidFX, a private software development company. As the engineering department manager at Silicon Graphics, he proposed the OpenMP API effort and helped develop it into the industry standard it is today. Ramesh Menon is a staff engineer at NARUS, Inc. Prior to NARUS, Ramesh was a staff engineer at SGI, representing SGI in the OpenMP forum. He was the founding chairman of the OpenMP Architecture Review Board (ARB) and supervised the writing of the first OpenMP specifica- tions. Parallel Programming in OpenMP Rohit Chandra Leonardo Dagum Dave Kohr Dror Maydan Jeff McDonald Ramesh Menon Senior Editor Denise E.
    [Show full text]
  • Dryadlinq for Scientific Analyses
    DryadLINQ for Scientific Analyses Jaliya Ekanayake1,a, Atilla Soner Balkirc, Thilina Gunarathnea, Geoffrey Foxa,b, Christophe Poulaind, Nelson Araujod, Roger Bargad aSchool of Informatics and Computing, Indiana University Bloomington bPervasive Technology Institute, Indiana University Bloomington cDepartment of Computer Science, University of Chicago dMicrosoft Research {jekanaya, tgunarat, gcf}@indiana.edu, [email protected],{cpoulain,nelson,barga}@microsoft.com Abstract data-centered approach to parallel processing. In these frameworks, the data is staged in data/compute nodes Applying high level parallel runtimes to of clusters or large-scale data centers and the data/compute intensive applications is becoming computations are shipped to the data in order to increasingly common. The simplicity of the MapReduce perform data processing. HDFS allows Hadoop to programming model and the availability of open access data via a customized distributed storage system source MapReduce runtimes such as Hadoop, attract built on top of heterogeneous compute nodes, while more users around MapReduce programming model. DryadLINQ and CGL-MapReduce access data from Recently, Microsoft has released DryadLINQ for local disks and shared file systems. The simplicity of academic use, allowing users to experience a new these programming models enables better support for programming model and a runtime that is capable of quality of services such as fault tolerance and performing large scale data/compute intensive monitoring. analyses. In this paper, we present our experience in Although DryadLINQ comes with standard samples applying DryadLINQ for a series of scientific data such as Terasort, word count, its applicability for large analysis applications, identify their mapping to the scale data/compute intensive scientific applications is DryadLINQ programming model, and compare their not studied well.
    [Show full text]
  • Automatic and Explicit Parallelization Approaches for Mathematical Simulation Models
    Link¨opingStudies in Science and Technology Licentiate Thesis No. 1716 Automatic and Explicit Parallelization Approaches for Mathematical Simulation Models by Mahder Gebremedhin Department of Computer and Information Science Link¨opingUniversity SE-581 83 Link¨oping,Sweden Link¨oping2015 This is a Swedish Licentiate’s Thesis Swedish postgraduate education leads to a doctor’s degree and/or a licentiate’s degree. A doctor’s degree comprises 240 ECTS credits (4 year of full-time studies). A licentiate’s degree comprises 120 ECTS credits. Copyright c 2015 June Mahder Gebremedhin ISBN 978-91-7519-048-8 ISSN 0280–7971 Printed by LiU Tryck 2015 URL: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-117338 Abstract The move from single-core processor systems to multi-core and many-processor systems comes with the requirement of implementing computations in a way that can utilize these multiple computational units efficiently. This task of writing efficient parallel algorithms will not be possible without improving programming languages and compilers to provide the supporting mecha- nisms. Computer aided mathematical modeling and simulation is one of the most computationally intensive areas of computer science. Even simplified models of physical systems can impose a considerable computational load on the processors at hand. Being able to take advantage of the potential computational power provided by multi-core systems is vital in this area of application. This thesis tries to address how to take advantage of the poten- tial computational power provided by these modern processors in order to improve the performance of simulations, especially for models in the Mod- elica modeling language compiled and simulated using the OpenModelica compiler and run-time environment.
    [Show full text]