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HBD856/D Rev. 0, June−2009

© SCILLC, 2009 “All Rights Reserved” ACE Loop, AnyLevel, BERS, Bullet−Proof, CHIPSCRETES, DUOWATT, E−FET, EASY SWITCHER, ECLinPS, ECLinPS Lite, ECLinPS MAX, ECLinPS Plus, EpiBase, Epicap, EZFET, FASTMOS, FLEXMOS, FULLPAK, GEMFET, GigaComm, HDPlus, ICePAK, ICEPAK*, L2TMOS, MCCS, MDTL, MECL, MEGAHERTZ, MHTL, MicroIntegration, MicroLeadless, MiniGate, MiniMOS, MiniMOSORB, MRTL, MTTL, Multi−Pak, NOCAP, ON−Demand, PInPAK, PMODE, PowerBase, POWERSENSE, POWERTAP, PureEdge, Quake, SLEEPMODE, SMARTDISCRETES, SMART HotPlug, SMARTswitch, Soft−Skip, SUPERBRIDGES, SuperLock, SWITCHMODE, ThermalTrak, Thermopad, Thermowatt, TMOS Stylized, TOCCATA, Toccata Plus, TOCCATA PLUS, mCool, Unibloc, VPower, XtreMOS, Z−Switch and ZIP R TRIM are trademarks of Semiconductor Components Industries, LLC (SCILLC).

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ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. ON Semiconductor Handbook − Basic Thermal Properties of Semiconductors Chapter 2

Table of Contents Abstract Page In applications requiring wide ambient temperature ranges, Introduction...... 3 compact form factors, limited airflow, or high power Thermal Models...... 3 dissipations, thermal design can pose a significant challenge. Thermal Resistance...... 3 The basic concepts behind heat transport and thermal modeling Thermal Resistance and Thermal Characterization are very straightforward, and device datasheet parameters and Parameters...... 3 thermal response curves provide valuable tools to estimate Example 1: Differentiating q and Y ...... 4 device junction temperatures. Steady−state, transient, and Case−Mounted Rectifiers...... 4 periodic power inputs can all be modeled, and the results allow Lead−Mounted Parts...... 5 for accurate estimation of resulting temperatures and Example 2: Calculating Junction Temperatures from a heatsinking requirements. In addition, thermal models can be Generic Thermal Model...... 7 used to assess the likelihood of thermal runaway and to Thermal RC Networks...... 8 demonstrate the thermal stability of a design. Grounded and Non−Grounded Thermal Models. . . . . 8 Thermal Response Curves...... 9 Superposition of Thermal Responses...... 11 Example 3: Calculating Transient Junction Temperatures by Superposition...... 11 Superposition of Rectangular Pulses...... 12 Example 4: Temperature Changes Due to a Set of Pulses...... 13 Periodic Responses and Duty−Cycle Curves...... 14 Non−Rectangular Power Transients...... 15 Example 5: Maximum Junction Temperature During Overload...... 17 Thermal Runaway...... 18 Thermal Design...... 20

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INTRODUCTION commonly used as a temperature reference point for thermal Three basic processes govern the removal of heat from the calculations involving semiconductors. The other reference rectifier junction to the ambient air: conduction (heat point is the case for case−mounted parts or a specified point traveling through a material); convection (heat transfer by on a lead for axial lead mounted parts. These reference physical motion of a fluid); and radiation (heat transfer by points are denoted with subscripts. For example, qJC electromagnetic wave propagation). Heat flows by signifies junction−to−case thermal resistance, and qJL conduction from the die to the package mounting surface in signifies junction−to−lead thermal resistance. The stud−, base−, or surface−mount pads, but it flows from the corresponding temperature differences are denoted DTJC die through the leads to the mounting terminals in a and DTJL, respectively. lead−mounted part. This thermal conduction can be modeled and designed for, so that the devices in question do Thermal Resistance and Thermal Characterization not exceed their maximum junction temperatures. Steady Parameters q state, periodic and transient thermal conditions can all be Thermal resistance ( ) denotes the resistance along a modeled and solved, allowing the design to maintain proper specific path. When using true thermal resistances all paths thermal operating points, ensure device lifetimes and must be taken into account to compute power and prevent thermal runaway. temperature relationships. There is a related set of characterization parameters (Y) that denote the relationship THERMAL MODELS between power dissipation and temperature, ignoring path Thermal resistance may be used to form simple models to dependent relationships. Computationally, they are nearly compute steady state operating temperatures for a circuit identical to thermal resistance values. under DC or periodic conditions. With the addition of Y + DTńP (eq. 3) thermal capacitance, transient conditions may also be accurately modeled. The results depend on the operating Where: Y ° conditions, including power consumption (heat generation), = Thermal characterization parameter (in C/W), mounting methods, airflow and ambient temperatures. estimating the equivalent thermal resistance for all Nevertheless, the concept provides a very valuable tool for conduction paths handling thermal problems. For lack of a better alternative, thermal characterization Using a thermal model, complex thermal systems may be parameters are often specified when the reference point does easily analyzed using electrical network theorems, not lie on a significant heat conduction path (like the case on including ohm’s law, Thévenin’s theorem, Norton’s theorem a surface mount device), or when the heat conduction paths and superposition. These techniques may be applied to are complex and hard to measure or model. In these case−mounted and lead−mounted devices, with one or more situations, the thermal characterization parameter will be active die, under constant, periodic, and transient less accurate than the full thermal model, but for complex conditions. systems it is computationally much simpler than considering each thermal path and each thermal resistance separately. Thermal Resistance Instead, the single value (Y) can be thought to represent the Just as a material offers resistance to the flow of current, temperature/power/resistance relationship between two it also offers resistance to the flow of heat. Resistance to heat points when all heat conduction paths are conducting, flow is called thermal resistance, and computationally it is without explicit consideration of different conduction paths almost identical to electrical resistance. For steady−state (assuming that the paths are conducting in similar conditions thermal resistance (q) is given as: proportions to those present when the parameter was q + DTńP (eq. 1) measured). Thermal resistances can be used to model heat or flow and temperature relationships, while thermal DT + q @ P (eq. 2) characterization parameters only give temperature relationships without any information about the direction or Where: path of the heat flow. In datasheets, the quoted “thermal q ° = Thermal resistance in C/W resistance” values are commonly thermal characterization D ° T = Temperature difference between points in C parameters (Y), not true thermal resistances (q). P = Power in watts, dissipated at the point in question The junction temperature of a semiconductor must be held below the maximum rating for the part. The junction is

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q Y + ) @ q Example 1: Differentiating and TX TA P1 XA1 (eq. 4) Consider a system with one point of heat generation, and T + T ) P @ q (eq. 5) two paths of significant heat conduction (see Figure 1). X A 2 XA2 Given the resistances for the two conduction paths, q + ) XA1 PD P1 P2 (eq. 6) and qXA2, a thermal reference parameter, YXA, the power Solving the three equations simultaneously yields: dissipation at the point of heat generation, PD, and the + ambient temperature, TA, compute the temperature at the P1 2W (eq. 7) point of generation, TX. + P2 4W (eq. 8) Given: + ° + TX 29 C (eq. 9) PD 6W Alternatively, it can be computed from the Y value q + 2C° ńW XA XA1 directly: q + 1C° ńW + ) @ Y XA2 TX TA PD XA (eq. 10) 2 + ° Y + ° ń TX 29 C (eq. 11) XA C W 3 Use of the thermal reference parameter instead of the + ° TA 25 C thermal resistances computed the resulting temperature more easily, but it did not give any information about the

TX heat flow. The thermal resistance calculation was more involved, but it showed the heat flow as well as the resulting temperature. q q XA1 XA2 Case−Mounted Rectifiers In a case mounted device, the total thermal resistance,

Y junction−to−case, is composed of three thermal resistances: XA PD the die, the die−bond, and the package (see Figure 2). The die−bond thermal resistance usually dominates the total resistance, and the other conduction paths (the wirebonds and the mold compound) are negligible by comparison. Actual values vary with the design of the device; the size of TA TA TA TA the chip, type of die bond, package type and package Figure 1. Thermal Network for Example 1 material all affect the overall thermal performance (see Figure 3). The die−bond thermal resistance will also vary among parts in the same product line, and the amount of PROCEDURE variation will depend on the solder or bond material used in The node temperature can be computed from the thermal the parts. resistances (YXA will be ignored, since it is not a thermal resistance):

Junction Junction

Direction of Heat Flow Die Die Bond

Die Bond

Package

Package Header

Figure 2. Thermal Resistance Components of the Junction−to−Case Thermal Resistance

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90 combined with the power consumption and external temperature, can be used to estimate the junction 85 C/W)

° temperature of the device in an application. , JA q 80 Lead−Mounted Parts In an axial lead−mounted rectifier, heat travels down both 75 DO−41 For Devices with 4 mm Leads, Mounted on a leads to the printed circuit board, which functions as a heat 2 70 650 mm , 2 oz Copper dissipater. In some cases, the heat dissipated by convection Pad at 25°C Ambient and radiation is also significant, which can make modeling 65 a lead mounted model more complicated than a DO−201AD case−mounted part. However, in certain lead−mounted parts 60 the convection and radiation can be neglected compared to THERMAL RESISTANCE ( THERMAL RESISTANCE 55 the thermal resistance of the leads (for example, in 0.1 0.6 1.1 1.6 2.1 2.6 3.1 3.6 4.1 DO−201AD axial devices, see Figure 4). The relative DIE AREA (mm2) magnitude of the convection and radiation terms can be Figure 3. Approximate Thermal estimated by examining the relationship between lead length Resistance of Axial Rectifier Packages and thermal resistance. If the thermal resistance is linearly proportional to lead length, then the convection and In addition, some devices may have material inserted radiation terms are negligible and can be ignored (see between the die and the package to reduce stress or provide Figure 4). If the relationship is not linear, then the electrical insulation. Differing coefficients of thermal convection and radiation terms are significant. expansion between the die and the case can require an extra Thermal resistance data is often provided by the part material at the interface to relieve the stress, allowing a hard manufacturer under the assumption that the device leads solder die attachment technique and improving temperature have identical lengths. However, identical lead lengths may cycling behavior. In some packages, the package exterior is not result in the lowest possible thermal resistance. The typically electrically connected to the die, and these parts overall thermal resistance is the parallel combination of the may be manufactured with insulation inserted between the two lead resistances. It may be that the resistance through die and the package to prevent this connection. These two equal length long leads (similar to the first or second materials, if present, add another component to the thermal mounting methods in Figure 5) is higher than the resistance resistance of the assembly. through a very short lead in parallel with a very long lead Thermal resistance and resistivity (q and ò) follow (similar to the third mounting method in Figure 5). For equations of the same form as electrical resistance and example, if the leads must span a fixed at 10 unit length resistivity. (neglecting the case length), and the thermal resistance per 1 1 unit is 10°C/(W*unit), then the equivalent thermal q + ò @ + (eq. 12) ° A k @ A resistance of two equal 5 unit leads is 25 C/W (symmetrical Where: mounting), but the thermal resistance of a 1 unit length lead ° ò = Thermal Resistivity in parallel with a 9 unit length lead is 9 C/W (asymmetrical ° ° l = Length of Thermal Path mounting). The reduction from 25 C/W to 9 C/W is quite A = Area of Thermal Path significant, but to take advantage of this reduction the k = Thermal Conductivity mounting terminal must have a low thermal resistance to Thermal resistance is inversely proportional to area. For ambient. In addition, this example computation ignored case mounted semiconductors, that refers to the area of heat some of the package and die size effects, which may reduce flow through the package, which is related to, but not the the effectiveness of the asymmetrical mounting. If the die to same as, die area. Larger die in the same package have more lead resistance dominates the total resistance, then contact area with the package, but the package itself has the shortening the lead will not have a significant effect. Finally, same area regardless of the die size. Overall thermal as the span becomes smaller, the advantages of resistance decreases with increased die area, but the asymmetrical mounting become less significant, and a decrease is not linear (see Figure 3). shorter span symmetrical mounting may result in a lower Typically, the junction−to−case resistance (or thermal resistance than a longer span asymmetrical junction−to−case thermal characterization parameter, Y) for mounting. a device will be listed on the datasheet for the part, and

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140 q Table 1. TYPICAL VALUES FOR JA IN STILL AIR (VALUES ON DEVICE DATASHEETS WILL BE MORE C/W)

° 120 Single Lead ACCURATE AND SHOULD BE USED WHEN ,

JA AVAILABLE) q 100 Lead Length L Mounting 80 Package Method 1/8” 1/4” 1/2” 3/4” 1 65 72 82 92 60 DO−41 2 74 81 91 101 Two Equal Length Leads 3 40°C/W (L = 3/8I, A = 2.25I 2) 40 1 50 51 53 55 When Mounted on a 650 mm2, ° THERMAL RESISTANCE ( THERMAL RESISTANCE 2 oz Copper Pad at 25 C Ambient DO−201AD 2 58 59 61 63 20 ° 2 4 6 8 1012141618202224 3 28 C/W (L = 1/2I, A = 6.25I ) LEAD LENGTH (mm) TJ Figure 4. Approximate Thermal Resistance for q JC DO−201AD Axial Lead Rectifiers as a Function of 2°C/W Lead Length q q JAL CL 2.5°C/W 0.5°C/W

L L q q LA LK 40°C/W 40°C/W

ÉÉÉÉÉÉÉÉÉ /inch P /inch q d CA

70°C/W ÉÉÉÉÉÉÉÉÉ MOUNTING METHOD 1 P.C. Board Where Available q q Copper Surface area is small SA SK

TAA TAK TA

L L

ÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉ MOUNTING METHOD 2 Vector Push−In Terminals T−28 Figure 6. Approximate Thermal Model for Example 2

L = 1/2” É

Table 2. DEFINITIONS FOR TERMS THERMAL É

MODEL FOR EXAMPLE 2 É

TEMPERATURES THERMAL RESISTANCES É Board Ground Plane q TA = Ambient CA = Case−to−Ambient É q MOUNTING METHOD 3 TAA = Anode Heat Sink SA = Anode Lead Heat P.C. Board with Ambient Sink−to−Ambient q Copper Surface of Area A TAK = Cathode Heat Sink SK = Cathode Lead Heat Ambient Sink−to−Ambient Figure 5. Mounting Methods for Axial Lead Parts q TLA = Anode Lead LA = Anode Lead q TLK = Cathode Lead LK = Cathode Lead q TJ = Junction CL = Case to Cathode Lead q JC = Junction−to−Case* q JAL = Junction−to−Anode Lead *Case temperature is referenced at cathode end.

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Example 2: Calculating Junction Temperatures from a thermal model. In some cases, this representation could be Generic Thermal Model improved by replacing the TAA and TAK with thermal Compute the junction temperature and resistances to the ambient temperature, and by adding a junction−to−ambient thermal resistance (using the generic thermal resistance from the anode to the cathode through the thermal model in Figure 6), given the following: board. Cathode Lead Length = 0.25 in

Anode Lead Length = 0.5 in TJ TA = 60°C 2°C/W TAA = 70°C TAK = 80°C qSA = qSK = 40°C/W (typical for printed circuit board 62.5°C/W 50.5°C/W 70°C/W wiring) 2 W PD = 2 W

PROCEDURE

Using the lead lengths, RqSA, RqSK, the data in Figure 6, 80°C 60°C and summing series resistances gives the thermal circuit in 70°C Figure 7A. This can be simplified by applying Thévenin’s theorm to the thermal network (see Figure 7B), giving a junction temperature of 112.7°C. Considering the ambient To be reduced by To be reduced by Thevenin’s Thevenin’s temperature, the power dissipation in the part, and the Theorm Theorm junction temperature, the effective thermal resistance (A) junction to ambient can be calculated. TJ DT + P R (eq. 13) D eff 2°C/W + * ń Reff (TJ TA) PD (eq. 14)

+ °°* ń 62.5°C/W 29.3°C/W Reff (112.7 C 60 C) 2W (eq. 15) + ° ń Reff 26.4 C W (eq. 16) However, this resistance is specific to the operating conditions, and would not be expected to stay the same if the 80°C 71.6°C ambient, heatsink, or power dissipation changed. More generally, describing the thermal properties of an axial lead part with a single thermal resistance number must be used with caution, because the ambient temperature is generally Thevenin’s Thevenin’s equivalent to equivalent to not the same as the temperature at the effective heat sink of previous circuit previous circuit the leads. Furthermore, with an asymmetrically mounted (B) part, the asymmetrical thermal resistance will result in asymmetrical heat flow and asymmetrical lead Figure 7. Circuit for Example 2, Simplified by temperatures. If the mounting points are not both at the Summing Series Resistances (A) and by Thévenin’s ambient temperature, the single effective thermal resistance Theorem Applied Separately to Both Sides of the Circuit (B) number will give less accurate results than a more detailed

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THERMAL RC NETWORKS mathematical methods, including Fourier transforms and Any arbitrary thermal network can be represented by linear algebra, like a typical electrical network. thermal resistances, capacitances and time dependent temperatures. The quality of the thermal network is related Grounded and Non−Grounded Thermal Models to how accurately those resistances and capacitances Thermal behavior could be modeled with a network of any represent the actual connections in the system. Obviously, arbitrary shape, with any set of connections, provided that reducing complicated sets of three dimensional objects, the results accurately reflect the system being modeled. fluids and connections to a handful of nodes, resistances, and Depending on how the thermal capacitors are connected, capacitances is an approximation. In many cases, only a few these are referred to as grounded and non−grounded models. nodes in the system are actually important (the junction, the In a grounded model, each thermal capacitance is heatsink, the ambient air), so accurate results can be found represented as a capacitance to thermal ambient (ground). In using only a few thermal connections. In a more complicated a non−grounded model, a least one thermal capacitance is system, it may be necessary to include more nodes, more represented as a capacitance between adjacent nodes (see capacitances, and more thermal resistances in order to Figures 9 and 10). accurately model the important points in the system. Tx

T2(t) Tn−1(t)

q q 2x (n−1)x TA

q q Figure 9. Grounded Thermal Model for a Resistance T1(t)1x nx Tn(t) Path (Cauer Ladder)

Node X P (t) Tx(t) x Cx Tx

Figure 8. Arbitrary Thermal Network Relative to a Particular Node

TA It is possible to mathematically manipulate the power and temperature in the same fashion as voltage and current. The Figure 10. Non−Grounded Thermal Model for a power dissipated at a node, power entering the node, and Resistance Path (Foster Ladder) power leaving the node must be balanced (similar to Kirchhoff’s current law), and the temperature changes Comparing grounded and non−grounded ladder around a closed temperature loop must sum to zero (similar structures, both models can be made mathematically to Kirchhoff’s voltage law). Given the thermal resistance equivalent for the two endpoints, TX and TA, but they will connections, the thermal capacitances, and the temperatures not be equivalent for each intermediate node along the path. at the surrounding nodes, the temperature over time at a In the grounded model, the intermediate nodes could given node is a simple combination of the heat in, heat out, potentially correspond to physical locations on the path, and heat stored. which could be measured. The non−grounded model may be n * computationally easier to work with, and mathematically Tx(t) Ti(t) dTx(t) P (t) * S + C (eq. 17) equivalent for the endpoints, however the intermediate x + q x i 1 ix dt nodes will not have any physical meaning. This is due to a Where: fundamental difference between stored charge and stored heat. At first glance, the equations for heat storage and Cx = Thermal capacitance at the node, equal to the product of its mass and specific heat charge storage (on a capacitor) appear very similar (see For a system with multiple nodes, this will lead to a set of Equations 18 and 19). Equating heat with current; equations, one for every free node in the system. Depending capacitance with the volume, density, specific heat product; on the information available, it is normally advantageous to and temperature with potential, they are almost identical. reduce the number of nodes, so only things with useful However, temperature is absolute, and potential is relative. physical meanings would be included (like device junctions, Voltages always represent the potential difference between heatsinks, and the ambient environment), while all other two points (as in Equation 18). For heat transfer, only the terms would be lumped together wherever possible. The absolute temperature matters (as in Equation 19). equations can then be solved simultaneously by standard ē i + C @ ǒV * V Ǔ (eq. 18) ēt 1 2

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Where: Unlike electrical capacitors, thermal capacitors must have i = Current (charge per unit time) flowing into the capacitor one side of the capacitor grounded to have any physical c = Capacitance of the capacitor meaning. However, non−grounded models can still work V1 − V2 = Potential difference between the two sides of the mathematically, and while the intermediate nodes may not capacitor represent any physical locations, non−grounded models can ē still generate accurate results, and may be computationally Q + ò @ V @ c @ T (eq. 19) ēt advantageous. Lastly, it is extra effort to force the model to accurately produce the response of additional intermediate Where any temperature gradient across the object is ignored, nodes, and depending on the complexity of the system it may and: not be possible anyway. If the extra nodes can be measured, Q = Heat stored in the object ò than it might improve the model, but just because grounded = Density of the object capacitor networks could be physically accurate for V = Volume of the object intermediate nodes does not mean that they are, or that there c = Specific heat of the object would be an advantage to having them physically accurate T = Temperature of the object for the intermediate nodes. As a result, either type of model For example, consider a capacitor with stored charge, with may be used, depending on the circumstances. the negative end grounded. The stored charge produces a voltage at the positive end of the capacitor (Vcap). If the Thermal Response Curves negative end of the capacitor is connected to a node at some A practical method of handling the transient thermal potential, (Vin), then the potential at the positive end of the problem is to measure the thermal response of the capacitor instantly increases (Vin + Vcap), because the semiconductor to a step of input power. Initially, the thermal potential difference across the capacitor is constant for a resistance will be negligible, and as time passes it will given charge on the capacitor. The same is not true in the increase until it eventually reaches the steady−state thermal thermal equivalent. Using a similar example, consider a resistance. The power dissipation and temperature change block of some known mass heated to a given temperature can be measured and plotted with time (see Figures 11, 12, (Tcap), sitting in an ambient environment. It has a thermal and 13). The response over time is referred to as the single capacitance, and it has stored heat, but no matter what it is pulse duty cycle curve, because the thermal resistance at a connected to, or how it is connected, there will not be an given time is equal to the effective thermal resistance at the instantaneous temperature change. If the ambient end of a single pulse, if the pulse duration is the same as the temperature changes instantly (Tin), the block may heat or given time. This distinction is important for understanding cool over time, but the instantaneous temperature of the duty cycle curves, which measure the response to a periodic block at the moment the environment changes will be the input (see Periodic Response and Duty Cycle Curves section same (Tcap). There is no way to stack temperature on Page 15). differences across thermal capacitors the same way voltage differences can be stacked across electrical capacitors.

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q ° JL = 27.4 C/W

0.1 (NORMALIZED) JL R(t)

0.01 0.0001 0.001 0.01 0.1 1 10 100 1000 TIME (s)

Figure 11. Transient Thermal Response, r(t), Normalized to Steady State Thermal Resistance

100

1” Lead

10 1/32” Lead C/W) ° ( JL 3/8” Lead R(t) 1

0.1 0.0001 0.001 0.01 0.1 1 10 100 TIME (s) Figure 12. Transient Thermal Response, R(t)JL, For the Same Part with Different Lead Lengths

q ° JL−1/32” = 20.0 C/W q ° JL−3/8” = 34.9 C/W q ° 1” Lead JL−1” = 54.9 C/W 0.1 1/32” Lead

3/8” Lead

(NORMALIZED) 0.01 JL R(t)

0.001 0.0001 0.001 0.01 0.1 1 10 100 TIME (s) Figure 13. Transient Thermal Response, r(t), for Different Lead Lengths, Normalized to Steady−State Thermal Resistances for Each Lead Length

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This transient thermal impedance may be normalized to a function of time, and the maximum change in temperature, specific thermal resistance: given a square pulse of input power. + @ q RJx(t) r(t) Jx (eq. 20) Thermal Response: 1.4 Where: R (t) + 1.5 * in° CńW Jx Ǹ (eq. 22) r(t) = Fraction of steady state value at a given time (the t normalized transient response) Where: qJx = Thermal resistance, junction to a reference point (x) t = Time, in ms The choice of reference point depends on the type of part Power Input: (the case for case−mounted parts, the leads or ambient for P (t) + 5 W for 0 v t v 1ms (eq. 23) lead−mounted parts – and the subscript ’x’ is replaced with D an appropriate letter to denote the reference point). + PD(t) 0otherwise (eq. 24) Datasheets may contain plots of thermal resistances over Assume all other conditions for the circuit (board set up, time which may or may not be normalized to a steady−state airflow, ambient temperature, etc) are the same as the thermal resistance (see Figures 11 and 12). Normalized conditions for the measured step response. curves present unitless data; to perform useful calculations, normalized thermals responses must first be scaled up by the PROCEDURE resistance the curve is normalized to. Plots of data that are The input may be described as the sum of two step functions: not normalized will have units (usually °C/W). Once the P (t) + P (t) ) P (t) (eq. 25) data has been scaled appropriately, it can be used to find D D1 D2 junction temperatures over time, provided that the Where: conditions of the test match the conditions being calculated P (t) + 5 W for t w 0 (eq. 26) for (including, but not limited to, lead lengths, board D1 + u heatsinking capabilities, ambient airflow and ambient PD2(t) −5 W for t 1ms (eq. 27) temperatures). Initially, only the first input step will affect the temperature Superposition of Thermal Responses change. Solving for the temperature change due to the first For an arbitrary pulse train, which is not periodic, the step, with time in ms: superposition principle allows the summation of the D + v v T(t) PD1(t)RJx(t) for 0 t 1ms (eq. 28) individual power pulse effects to calculate the resulting junction temperature. Complex power inputs may be 1.4 D + ǒ * Ǔ v v (eq. 29) T(t) 5 1.5 Ǹ for 0 t 1ms thought of as combinations of step inputs, and the response t of the system is the sum of the step inputs: 7 n DT(t) + 7.5 * for 0 v t v 1ms Ǹ (eq. 30) D + S @ ǒ * Ǔ t T(t) Pi R t ti (eq. 21) i + 1 Using the formula for superposition: Where: R Pi = power of input i DT(t) + S Pn @ R (t * tn) (eq. 31) n + 0 Jx ti = time step input i is applied R(t) = measured transient thermal response of the device to Substituting the input steps: an input power step of duration t D + ǒ * Ǔ ) ǒ * Ǔ (eq. 32) n = number of power contributions T(t) PD1(t)RJx t t1 PD2(t)RJx t t2 As long as the input can be broken down into a sum of step Solving for the temperature change due to both steps, with inputs, then the junction temperature can be calculated by time in ms: superposition (see Figure 14). A ramp may be crudely (eq. 33) represented by a sum of equal, time delayed step functions, D + ǒ * 7Ǔ ) ǒ 7 * Ǔ u T(t) 7.5 Ǹ Ǹ 7.5 for t 1ms and a pulse may be represented by a step up added to a time t t * 1 delayed step down. 7 7 DT(t) + * for t u 1ms Ǹ Ǹ (eq. 34) Example 3: Calculating Transient Junction t * 1 t Temperatures by Superposition Given a measured thermal response (note that for this Together, Equations 33 and 34 describe the junction example the thermal response was empirically fitted from temperature over time. The maximum temperature rise measured data, and that this will only be accurate for the occurs at the end of the power input, at t = 1 ms. device measured, under specific conditions, and only for a DT(1) + 0.5° C limited range), find the junction temperature rise as a

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Superposition of Rectangular Pulses (eq. 36) n To solve for the effects due to a single pulse, that pulse can + S ƪ ǒ * Ǔ * ǒ * Ǔƫ T(tn,end) Pi R tn,end ti,start R tn,end ti,end be represented by the superposition of two step inputs. The i + 1 first step occurs at the start of the pulse, with a magnitude equal to that of the pulse. The second step occurs at the end Where: of the pulse, with a magnitude opposite that of the pulse. Pi = power of input pulse i ti = timing of pulse i D + @ ƪ ǒ * Ǔ * ǒ * Ǔƫ (eq. 35) T(t) P R t t1 RJx t t2 While the effects of multiple pulses can be summed, the Where: time dependence still makes the timing of the pulses P = power of input pulse significant. A small pulse followed by a large pulse will generate different temperatures than a large pulse followed t1 = pulse start time t = pulse end time by a small pulse, and adjacent or overlapping pulses 2 generate different temperatures than widely spaced pulses. For a series of pulses, the junction temperature at the end of However, as long as the timing and pulse height are accurate, th the n pulse is the algebraic sum of all preceding pulse the resulting temperature can be calculated for any contributions. combination of rectangular pulses, and for any time. This technique is called the pulse−by−pulse method.

Pin P2

P1 P4

P3 (a)

t0 t1 t2 t3 t4 t5 t6 t7 Time

P4 P3 (b) −P3 Time −P4 −P1

−P2

(d) Time Figure 14. Superposition Applied to Junction Temperatures (a) Power Dissipation in the Device (b) Power Dissipation Represented by an Equivalent Set of Step Functions (c) Temperature Change With Time for Each Step Function Separately (d) The Final Junction Temperature Over Time, Given by the Sum of the Step Responses

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When modeling power surges or overloads that occur Table 3. INPUT PULSES FOR EXAMPLE 4 within uniform trains of repetitive pulses, more accurate answers can be obtained with less work by using a model P1 = 80 W t0 = 0 t1 = 0.1 ms based on averaging the power pulses (see Figure 15). The P2 = 40 W t2 = 0.3 ms t3 = 1.3 ms average power is followed by one pulse of the repetitive train P3 = 70 W t4 = 3.3 ms t5 = 3.5 ms and then the overload pulse. The temperature is calculated at the end of the surge or overload. PROCEDURE

POV The temperature at the end of each pulse is a combination nth of the terms for all previous pulses, by superposition. Pulse PO + @ ǒ Ǔ T1 P1 R t1 (eq. 37) + @ ƪ ǒ Ǔ * ǒ * Ǔƫ ) @ ǒ * Ǔ Pavg T2 P1 R t3 R t3 t1 P2 R t3 t2 (eq. 38)

+ @ ƪ ǒ Ǔ * ǒ * Ǔƫ ) T3 P1 R t5 R t5 t1 P2 tPULSE tPULSE (eq. 39) @ ƪ ǒ * Ǔ * * ƫ ) * R t5 t2 R(t5 t3) P3R(t5 t4) tCYCLE Simply finding the appropriate thermal resistances, for the Figure 15. Model for a Repetitive Equal Pulse Train specified durations, and substituting them into the above During Overload equations will give the peak temperatures. However, examining the transient response in Figure 12, reading accurate R(t) values from the curve is not possible. To get Example 4: Temperature Changes Due to a Set of around this difficulty, the values will be estimated by power Pulses law interpolation. Given three power input pulses (in Table 3, see The resistances in Figure 12 are basically linear for small Figure 16), using the transient response in Figure 12, find time values (when plotted on a log scale). This corresponds the temperature at the end of each pulse. to a function of the form in Equation 40. R(t) + a @ tn (eq. 40) 100 The constant of proportionality (a) can be determined from any point on the curve, and the exponent (n) can be 80 P 1 P3 determined from any two points on the curve based on the 60 constant of proportionality being constant. P2 ǒ Ǔ ǒ Ǔ 40 R t1 R t2 a + + (eq. 41) t n t n PEAK POWER (WATTS) 20 1 2

(PK) Equation 41 can be solved for the exponent (n). P 0 t0 t1 t2 t3 t4 t5 ǒ Ǔ 123 4 R t2 logƪ ƫ TIME (ms) Rǒt Ǔ 1 (eq. 42) Figure 16. Power Pulse Train (for Example 4) n + 2 logƪt ƫ t1 T3 Picking two distant points from the linear portion of the curve, 0.22°C/W at 0.0001s, and 3.3°C/W at 0.02s, and T1 solving for the proportionality constant and exponent gives T 2 an approximation for the form of the R(t) curve. a + 24.4 (eq. 43) n + 0.51 (eq. 44)

0.51 , JUNCTION TEMPERATURE R(t) + 24.4 @ t ° CńW (eq. 45) J T t0 t1 t2 t3 t4 t5 123 4 R(t) values for the pulse durations in Equations 37, 38, TIME (ms) and 39 can be found using Equation 45. Figure 17. Resulting Junction Temperature (for Example 4)

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Table 4. TIME DEPENDENT THERMAL RESISTANCE applied, and cools off when power is not being dissipated in VALUES FOR EXAMPLE 4 the device. After many cycles, the heating and cooling will reach equilibrium, and the maximum junction temperature Time (ms) R(t) (5C/W) for the periodic input will stabilize. For an arbitrary case, the t1 0.1 0.223 resulting temperature change can be calculated using t2 0.3 0.390 superposition of an infinite train of pulses. This is commonly quoted in the form of the first or second order approximation t3 1.3 0.823 (see Equations 46 and 47). t4 3.3 1.32 For a square wave power input, the first order approximation t5 3.5 1.36 of the thermal resistance is: t3−t2 1 0.720 f + @ q R ) * q ńf R( ,D) D Jx( ) (1 D) Jx(D ) (eq. 46) t3−t1 1.2 0.790 For a square wave power input, the second order t5−t4 0.2 0.317 approximation of the thermal resistance is: t5−t3 2.2 1.08 R( f,D)+ D @ q (R) ) (1 * D)q (Dńf ) 1ńf) Jx Jx (eq. 47) t5−t2 3.2 1.30 ) q ńf * q ńf Jx(D ) Jx(1 ) t5−t1 3.4 1.34 Where: Finally the thermal resistances can be used in D = positive duty cycle (as a fraction) Equations 37, 38 and 39 to determine the resulting f = frequency of the waveform temperature changes (see Table 5). When D is 1, the response will match the steady state thermal response of the package (constant power input). When D is PERIODIC RESPONSES AND DUTY−CYCLE 0, the resistance is equivalent to a single pulse response. CURVES Square−wave duty cycle curves are often found in The maximum junction temperature for a given periodic datasheets or handbooks. These present the effective power dissipation can be calculated using the transient thermal resistance for the device when a square wave power thermal response to a single input power step. With a input is applied, given the positive duty cycle (D), and periodic power input, the junction heats up when power is frequency positive power pulse.

Table 5. THERMAL CONTRIBUTIONS FROM EACH POWER PULSE IN EXAMPLE 4 P1 Temperature P2 Temperature P3 Temperature Total Temperature Time Contribution (5C) Contribution (5C) Contribution (5C) Change (5C) End of P1 17.80 0.00 0.00 17.80 End of P2 2.63 28.80 0.00 31.44 End of P3 1.60 9.07 22.18 32.85

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100

50% Duty Cycle 10 20% C/W) °

, ( 10%

JL 5%

R(t) 1 2%

1% Single Pulse

0.1 0.0001 0.001 0.01 0.1 1 10 100 TIME (s) Figure 18. Thermal Resistance Over Time for Differing Square Wave Duty Cycles with a 1/32” Lead Length

100

50% Duty Cycle

20% 10 10%

C/W) 5% ° , (

JL 2% R(t) 1 1%

Single Pulse

0.1 0.0001 0.001 0.01 0.1 1 10 100 TIME (s) Figure 19. Thermal Resistance Over Time for Differing Square Wave Duty Cycles with a 1” Lead Length

In most datasheets, this will be plotted against ’t,’ which waveforms. Generally, a waveform that is not square can be represents the on time of the pulse (ton), not changes over approximated as a square wave of similar duration and total time or the period of the signal (see Figures 18 and 19). power. As long as the total power remains similar, the calculated results will be similar. Based on experience, ton + Dńf (eq. 48) square wave approximations of common waveforms have Keep in mind that these duty cycle curves do not represent been developed (see Figure 20). For a pulse that is nearly instantaneous temperature, but rather the peak temperature rectangular, a square wave with equal peak amplitude, which is reached after an infinite number of such cycles have narrower width, and equal total area makes a conservative been repeated. Like the single pulse curves, results model. Sine wave, triangular, and sin2 power pulses can be calculated this way are only valid for the test conditions modeled with square waves of reduced amplitude (91%, under which the original thermal response data is measured. 71%, and 71% of peak, respectively, see Figure 20b) and Non−Rectangular Power Transients reduced width (70% of the baseline width). Thermal response curves are based on a step change of power; the response will not be the same for other

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Rectifier diode forward power pulses are a combination of must handle current pulses that are fractions of sine waves sin and sin2 waveforms if the current varies sinusoidally. In (see Figure 20c, for SCR power loss empirically developed general, suitable modeling results if the amplitude model rules; these are less conservative than the other model waveform factor (FA) is about 0.91 when the peak current is equivalents). Power pulses having more complex low, 0.71 when the peak current (and forward voltage drop) waveforms can be modeled as combinations of pulses (see are high. Rectifiers used with SCRs in phase control circuits Figure 20d).

P1 ÉÉÉÉÉÉ

ÉÉÉÉÉÉP T = A

A 1 1 ÉÉÉÉÉÉ

(a) ÉÉÉÉÉÉ

P(PK) P(PK)

0.91 P(PK) 0.71 P(PK)

0.7 TW 0.7 T (b) W

TW TW

0.85 P(PK) 0.75 P(PK)

0.7 P(PK)

22° 44° 67° 30° 60° 90° (c)

0.98 P (PK) 0.95 P(PK) 0.91 P(PK)

88° 113° 126° 120° 150° 180°

(a) Arbitrary Pulse Modeled as One Pulse ÉÉÉÉÉÉÉÉÉÉÉ P1 P1 (t1 −t0) + P2 (t2 − t1) = A

(b) Sine wave and Triangular Pulse ÉÉÉÉÉÉÉÉÉÉÉ (c) Fractions of the wine waves P2

(d) Arbitrary pulse modeled as multiple pulsesÉÉÉÉÉÉÉÉÉÉÉ

ÉÉÉÉÉÉÉÉÉÉÉA

(d) ÉÉÉÉÉÉÉÉÉÉÉ

t0 t1 t2 ÉÉÉÉÉÉÉÉÉÉÉ Figure 20. Models for Frequently Encountered Power Pulses

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Overload Current, IF(AV) = 2.2 A

Nominal Current, IF(AV) = 0.4 A FORWARD CURRENT FORWARD

TIME (60 Hz Frequency Waveform) Figure 21. Overload Current Conditions (for Example 5)

The general formula for converting waveforms to Table 6. GIVEN INFORMATION FOR EXAMPLE 5 equivalent square waves is to keep the total power (area) Average Power Dissipation at 0.4 A P0 0.4 W constant, while adjusting the peak power and duration (AC, RMS) (height and width). @ @ + @ Average Power Dissipation at 2.2 A P1 3.0 W TM FA PPK PAV TW (eq. 49) (AC, RMS) or Peak Power Dissipation at 2.2 A P1,peak 12 W @ (Instantaneous) PAV TW T + (eq. 50) M @ FA PPK PROCEDURE Where: Using the nominal operation, a steady state junction PAV = average power in the original waveform temperature can be calculated before the overload. The TM = pulse width of model overload can be approximated by two square power pulses: TW = time duration of original waveform one averaging the first five overload pulses, and then the FA = amplitude waveform factor sixth and final overload pulse. This will give an approximate PPK = peak power of original waveform value for the final junction temperature, and will only Results obtained from these substitutions are require the superposition of the steady state operation and approximate; higher peak power, shorter duration three step responses (average overload for five cycles, off waveforms do result in higher peak junction temperatures period before the final overload pulse, and then the final than lower peak power, longer waveforms even at the same overload pulse itself). total power dissipation.

Example 5: Maximum Junction Temperature During P2 Local Average Overload 1 Cycle Given a rectifier performing half−wave rectification on a Junction

Power and Temperature 60 Hz input, calculate the maximum junction temperature Temperature (relative to ambient) achieved after the device moves from standard operation (0.4 A peak forward current) to overload P1 (2.2 A peak forward current, see Figure 21). Assume the Average Over First 5 Cycles P0 device has reached steady state operation before the overload is applied, and that the overload current lasts for six t0 cycles. Use the thermal response in Figure 12, with 3/8” TIME t1 t2 leads. t3 Figure 22. Junction Temperature Changes (for Example 5)

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1 1 1 t + t ) @ ƪ @ * ǒt * t Ǔƫ 2 1 2 2 f 3 2

P2 1 1 1 + 83.3 ms ) @ ƪ @ * ǒ4.58 msǓƫ 2 2 60 Hz (eq. 55)

P1 − P0 Relative Power Pulses + 85.2 ms At the end of this pulse (t ), the junction will have reached P = 0 P1 3 the highest temperature for these inputs (T3). As in Example TIME t3 6, interpolation must be used to accurately estimate values t t0 1 from the thermal response (R(t) curve). This yields R(t) t2 values which may be substituted into Equation 51.

t2: +P2 Starts Table 7. INTERPOLATED R(t) VALUES FOR EXAMPLE 5

t3 = 89.8 ms R(t3) = 6.24 t −t = 4.6 ms R(t −t ) = 1.57 t0:P1−P0 Starts 3 2 3 2

t3−t1 = 6.5 ms R(t3−t1) = 1.87 TEMPERATURE

Steady State R(inf) = 34.9 TIME Solving Equation 51 yields the maximum temperature t0 t1: −P1 Starts increase. + ° T3 41.7 C Figure 23. Junction Temperature Changes (for Example 5) THERMAL RUNAWAY Rectifier switching losses and reverse leakage current + @ q ) * @ * generally increase with temperature. Power dissipation in T3 P0 JA (P1 P0) R(t3 t0) (eq. 51) the rectifier can cause the junction temperature to increase, * P @ (t * t ) ) P @ R(t * t ) 1 3 1 2 3 2 and as the junction temperature increases, the power losses The initial state is given by the average power dissipation increase. At the same time, the heat conducted, during normal operation (P0), and the steady state thermal junction−to−ambient, will increase with junction R q response (R( ), which is JA from the steady state thermal temperature. Under most conditions, the power losses, model). The second step input is an increase from the steady temperature increases, and heat conduction will stabilize, state average power to the overload power, (P1− P0), and the device can operate normally. If the power losses occurring at the time the overload starts (t0, 0 ms). The third outpace the heat conduction, and temperature increases do step input is the return from average overload to zero (−P1), not stabilize, the device is said to be in thermal runaway. In occurring before the final overload pulse (t1, 5 full cycles thermal runaway, unless some other portion of the circuit after t0, at 60 Hz). limits the rectifier current, the device temperature will 1 5 increase until the device is damaged or destroyed. t + t ) 5 @ + 0ms) + 83.3 ms (eq. 52) 1 0 f 60 Hz For a thermal system to be stable, the system must be capable of dissipating more heat than is generated. The The fourth and final input is the last overload pulse (P2 at system is at a stable operating point if the heat generated is t2), and it lasts half a cycle (until t3). This requires equal to the heat conducted out of the package, and an approximating the sinusoidal pulse as a square wave (P2 = increase in temperature will result in a greater increase in 0.91* P1,peak, with its pulse width calculated by forcing equal total power for the new pulse, and the start time heat conduction than heat generation. * calculated by centering the pulse in the first half of the final TJ Ta P (T ) + overload cycle). D J q (eq. 56) JA P + 0.91 @ P + 0.91 @ 12 W + 10.9 W (eq. 53) 2 1,peak ēP D t 1 @ @ ńf (eq. 57) PAV TW P1 1 ēT q t * t + + J JA 3 2 @ @ FA PPK FA P1,peak (eq. 54) 3W@ 1ń60 Hz + + 4.58 ms 0.91 @ 12 W

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This can be analyzed graphically [2]. If the operating curve intersections, the heat production and heat conduction points for the device are plotted (power dissipation as a are balanced, and the device is at thermal equilibrium. Not function of junction temperature), and the thermal resistance all intersections are stable. At some equilibrium points, any of the system is plotted on the same graph (using ambient extra power dissipation (from a small power transient) will temperature as the x−intercept, and 1/qJA as the slope), then cause the device to leave the stable point and enter thermal the intersections of the curves will denote the possible runaway (see Figure 24a). It is possible, with a poor operating points. At any temperature for which the combination of power level, high ambient temperature and resistance line is below the operating curve, the device system heatsinking ability, for a device to be in thermal temperature will be increasing as the device produces more runaway regardless of junction temperature. Graphically, heat than is conducted away. At any temperature for which this will occur when the operating curve and thermal the resistance line is above the operating curve, the resistance line do not intersect, or only intersect at a single temperature will be decreasing as the more heat is conducted unstable point (see Figure 24d). out of the package than is produced at the junction. At the

2.0 2.0 Unstable Operating Lower 1.6 1.6 Point TA

Device Higher 1.2 Operating 1.2 Device TA Curve Operating

(W) (W) Curve Stable 0.8 Stable Operating 0.8 Operating Point Points

0.4 0.4 Thermal

, DEVICE POWER DISSIPATION Thermal Resistance , DEVICE POWER DISSIPATION Resistance D q D

P P q (TA + TJ/ JA) (TA + TJ/ JA) 0 0 20 40 60 80 100 20 40 60 80 100 ° ° TJ, JUNCTION TEMPERATURE ( C) TJ, JUNCTION TEMPERATURE ( C) (a) (b)

2.0 2.0 Unstable Operating Stable 1.6 Point Higher 1.6 Operating q JA Point Device Lower 1.2 q Device JA 1.2 Operating Operating Curve (W) (W) Curve Unstable 0.8 Stable 0.8 Operating Operating Point Points 0.4 Thermal 0.4 Thermal , DEVICE POWER DISSIPATION Resistance , DEVICE POWER DISSIPATION Resistance D D P (T + T /q ) P (T + T /q ) 0 A J JA 0 A J JA 20 40 60 80 100 20 40 60 80 100 ° ° TJ, JUNCTION TEMPERATURE ( C) TJ, JUNCTION TEMPERATURE ( C) (c) (d)

Figure 24. Graphical Analysis of Thermal Operation (a) Finding a stable operating point (b) Effect of ambient temperature changes on thermal operation (c) Effect of junction to ambient thermal resistance changes (d) Analysis including thermal resistance and ambient temperature combinations which do not have stable operating points

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For rectifiers, leakage current, and therefore reverse bias dealing with transient voltage spikes, a more thermally power dissipation, typically follow a power−law capacitive package may also reduce the maximum relationship. junction temperature. For other rectifiers, this could T necessitate a device with a lower forward voltage drop, + @ l (eq. 58) lower reverse leakage current, or lower switching IR(T) Io e charge, depending on the application. Where: With proper thermal design, the devices will function Io = a proportionality constant particular to the rectifier reliably for the full device lifetime. l = a constant particular to the temperature dependence of the rectifier, commonly between 14 and 15. References: T 1. Roehr, Bill; and Shiner, Bryce: “Transient Thermal l Resistance General Data and Its Use.” P (T) + V @ ǒI @ e Ǔ (eq. 59) R,avg R o ON Semiconductor Application Note AN−569.

Io and l can be found experimentally for the device, or ON Semiconductor Products Inc., Phoenix, estimated from the datasheet. Using these numbers, and Arizona. Equations 56, 57, and 59, either the maximum allowable 2. Hunter, Lloyd P., et al.: Handbook of ambient temperature, minimum required thermal resistance, Semiconductor Electronics, Second Edition, or maximum junction temperature can be solved for (given Chapter 11, pages 11−81. McGraw−Hill Book Co., the other two). For forward conduction, the forward voltage Inc., New York, New York. 1962. and current would be used in place of the reverse voltage and 3. Stout, Roger: “Psi or Theta: Which One Should current to find the device operating points. In addition, the You Choose?” Power Electronics Technology, operating points for a periodic application can be estimated March 2008, pages 20−24. (ignoring switching losses) by average power dissipations 4. Stout, Roger: “General Thermal Transient RC (forward and reverse, weighted by duty cycle) and Networks.” ON Semiconductor Application Note equivalent thermal resistances (see Periodic Responses AND8214, ON Semiconductor Products Inc., discussed previously). Phoenix, Arizona. 5. Stout, Roger: “Semiconductor Package Thermal THERMAL DESIGN Characterization.” ON Semiconductor Application The datasheets for most discrete semiconductors will state Note AND8215, ON Semiconductor Products Inc., the minimum and maximum operating and storage Phoenix, Arizona. temperatures for the device; for rectifiers this is usually from 6. Stout, Roger: “Minimizing Scatter in Experimental −65°C up to 150°C or 175°C. While it is possible to operate Data Sets.” ON Semiconductor Application Note a device at the maximum junction temperature for a short AND8216, ON Semiconductor Products Inc., time, this parameter is the peak temperature the junction of Phoenix, Arizona. the device can operate at. The normal operating point of the 7. Stout, Roger: “What’s Wrong with “% Error in device junction in the application should be designed at a Junction Temperature”.” ON Semiconductor lower temperature. Operating a device at the maximum Application Note AND8217, ON Semiconductor temperature risks failure from a transient thermal spike, and Products Inc., Phoenix, Arizona. reduces the device lifetime. If the thermal characteristics of 8. Stout, Roger; and Billings, David: “How to a system are insufficient for a device, there are three basic Extend a Thermal−RC−Network Model solutions: (Derived from Experimental Data) to • Reduce qJA. Increasing the copper area around the Respond to an Arbitrarily Fast Input.” device in the board, increasing the copper thickness, ON Semiconductor Application Note adding a heatsink to the device, or increasing the AND8218, ON Semiconductor Products airflow over the device will all decrease the thermal Inc., Phoenix, Arizona. resistance to ambient and lower the junction operating 9. Stout, Roger: “How to Generate Square Wave, temperature. Constant Duty Cycle, Transient Response Curves.” • Decrease the ambient temperature. Operating the device ON Semiconductor Application Note AND8219, in a cooler environment will decrease the junction ON Semiconductor Products Inc., Phoenix, operating temperature. Arizona. • Change the device. A device with a larger die or a less 10. Stout, Roger: “How To Use Thermal Data Found

thermally resistant package may decrease the overall in Data Sheets.” ON Semiconductor Application

thermal resistance of the system. Similarly, a device Note AND8220, ON Semiconductor Products Inc., which dissipates less power in the application will also Phoenix, Arizona. operate at a lower temperature. For zener rectifiers

http://onsemi.com 20 ON Semiconductor Handbook − Basic Thermal Properties of Semiconductors

11. Stout, Roger: “Thermal RC Ladder Networks.” 13. Stout, Roger: “Predicting Thermal Runaway.” ON Semiconductor Application Note AND8221, ON Semiconductor Application Note AND8223, ON Semiconductor Products Inc., Phoenix, ON Semiconductor Products Inc., Phoenix, Arizona. Arizona. 12. Stout, Roger: “Predicting the Effect of Circuit 14. JEDEC Solid State Technology Association: Boards on Semiconductor Package Thermal Guidelines for Reporting and Using Electronic Performance.” ON Semiconductor Application Package Thermal Information. JESD51−12, Note AND8222, ON Semiconductor Products Inc., published by JEDEC Solid State Technology Phoenix, Arizona. Association 2005, Arlington, VA, May 2005.

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