Circuit Complexity

Total Page:16

File Type:pdf, Size:1020Kb

Circuit Complexity CHAPTER Circuit Complexity The circuit complexity of a binary function is measured by the size or depth of the smallest or shallowest circuit for it. Circuit complexity derives its importance from the corollary to Theorem 3.9.2; namely, if a function has a large circuit size over a complete basis of fixed fan-in, then the time on a Turing machine required to compute it is large. The importance of ≥ (n) this observation is illustrated by the following fact. For n 1, let fL be the characteristic (n) function of an NP-complete language L,wherefL has value 1 on strings of length n in L (n) and value 0 otherwise. If fL has super-polynomial circuit size for all sufficiently large n,then P = NP. In this chapter we introduce methods for deriving lower bounds on circuit size and depth. Unfortunately, it is generally much more difficult to derive good lower bounds on circuit complexity than good upper bounds; an upper bound measures the size or depth of a particular circuit whereas a lower bound must rule out a smaller size or depth for all circuits. As a consequence, the lower bounds derived for functions realized by circuits over complete bases of bounded fan-in are often weak. In attempting to understand lower bounds for complete bases, researchers have studied monotone circuits over the monotone basis and bounded-depth circuits over the basis {AND, OR, NOT} in which the first two gates are allowed to have unbounded fan-in. Formula size, which is approximately the size of the smallest circuit with fan-out 1, has also been studied. Lower bounds to formula size also produce lower bounds to circuit depth, a measure of the parallel time needed for a function. Research on these restricted circuit models has led to some impressive results. Exponential lower bounds on circuit size have been derived for monotone functions over the monotone basis and functions such as parity when realized by bounded-depth circuits. Unfortunately, the methods used to obtain these results may not apply to complete bases of bounded fan-in. Fortunately, it has been shown that the slice functions have about the same circuit size over ? both the monotone and standard (non-monotone) bases. This may help resolve the P = NP question, since there are NP-complete slice problems. Despite the difficulty of deriving lower bounds, circuit complexity continues to offer one of the methods of highest potential for distinguishing between P and NP. 391 392 Chapter 9 Circuit Complexity Models of Computation 9.1 Circuit Models and Measures In this section we characterize types of logic circuits by their bases and the fan-in and fan- out of basis elements. We consider bases that are complete and incomplete and that have bounded and unbounded fan-in. We also consider circuits in which the fan-out is restricted and unrestricted. Each of these factors can affect the size and depth of a circuit. 9.1.1 Circuit Models The (general) logic circuit is the graph of a straight-line program in which the variables have value 0 or 1 and the operations are Boolean functions g : Bp →B, p ≥ 1. (Boolean functions have one binary value. Logic circuits are defined in Section 1.2 and discussed at length in Chapter 2.) The vertices in a logic circuit are labeled with Boolean operations and are called gates; the set of different gate types used in a circuit is called the basis (denoted Ω)forthe circuit. The fan-in of a basis is the maximal fan-in of any function in the basis. A circuit computes the binary function f : Bn →Bm, which is the mapping from the n circuit inputs to the m gate outputs designated as circuit outputs. The standard basis, denoted Ω0,istheset{AND, OR, NOT} in which AND and OR have fan-in 2. The full two-input basis, denoted B2, consists of all two-input Boolean functions. a b c The dyadic unate basis, denoted U2, consists of all Boolean functions of the form (x ∧ y ) for constants a, b, c in B.Herex1 = x and x0 = x. A basis Ω is complete if every binary function can be computed by a circuit over Ω.The bases Ω0, B2,andU2 are complete, as is the basis consisting of the NAND gate computing the function x NAND y = x ∧ y. (See Problem 2.5.) The bounded fan-out circuit model specifies a bound on the fan-out of a circuit. As we shall see, the fan-out-1 circuit plays a special role related to circuit depth. Each circuit of fan-out 1 corresponds to a formula in which the operators are the functions associated with vertices of the circuit. Figure 9.1 shows an example of a circuit of fan-out 1 over the standard basis and its associated formula. (See also Problem 9.9.) Although each input variable appears once in this example, Boolean functions generally require multiple instances of variables (have fan-out greater than 1). Formula size is studied at length in Section 9.4. To define the monotone circuits, we need an ordering of binary n-tuples. Two such tuples, x =(x1, x2, ..., xn) and y =(y1, y2, ..., yn), are in the relation x ≤ y if for all 1 ≤ i ≤ n, xi ≤ yi,where0≤ 0, 1 ≤ 1, and 0 ≤ 1, but 1 ≤ 0. (Thus, 001011 ≤ 101111, but 011011 ≤ 101111.) A monotone circuit is a circuit over the monotone basis Ωmon = {AND, OR} in which the fan-in is 2. There is a direct correspondence between monotone circuits and monotone functions. A monotone function is a function f : Bn →Bm that is either monotone increasing,thatis,forallx, y ∈Bn,ifx ≤ y,thenf(x) ≤ f(y),orismonotone decreasing,thatis,forallx, y ∈Bn,ifx ≤ y,thenf(x) ≥ f(y). Unless stated explicitly, a monotone function will be understood to be a monotone increasing function. A monotone Boolean function has the following expansion on the first variable, as the reader can show. (See Problem 9.10.) A similar expansion is possible on any variable. f(x1, x2, ..., xn)=f(0, x2, ..., xn) ∨ (x1 ∧ f(1, x2, ..., xn)) By applying this expansion to every variable in succession, we see that each monotone function can be realized by a circuit over the monotone basis. Furthermore, the monotone basis Ωmon c John E Savage 9.1 Circuit Models and Measures 393 y = ((((x7 ∨ x6) ∧ (x5 ∨ x4)) ∨ x3) ∧ (x2 ∧ x1)) x3 x2 x1 x7 x6 x5 x4 Figure 9.1 A circuit of fan-out 1 over a basis with fan-in 2 and a corresponding formula. The value y at the root is the AND of the value (((x7 ∨ x6) ∧ (x5 ∨ x4)) ∨ x3) of the left subtree with the value (x2 ∧ x1) of the right subtree. is complete for the monotone functions, that is, every monotone function can be computed by a circuit over the basis Ωmon. (See Problem 2.) In Section 9.6 we show that some monotone functions on n variables require monotone circuitswhosesizeisexponentialinn. In particular, some monotone functions requiring exponential-size monotone circuits can be realized by polynomial-size circuits over the standard basis Ω0. Thus, the absence of negation can result in a large increase in circuit size. The bounded-depth circuit is a circuit over the standard basis Ω0 where the fan-in of AND and OR gates is allowed to be unbounded, but the circuit depth is bounded. The conjunctive and disjunctive normal forms and the product-of-sums and sum-of-products normal forms realize arbitrary Boolean functions by circuits of depth 2 over Ω0.(SeeSection2.3.) In these normal forms negations are used only on the input variables. Note that any circuit over the standard basis can be converted to a circuit in which the NOT gates are applied only to the input variables. (See Problem 9.11.) 9.1.2 Complexity Measures We now define the measures of complexity studied in this chapter. The depth of a circuit is the number of gates of fan-in 2 or more on the longest path in the circuit. (Note that NOT gates do not affect the depth measure.) DEFINITION 9.1.1 The circuit size of a binary function f : Bn →Bm with respect to the basis Ω, denoted CΩ(f),isthesmallestnumberofgatesinanycircuitforf over the basis Ω.Thecircuit size with fan-out s, denoted Cs,Ω(f),isthecircuitsizeoff when the circuit fan-out is limited to at most s. 394 Chapter 9 Circuit Complexity Models of Computation n m The circuit depth of a binary function f : B →B with respect to the basis Ω, DΩ(f),is the depth of the smallest depth circuit for f over the basis Ω.Thecircuit depth with fan-out s, denoted Ds,Ω(f),isthecircuitdepthoff when the circuit fan-out is limited to at most s. n The formula size of a Boolean function f : B →Bwith respect to a basis Ω, LΩ(f),isthe minimal number of input vertices in any circuit of fan-out 1 for f over the basis Ω. It is important to note the distinction between formula and circuit size: in the former the number of input vertices is counted, whereas in the latter it is the number of gates. A relationship between the two is shown in Lemma 9.2.2. 9.2 Relationships Among Complexity Measures In this section we explore the effect on circuit complexity measures of a change in either the basis or the fan-out of a circuit. We also establish relationships between circuit depth and formula size.
Recommended publications
  • On Uniformity Within NC
    On Uniformity Within NC David A Mix Barrington Neil Immerman HowardStraubing University of Massachusetts University of Massachusetts Boston Col lege Journal of Computer and System Science Abstract In order to study circuit complexity classes within NC in a uniform setting we need a uniformity condition which is more restrictive than those in common use Twosuch conditions stricter than NC uniformity RuCo have app eared in recent research Immermans families of circuits dened by rstorder formulas ImaImb and a unifor mity corresp onding to Buss deterministic logtime reductions Bu We show that these two notions are equivalent leading to a natural notion of uniformity for lowlevel circuit complexity classes Weshow that recent results on the structure of NC Ba still hold true in this very uniform setting Finallyweinvestigate a parallel notion of uniformity still more restrictive based on the regular languages Here we givecharacterizations of sub classes of the regular languages based on their logical expressibility extending recentwork of Straubing Therien and Thomas STT A preliminary version of this work app eared as BIS Intro duction Circuit Complexity Computer scientists have long tried to classify problems dened as Bo olean predicates or functions by the size or depth of Bo olean circuits needed to solve them This eort has Former name David A Barrington Supp orted by NSF grant CCR Mailing address Dept of Computer and Information Science U of Mass Amherst MA USA Supp orted by NSF grants DCR and CCR Mailing address Dept of
    [Show full text]
  • Week 1: an Overview of Circuit Complexity 1 Welcome 2
    Topics in Circuit Complexity (CS354, Fall’11) Week 1: An Overview of Circuit Complexity Lecture Notes for 9/27 and 9/29 Ryan Williams 1 Welcome The area of circuit complexity has a long history, starting in the 1940’s. It is full of open problems and frontiers that seem insurmountable, yet the literature on circuit complexity is fairly large. There is much that we do know, although it is scattered across several textbooks and academic papers. I think now is a good time to look again at circuit complexity with fresh eyes, and try to see what can be done. 2 Preliminaries An n-bit Boolean function has domain f0; 1gn and co-domain f0; 1g. At a high level, the basic question asked in circuit complexity is: given a collection of “simple functions” and a target Boolean function f, how efficiently can f be computed (on all inputs) using the simple functions? Of course, efficiency can be measured in many ways. The most natural measure is that of the “size” of computation: how many copies of these simple functions are necessary to compute f? Let B be a set of Boolean functions, which we call a basis set. The fan-in of a function g 2 B is the number of inputs that g takes. (Typical choices are fan-in 2, or unbounded fan-in, meaning that g can take any number of inputs.) We define a circuit C with n inputs and size s over a basis B, as follows. C consists of a directed acyclic graph (DAG) of s + n + 2 nodes, with n sources and one sink (the sth node in some fixed topological order on the nodes).
    [Show full text]
  • A Short History of Computational Complexity
    The Computational Complexity Column by Lance FORTNOW NEC Laboratories America 4 Independence Way, Princeton, NJ 08540, USA [email protected] http://www.neci.nj.nec.com/homepages/fortnow/beatcs Every third year the Conference on Computational Complexity is held in Europe and this summer the University of Aarhus (Denmark) will host the meeting July 7-10. More details at the conference web page http://www.computationalcomplexity.org This month we present a historical view of computational complexity written by Steve Homer and myself. This is a preliminary version of a chapter to be included in an upcoming North-Holland Handbook of the History of Mathematical Logic edited by Dirk van Dalen, John Dawson and Aki Kanamori. A Short History of Computational Complexity Lance Fortnow1 Steve Homer2 NEC Research Institute Computer Science Department 4 Independence Way Boston University Princeton, NJ 08540 111 Cummington Street Boston, MA 02215 1 Introduction It all started with a machine. In 1936, Turing developed his theoretical com- putational model. He based his model on how he perceived mathematicians think. As digital computers were developed in the 40's and 50's, the Turing machine proved itself as the right theoretical model for computation. Quickly though we discovered that the basic Turing machine model fails to account for the amount of time or memory needed by a computer, a critical issue today but even more so in those early days of computing. The key idea to measure time and space as a function of the length of the input came in the early 1960's by Hartmanis and Stearns.
    [Show full text]
  • Multiparty Communication Complexity and Threshold Circuit Size of AC^0
    2009 50th Annual IEEE Symposium on Foundations of Computer Science Multiparty Communication Complexity and Threshold Circuit Size of AC0 Paul Beame∗ Dang-Trinh Huynh-Ngoc∗y Computer Science and Engineering Computer Science and Engineering University of Washington University of Washington Seattle, WA 98195-2350 Seattle, WA 98195-2350 [email protected] [email protected] Abstract— We prove an nΩ(1)=4k lower bound on the random- that the Generalized Inner Product function in ACC0 requires ized k-party communication complexity of depth 4 AC0 functions k-party NOF communication complexity Ω(n=4k) which is in the number-on-forehead (NOF) model for up to Θ(log n) polynomial in n for k up to Θ(log n). players. These are the first non-trivial lower bounds for general 0 NOF multiparty communication complexity for any AC0 function However, for AC functions much less has been known. for !(log log n) players. For non-constant k the bounds are larger For the communication complexity of the set disjointness than all previous lower bounds for any AC0 function even for function with k players (which is in AC0) there are lower simultaneous communication complexity. bounds of the form Ω(n1=(k−1)=(k−1)) in the simultaneous Our lower bounds imply the first superpolynomial lower bounds NOF [24], [5] and nΩ(1=k)=kO(k) in the one-way NOF for the simulation of AC0 by MAJ ◦ SYMM ◦ AND circuits, showing that the well-known quasipolynomial simulations of AC0 model [26]. These are sub-polynomial lower bounds for all by such circuits are qualitatively optimal, even for formulas of non-constant values of k and, at best, polylogarithmic when small constant depth.
    [Show full text]
  • Lecture 13: Circuit Complexity 1 Binary Addition
    CS 810: Introduction to Complexity Theory 3/4/2003 Lecture 13: Circuit Complexity Instructor: Jin-Yi Cai Scribe: David Koop, Martin Hock For the next few lectures, we will deal with circuit complexity. We will concentrate on small depth circuits. These capture parallel computation. Our main goal will be proving circuit lower bounds. These lower bounds show what cannot be computed by small depth circuits. To gain appreciation for these lower bound results, it is essential to first learn about what can be done by these circuits. In next two lectures, we will exhibit the computational power of these circuits. We start with one of the simplest computations: integer addition. 1 Binary Addition Given two binary numbers, a = a1a2 : : : an−1an and b = b1b2 : : : bn−1bn, we can add the two using the elementary school method { adding each column and carrying to the next. In other words, r = a + b, an an−1 : : : a1 a0 + bn bn−1 : : : b1 b0 rn+1 rn rn−1 : : : r1 r0 can be accomplished by first computing r0 = a0 ⊕ b0 (⊕ is exclusive or) and computing a carry bit, c1 = a0 ^ b0. Now, we can compute r1 = a1 ⊕ b1 ⊕ c1 and c2 = (c1 ^ (a1 _ b1)) _ (a1 ^ b1), and in general we have rk = ak ⊕ bk ⊕ ck ck = (ck−1 ^ (ak _ bk)) _ (ak ^ bk) Certainly, the above operation can be done in polynomial time. The main question is, can we do it in parallel faster? The computation expressed above is sequential. Before computing rk, one needs to compute all the previous output bits.
    [Show full text]
  • Parameterized Circuit Complexity and the W Hierarchy
    View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by Elsevier - Publisher Connector Theoretical Computer Science ELSEVIER Theoretical Computer Science 191 (1998) 97-115 Parameterized circuit complexity and the W hierarchy Rodney G. Downey a, Michael R. Fellows b,*, Kenneth W. Regan’ a Department of Mathematics, Victoria University, P.O. Box 600, Wellington, New Zealand b Department of Computer Science, University of Victoria, Victoria, BC, Canada V8W 3P6 ‘Department of Computer Science, State University of New York at Buffalo, 226 Bell Hall, Buffalo, NY 14260-2000 USA Received June 1995; revised October 1996 Communicated by M. Crochemore Abstract A parameterized problem (L,k) belongs to W[t] if there exists k’ computed from k such that (L, k) reduces to the weight-k’ satisfiability problem for weft-t circuits. We relate the fundamental question of whether the w[t] hierarchy is proper to parameterized problems for constant-depth circuits. We define classes G[t] as the analogues of AC0 depth-t for parameterized problems, and N[t] by weight-k’ existential quantification on G[t], by analogy with NP = 3 . P. We prove that for each t, W[t] equals the closure under fixed-parameter reductions of N[t]. Then we prove, using Sipser’s results on the AC0 depth-t hierarchy, that both the G[t] and the N[t] hierarchies are proper. If this separation holds up under parameterized reductions, then the kF’[t] hierarchy is proper. We also investigate the hierarchy H[t] defined by alternating quantification over G[t].
    [Show full text]
  • Time, Hardware, and Uniformity
    This is page Printer Opaque this Time Hardware and Uniformity David Mix Barrington Neil Immerman ABSTRACT We describ e three orthogonal complexity measures parallel time amount of hardware and degree of nonuniformity which together parametrize most complexity classes Weshow that the descriptive com plexity framework neatly captures these measures using three parameters quantier depth number of variables and typ e of numeric predicates re sp ectively A fairly simple picture arises in which the basic questions in complexity theory solved and unsolved can b e understo o d as ques tions ab out tradeos among these three dimensions Intro duction An initial presentation of complexity theory usually makes the implicit as sumption that problems and hence complexity classes are linearly ordered by diculty In the Chomsky Hierarchyeach new typ e of automaton can decide more languages and the Time Hierarchy Theorem tells us that adding more time allowsaTuring machine to decide more languages In deed the word complexity is often used eg in the study of algorithms to mean worstcase Turing machine running time under which problems are linearly ordered Those of us who study structural complexityknow that the situation is actually more complicated For one thing if wewant to mo del parallel com putation we need to distinguish b etween algorithms whichtakethesame amountofwork ie sequential time wecarehowmany pro cesses are op erating in parallel and howmuch parallel time is taken These two dimen sions of complexity are identiable in all the usual mo
    [Show full text]
  • Circuit Complexity Contents 1 Announcements 2 Relation to Other
    CS221: Computational Complexity Prof. Salil Vadhan Lecture 19: Circuit Complexity 11/6 Scribe: Chris Crick Contents 1 Announcements ² Problem Set 3, problem 2: You may use ², the regular expression for the empty string. ² PS3 due tomorrow. ² Be aware that you do not necessarily have to solve all of the problems on the problem set — the point is to get you to think about them. ² Reading: Papadimitriou x4.3, x11.4 2 Relation to other complexity measures Definition: The circuit complexity or circuit size of a function f : f0; 1gn ! f0; 1g is the number of gates in the smallest boolean circuit that computes f. Circuit complexity depends our choice of a universal basis, but only up to a constant. We can therefore use any such basis to represent our circuit. Because it’s familiar and convenient, then, we will usually use AND, OR and NOT, though sometimes the set of all boolean functions of two inputs and one output is more natural. Example: To provide a sense for how one programs with circuits, we will examine the thresh- 1 if at least two x s are 1 old function Th (x ; ¢ ¢ ¢ ; x ) = f i g. Figure 1 shows a simple circuit to 2 1 n 0 otherwise compute this function. In this circuit, li = 1 if at least one of (x1; : : : ; xi) = 1. ri becomes 1 once two xis equal 1. li is just xi _ li¡1, and ri is ri¡1 _ (li¡1 ^ xi). The output node is rn. Conventions for counting circuit gates vary a little – for example, some people count the inputs in the total, while others don’t.
    [Show full text]
  • Circuit Complexity and Computational Complexity
    Circuit Complexity and Computational Complexity Lecture Notes for Math 267AB University of California, San Diego January{June 1992 Instructor: Sam Buss Notes by: Frank Baeuerle Sam Buss Bob Carragher Matt Clegg Goran Gogi¶c Elias Koutsoupias John Lillis Dave Robinson Jinghui Yang 1 These lecture notes were written for a topics course in the Mathematics Department at the University of California, San Diego during the winter and spring quarters of 1992. Each student wrote lecture notes for between two and ¯ve one and one half hour lectures. I'd like to thank the students for a superb job of writing up lecture notes. January 9-14. Bob Carragher's notes on Introduction to circuit complexity. Theorems of Shannon and Lupanov giving upper and lower bounds of circuit complexity of almost all Boolean functions. January 14-21. Matt Clegg's notes on Spira's theorem relating depth and formula size Krapchenko's lower bound on formula size over AND/OR/NOT January 23-28. Frank Baeuerle's notes on Neciporuk's theorem Simulation of time bounded TM's by circuits January 30 - February 4. John Lillis's notes on NC/AC hierarchy Circuit value problem Depth restricted circuits for space bounded Turing machines Addition is in NC1. February 6-13. Goran Gogi¶c's notes on Circuits for parallel pre¯x vector addition and for symmetric functions. February 18-20. Dave Robinson's notes on Schnorr's 2n-3 lower bound on circuit size Blum's 3n-o(n) lower bound on circuit size February 25-27. Jinghui Yang's notes on Subbotovskaya's theorem Andreev's n2:5 lower bound on formula size with AND/OR/NOT.
    [Show full text]
  • BQP and the Polynomial Hierarchy∗
    BQP and the Polynomial Hierarchy∗ Scott Aaronson† MIT ABSTRACT 1. INTRODUCTION The relationship between BQP and PH has been an open A central task of quantum computing theory is to un- problem since the earliest days of quantum computing. We derstand how BQP—Bounded-Error Quantum Polynomial- present evidence that quantum computers can solve prob- Time, the class of all problems feasible for a quantum computer— lems outside the entire polynomial hierarchy, by relating this fits in with classical complexity classes. In their original question to topics in circuit complexity, pseudorandomness, 1993 paper defining BQP, Bernstein and Vazirani [9] showed #P 1 and Fourier analysis. that BPP BQP P . Informally, this says that quan- ⊆ ⊆ First, we show that there exists an oracle relation problem tum computers are at least as fast as classical probabilistic (i.e., a problem with many valid outputs) that is solvable in computers and no more than exponentially faster (indeed, BQP, but not in PH. This also yields a non-oracle relation they can be simulated using an oracle for counting). Bern- problem that is solvable in quantum logarithmic time, but stein and Vazirani also gave evidence that BPP = BQP, 6 not in AC0. by exhibiting an oracle problem called Recursive Fourier Ω(log n) Second, we show that an oracle decision problem separat- Sampling that requires n queries on a classical com- ing BQP from PH would follow from the Generalized Linial- puter but only n queries on a quantum computer. The Nisan Conjecture, which we formulate here and which is evidence for the power of quantum computers became dra- likely of independent interest.
    [Show full text]
  • 1 Circuit Complexity
    CS 6743 Lecture 15 1 Fall 2007 1 Circuit Complexity 1.1 Definitions A Boolean circuit C on n inputs x1, . , xn is a directed acyclic graph (DAG) with n nodes of in-degree 0 (the inputs x1, . , xn), one node of out-degree 0 (the output), and every node of the graph except the input nodes is labeled by AND, OR, or NOT; it has in-degree 2 (for AND and OR), or 1 (for NOT). The Boolean circuit C computes a Boolean function f(x1, . , xn) in the obvious way: the value of the function is equal to the value of the output gate of the circuit when the input gates are assigned the values x1, . , xn. The size of a Boolean circuit C, denoted |C|, is defined to be the total number of nodes (gates) in the graph representation of C. The depth of a Boolean circuit C is defined as the length of a longest path (from an input gate to the output gate) in the graph representation of the circuit C. A Boolean formula is a Boolean circuit whose graph representation is a tree. Given a family of Boolean functions f = {fn}n≥0, where fn depends on n variables, we are interested in the sizes of smallest Boolean circuits Cn computing fn. Let s(n) be a function such that |Cn| ≤ s(n), for all n. Then we say that the Boolean function family f is computable by Boolean circuits of size s(n). If s(n) is a polynomial, then we say that f is computable by polysize circuits.
    [Show full text]
  • On AC0[⊕] and Variants of the Majority Function
    Electronic Colloquium on Computational Complexity, Report No. 133 (2019) More on AC0[⊕] and Variants of the Majority Function Nutan Limaye∗ Srikanth Srinivasan y Utkarsh Tripathi z Abstract In this paper we prove two results about AC0[⊕] circuits. 1=d2 • We show that for d(N) = o(plog N= log log N) and N ≤ s(N) ≤ 2dN there is an N explicit family of functions ffN : f0; 1g ! f0; 1gg such that 0 { fN has uniform AC formulas of depth d and size at most s; 0 " { fN does not have AC [⊕] formulas of depth d and size s , where " is a fixed absolute constant. This gives a quantitative improvement on the recent result of Limaye, Srinivasan, Sreenivasaiah, Tripathi, and Venkitesh, (STOC, 2019), which proved a similar Fixed- Ω(d) Depth Size-Hierarchy theorem but for d log log N and s exp(N 1=2 ). As in the previous result, we use the Coin Problem to prove our hierarchy theorem. Our main technical result is the construction of uniform size-optimal formulas for solving O(d) the coin problem with improved sample complexity (1/δ)d+4 (down from (1/δ)2 in the previous result). • In our second result, we show that randomness buys depth in the AC0[⊕] setting. Formally, we show that for any fixed constant d ≥ 2, there is a family of Boolean functions that has polynomial-sized randomized uniform AC0 circuits of depth d but no polynomial-sized (deterministic) AC0[⊕] circuits of depth d. Previously Viola (Computational Complexity, 2014) showed that an increase in depth (by at least 2) is essential to avoid superpolynomial blow-up while derandomizing randomized AC0 circuits.
    [Show full text]