Slovak University of Technology in Bratislava Institute of Information Engineering, Automation, and Mathematics
PROCEEDINGS 17th International Conference on Process Control 2009 Hotel Baník, Štrbské Pleso, Slovakia, June 9 – 12, 2009 ISBN 978-80-227-3081-5 http://www.kirp.chtf.stuba.sk/pc09
Editors: M. Fikar and M. Kvasnica
Ježek, O., Balda, P.: An Embedded Multifunction Board for Automatic Control Applications, Editors: Fikar, M., Kvasnica, M., In Proceedings of the 17th International Conference on Process Control ’09, Štrbské Pleso, Slovakia, 484–490, 2009.
Full paper online: http://www.kirp.chtf.stuba.sk/pc09/data/abstracts/039.html 17th International Conference on Process Control 2009 June 9–12, 2009, Strbskˇ e´ Pleso, Slovakia Po-Th-6, 039.pdf
AN EMBEDDED MULTIFUNCTION BOARD FOR AUTOMATIC CONTROL APPLICATIONS
O. Jeˇzek ∗, and P. Balda ∗
∗ University of West Bohemia in Pilsen, Faculty of Applied Sciences, Department of Cybernetics, Univerzitni 22, Pilsen, Czech Republic fax : +420 377 632 502 and e-mails : ojezek,pbalda @kky.zcu.cz { }
Abstract: This paper describes basic features of an universal embedded board developed in our university. After a brief summarization of the board hardware design, the paper focuses on presented software architecture solution. The modular firmware structure based on input/output driver model and a real time operating system (FreeRTOS in our case) is explained and the usage of the software development kit (SDK) plugged-in the Eclipse development platform is shown. Moreover, a recently developed technique for automatic generation of advanced control algoritms has been ported to this platform. This technique called MicroREX is based on the Micro RexLib function block library. Software generation is demonstrated on two examples.
Keywords: embedded systems, ARM, industrial communications, automatic control, function block, Simulink, REX control system.
1. INTRODUCTION But development and especially maintenance of more complex real-time control applications is There are not many universal embedded control not a simple task. Recently a powerful technique devices having open architecture which are suit- for automatic control code generation from func- able for automatic control applications with rich tion block diagrams has been developed in Balda communication capabilities. That is why Georgiev (2007). The main ideas of this technique, which (Georgiev (2007)) developed his own hardware has been ported to the ARM platform, are pre- solution. The hardware features are summarized sented in section 6. in section 2. Overall application design process is demon- First software applications for board tests have strated on an example in section 7. been developed in the diploma project Jeˇzek (2008). But more serious and systematic firmware development technique is described in section 3. It 2. HARDWARE SPECIFICATION is based on the software development kit (SDK) (section 4) containing libraries and header files of At the beginning of the hardware design phase, application programming interface (API). Section there were several requirements: 5 deals with convenient development tools for Rich communication capabilities for very maximum simplicity and efficiency of application • good interconnection and interoperability – software development. ZigBee wireless communication, Ethernet, Techniques from sections 3-5 can be used for cre- USB, RS232, RS485, CAN. ating of general embedded applications using the Universal direct inputs and outputs for pro- board, including automatic control applications. • cess and machine control applications –
484 17th International Conference on Process Control 2009 June 9–12, 2009, Strbskˇ e´ Pleso, Slovakia Po-Th-6, 039.pdf
Power Digital Circuit Power Circuit GPIO Relay GPO External supply 6 - 12V AC/DC USB • 4 battery pack Ni-Mh 4,8V USB • RS232 USB MCU • RS485 BAT
Debug Communication interfaces LED Charge Ethernet RS232 2x - serial line in the RS232 standard 6 -12V • CAN RS485 - serial line in the RS485 standard AC/DC • LCD ZigBee multiplexed with one RS232 SPI USB in device mode SD SD • ZigBee wireless communication module sup- Thermo • porting several operation modes EEPROM ZigBee virtual serial line mode, for con- · nection of two modules Optocoupler DC-DC ZigBee mesh mode, for connection of · several modules in master/slave protocol Analog diff GPI Ethernet 100Mb/s Analog s.e. • Controller Area Network (CAN) Themocoupler • AD Analog s.e. DA Thermocoupler Digital Inputs/Outputs (GPIO, GPI, GPO)
Analog Circuit RTD PT100 Magnetic relay 2x 250V/4A • Optical switch AC/DC 400mA/250V • Fig. 1. Hardware structure of the board Straight digital I/O 3.3V TTL compatible • Opto-isolated digital inputs • digital inputs and outputs, analog, RTD and thermocouple inputs, analog output, etc. Analog Inputs/Outputs The final hardware structure of the board de- Analog output 0 4V or -2V 2V, 13bit signed by Georgiev (2007) is depicted in Fig. 1. • resolution ÷ ÷ Fig. 2 is the photography of the manufactured Analog voltage differential input, 1kHz filter board. • input PT100 input • Microcontroller (MCU) 2x analog voltage single ended 0 4V • or 2x thermocouple of the J/K type÷ AT91SAM7XC512@48MHz • • ARM7TDMI® processor Configuration of each single ended analog input · 512kB of FLASH memory or thermocouple is done during the final stage of · 256kB of SRAM memory production. · many on chip integrated peripheries · Other Reset circuitry Small graphic LCD display interface • Internal on chip reset controller • External reset button • 3. FIRMWARE ARCHITECTURE
Generally, the board can be equipped with arbi- trary firmware written for the given processor and used peripheries using several available assembler and/or C-language compilers, e.g. IAR C/C++ Compiler for AMR, Keil C/C++, GNU C/C++, etc. A User can start from scratch or follow the instructions of recommended development tools at the processor producer web site (Atmel (2009)). For maximum user convenience and speeding up the application development, we decided to imple- Fig. 2. Photography of the embedded board ment a software development kit (SDK) for our
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interface. This interface can also be used for SDK most hardware drivers (see below). The I/O sys- BSP Drivers tem is based on the idea of virtual file system. Board specific Character Special Moreover, I/O system functions are mapped to Low Level Init RS232 LED RS485 A/D Converter standard C-language input/output. ISR ZigBee D/A Converter Hardware Drivers are libraries which support USB UART SPI Operating system CAN onboard hardware devices (e.g. RS232 line or Socket PWM A/D converter). Drivers handle device inter- FreeRTOS Ethernet Power supply ZigBee GPIO rupts (hide them to the user) and usually im- IO System Timers plement I/O system interface because of unified Block File IO Perf. Counter SD Card access to various devices. Standard C IO EEPROM Libraries are the other miscellaneous libraries LCD which can be used for development of the SDK Libraries Modbus based applications, e.g. Ring buffer, Modbus, etc. CAN Open
Ring Buffer Hardware drivers can be further (more detailed) divided into four groups corresponding to the Linked List device type: Character – for character oriented devices such Fig. 3. SDK modular architecture as RS232, RS485, USB, ZigBee in virtual serial board. Real-time operating system issues are cru- line mode, cial for predictable behavior of automatic control Socket – for BSD socket oriented devices such as applications. At present, there are many operating Ethernet or ZigBee in the mesh mode, systems for embedded applications with various Block – for block oriented devices such as disks functionalities implemented. For the present ver- (SD Card, EEPROM, LCD), sion of SDK, FreeRTOS (FreeRTOS (2009)) has Special – for devices not conforming to any pre- been chosen. FreeRTOS has very small memory vious category (timers, LED, A/D and D/A footprint but also a limited functionality. It pri- converters, General Purpose I/O (GPIO), Pulse marily implements preemptive task scheduler but Width Modulation (PWM) outputs, Serial Pe- neither interrupt handling services nor input/out- ripheral Interface (SPI), Controller Area Net- put system interface. Therefore, both functionali- work (CAN). ties has been implemented into our SDK. SDK development is a long run work. At present, BSP, OS and I/O system libraries has been devel- 4. SOFTWARE DEVELOPMENT KIT (SDK) oped. The development states of hardware drivers are the following: Simply said, our SDK is a zip file containing three Finished : RS232, RS485, GPIO, LED, Zigbee folders: in serial line mode. doc – SDK documentation in several formats Being tested : Ethernet, A/D and D/A Con- (compiled HTML *.chm and portable docu- verter, Performance Counter, SPI, Power Sup- ment format *.pdf) ply. inc – C-Language header files *.h Planned : ZigBee in mesh mode, CAN, PWM, lib – Compiled libraries *.a Timers, all block drivers. Architecture of SDK is modular, each module Note that SDK is distributed without source code is represented by at least single header file and because it contains large parts of code developed exactly one library file. SDK modules are divided without any public or grant support. However, into four categories (see Fig. 3) according to their source code organization corresponds to individ- characters: ual libraries mentioned. Board Support Package (BSP) provides board interface for board abstraction. Microcontroler specific functionality and interrupt handling in- 5. DEVELOPMENT TOOLS terface are provided by BSP. Operating System (OS) category contains the The present version of SDK is compiled with IAR particular operating system kernel libraries. For Systems C/C++ compiler for ARM (IAR (2009)). our case of FreeRTOS, also interrupt handling This compiler and the corresponding linker is extension routines are included. used for applications building process. Compiler Input/Output System (I/O system) libraries and linker (and the other tools) can be called implement standard device and file handling from command line or IAR Embedded Workbench
486 17th International Conference on Process Control 2009 June 9–12, 2009, Strbskˇ e´ Pleso, Slovakia Po-Th-6, 039.pdf
Eclipse Plugins SDK Help Project Compiler Templates Toolchain
New Project Wizard SDK headers
FreeRTOS User application Library written in C Driver Libraries Util Libraries Debugger Output
Jtag USB boot loader Process Board
Fig. 5. SDK wizard driver selection page
Configuration selection page, which enables Fig. 4. Board development environment • to choose the generation of Debug or Release or both versions of the project. IDE (integrated development environment) can be After finishing the project wizard, it generates the used. project settings containing among other things the IAR Embedded Workbench is not a very con- list of required static libraries. The following files venient development environment compared with are generated automatically: the best development environments in the market config.h – File containing definitions of which as Visual Studio, Eclipse or NetBeans. Therefore, drivers (libraries) are included and which are we chose Eclipse platform due to its adaptability excluded from the firmware. The example of using plug-ins. The brief structure of our develop- this file, which corresponds to the drivers se- ment environment is depicted in Fig. 4. lections in Ffig. 5, is depicted in Fig. 6. Eclipse IDE has been extended by a special plug- sysConfig.c – File containing the initialization in to facilitate the board application development. sequence of all SDK drivers and libraries. Ini- This plug-in can be used for generation of empty tialization depends on conditional variables de- projects supporting all tools necessary for the fined in the config.h file. File sysConfig.c board application development. The plug-in can should not be modified by the user. also be used for development of existing and/or
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#i f n d e f CONFIG H /∗ standard headers ∗/ #d e f i n e CONFIG H #i n c l u d e #i n c l u d e /∗ Power driver ∗/ #define CONF PWR 1 /∗ SDK headers ∗/ #i n c l u d e
/∗ Analog drivers ∗/ f o r ( ; ; ) { #define CONF ADC 0 /∗ Read data , #define CONF DAC 0 wait indefinitely ∗/ read(ttyZB, &data , #define CONF STD ON TTYS0 1 sizeof(uint32 t ) ) ;
#e n d i f /∗CONFIG H ∗/ /∗ Write message to std out ∗/ printf(”Redirect data: %d”, data ) ; Fig. 6. Example of config.h file /∗ wait ∗/ as a FreeRTOS task with the highest possible vTaskDelay (DELAY MS) ; priority. Other FreeRTOS tasks can be created from the main function. } }
Fig. 7. Example: sending ZigBee data to standard output 6. ADVANCED CONTROL ALGORITHMS 7. MICRO REX EXAMPLE
The technique described in the previous sections Automatic generation of controls algorithm is allows the programmer to develop wide range of demonstrated on the example depicted in Fig. 8 applications for our board, e.g. communication stored in Matlab-Simulink model file (.mdl) 1 . applications, user interface application and also Note that the example uses an advanced sliding real-time control applications. The common fea- mode heating/cooling controller with autotuner ture of this technique is hand writing of all the (SMHCCA, see Schlegel and Mertl (2006), REX code, except the automatically generated applica- Controls (2008)). tion template. The model file from Fig. 8 is processed by Rex- However, manual editing of control algorithms is Comp (the REX control system compiler), which a very error prone (and annoying) process. Much generates the C-language source code (.c) con- more convenient is to design especially advanced taining three functions: control algorithms in some graphical environment, e.g. in Matlab Simulink. Consequently, an auto- InitControlAlgorithm() – function for initial- matic generation technique of C-language source ization of function block data structures, setting code from the function block diagram designed configured function blocks parameters and run- in Matlab Simulink (or RexDraw) has been devel- ning initialization functions of each particular oped (Balda (2007)). This technique was slightly block in the control algorithm. enhanced a year later and ported to B&R Au- MainControlAlgorithm() – function implement- tomation PLCs (Balda and Schlegel (2008)). The ing single execution of the control algorithm. same technique is now also available for our board This function should be called periodically with in the form of C-language static library and set of the period specified in the SLEEP block (in header files. It supports almost 90 different func- tion blocks from more than 130 function blocks of 1 The .mdl files can be also created by the RexDraw the REX control system (REX Controls (2008)). program, which is the design environment of REX.
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All three functions respects the block order per- SMHCCA for ARM board SLEEP formed by RexComp. Usage of the automati- [H] y sp UP mv u cally generated functions is demonstrated on the DN CNR_sp mve [C] [pv] pv de PWM main() function in Fig. 9. In this case, each con- SAT isv y hv trol period the SMHCCA controller process variable t_ukp CNR_hv t_ukm 0 Y MAN t_sk is printed to the standard output. Code of the CNB_MAN t_pv t_dpv Y TMODE three functions Init/Main/ExitControlAlgorithm t_d2pv 0 CNBTMODE TBSY Y TUNE TE is not presented here for brevity reasons. MP_TUNE ite p1 0 Y TBRK p2 MP_TBRK p3 Y TAFF p4 CNB_TAFF p5 p6 y ips 8. CONCLUSIONS CNI_ips SMHCCA The paper presents a new board designed for Process model 0 [H] u y embedded automatic control and rich communica- MDL u1 y u y u1 u2 y [pv] tion applications. Especially the designed software MDL2 u2 [C] u y ADD ADD1 (firmware) architecture is introduced based on the MDL1 u1 y u2 developed SDK and its integration to Eclipse IDE. ADD2 y Scope The MicroREX technique (formerly called Micro CNR1 RexLib) can be used for the development of ad- Fig. 8. Control algorithm example in Simulink vanced control strategies. The authors believe that the proposed method- Fig. 8). This function sequentially calls main ology is suitable for education of automatic con- functions of particular blocks and implements trol algorithm implementation aspects, embedded the flow of signals (block connections, ”wires”) and real-time micro-controller programming. The in the control algorithm. approach will be used for teaching more than ExitControlAlgorithm() – termination function 100 students in the ”Embedded control systems” of the control algorithm. This function sequen- course in the Faculty of Applied Sciences at the tially calls the termination functions of the par- University of West Bohemia in Pilsen, Czech Re- ticular blocks in the algorithm. public.
#include ”config.h” #i n c l u d e The work has been supported by Czech Min- #include ”BlkMacrs.h” istry of Industry and Trade, project No. MPO #include ”AppMacrs.h” FI-IM5/030. This support is gratefully acknowl- edged. #i n c l u d e ”fbSMHCCA. h”
extern ds SMHCCA SMHCCA;
const portTickType References tickPeriod = 100; // 0.1 [s] Atmel. Atmel web page: http://www.atmel.com. i n t main ( ) 2009. P. Balda. Automatic conversion of advanced { InitControlAlgorithm (); control algorithms of the REX control system to various embedded platforms of microcon- lastWakeTime = xTaskGetTickCount() trollers. In Automatizace, regulace a procesy (in tickPeriod + 1; − while ( 1 ) Czech), pages 47–54, Prague, 2007. Dimart. P. Balda and M. Schlegel. BRRexLib – Function { vTaskDelayUntil(&lastWakeTime , block library for B&R Automation PLCs. In tickPeriod ); Process Control 2008, pages 1–7, Kouty nad Desnou, 2008. University of Pardubice. MainControlAlgorithm (); printf(”%.6f r n ” , SMHCCA. pv ) ; FreeRTOS. The FreeRTOS.org Project web page: \ \ http://www.freertos.org. 2009. } V. Georgiev. Atmel ARM based embedded board ExitControlAlgorithm (); hardware design. Partially financed by MATEO } ”Industrial Controllers” subproject, 2007. IAR. IAR Systems web page: Fig. 9. MicroREX application main function http://www.iar.com. 2009.
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O. Jeˇzek. Controller for embedded control applica- tions: Basic design. Diploma project (in Czech). 2008. REX Controls. Function blocks of the REX system – Reference Guide (in Czech). REX Controls, Pilsen, Czech Republic, 2008. M. Schlegel and J. Mertl. New control strategies for heating/cooling processes. In Process Con- trol 2006, pages 1–12, Pardubice, 2006. Univer- sity of Pardubice. ISBN 80-7194-860-8.
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