Single Chip Microcomputers

Single chip microcomputers

Components of a microprocessor/controller • CPU: Central Processing Unit • I/O: Input /Output • Bus: Address bus & Data bus • Memory: RAM & ROM • Timer • Interrupt • Serial Port • Parallel Port

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General-purpose microprocessor o CPU for Computers o Commonly no RAM, ROM, I/O on CPU chip itself

Many chips on motherboard Data Bus CPU General- Serial Purpose I/O RAM ROM Timer COM Micro- Port processor Port

Address Bus 3

Microcontroller

• A single-chip computer • On-chip RAM, ROM, I/O ports... • Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC 16X

CPU RAM ROM A single chip Serial I/O Timer COM Port Port Microcontroller 4

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Microprocessor Microcontroller • CPU is stand-alone, RAM, • CPU, RAM, ROM, I/O and timer ROM, I/O, timer are separate are all on a single chip • designer can decide on the • fixed amount of on-chip ROM, amount of ROM, RAM and RAM, I/O ports I/O ports. • for applications in which cost, • expensive power and space are critical • versatility • single-purpose (control- • general-purpose oriented) • High processing power • Low processing power • High power consumption • Low power consumption • Instruction sets focus on • Bit-level operations processing-intensive • Instruction sets focus on control operations and bit-level operations • Typically 32/64 – bit • Typically 8/16 bit • Typically deep pipeline (5-20 • Typically single-cycle/two-stage stages) pipeline 5

Some Popular Microcontrollers… • 8051 series • Microchip Technology PIC • Atmel AVR • Texas Instruments MSP430 (16-bit)

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8051 Microcontroller

• 8051 microcontroller is an 8-bit family of microcontroller is developed by the Intel in the year 1981. This is one of the popular families of microcontroller are being used all across the world. This microcontroller was moreover referred as “system on a chip” since it has 128 bytes of RAM, 4Kbytes of a ROM, 2 Timers, 1 Serial port, and 4 ports on a single chip. The CPU can also work for 8bits of data at a time since 8051 is an 8-bit processor. In case the data is bigger than 8 bits, then it has to be broken into parts so that the CPU can process easily. Most manufacturers contain put 4Kbytes of ROM even though the number of ROM can be extended up to 64 K bytes. 7

8051 Microcontroller

• The 8051 is easy to integrate into a project or make a device approximately. The following are the major areas of focus: • Energy Management: Efficient metering systems facilitate in controlling energy usage in homes and manufacturing applications. These metering systems are prepared capable by incorporating microcontrollers. • Touch screens: A high number of microcontroller providers incorporate touch-sensing capabilities in their designs. Portable electronics such as cell phones, media players and gaming devices are examples of microcontroller-based touch screens. • Automobiles: The 8051 finds wide taking in providing automobile solutions. They are broadly used in hybrid vehicles to handle engine variants. Furthermore, functions such as cruise control and anti-brake system have been prepared more capable with the use of microcontrollers. • Medical Devices: Moveable medical devices such as blood pressure and glucose monitors use microcontrollers will to show data, thus provided 8 that higher reliability in providing medical results.

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PIC Microcontroller

• Peripheral Interface Controller (PIC) is microcontroller developed by a Microchip, PIC microcontroller is fast and simple to implement program when we contrast other microcontrollers like 8051. The ease of programming and simple to interfacing with other peripherals PIC become successful microcontroller. • The PIC is a microcontroller which consists of RAM, ROM, CPU, timer, counter, ADC, DAC. PIC Microcontroller also support the protocols like CAN, SPI, UART for an interfacing with additional peripherals. PIC mostly used to modify Harvard architecture and also supports RISC by the above requirement RISC and Harvard we can simply that PIC is faster than the 8051 based controllers which is prepared up of Von-Newman architecture. 9

AVR Microcontroller

• AVR microcontroller was developed in the year of 1996 by Atmel Corporation. The structural design of AVR was developed by the Alf-Egil Bogen and Vegard Wollan. AVR derives its name from its developers and stands for Alf-Egil Bogen Vegard Wollan RISC microcontroller (a.k.a. Advanced Virtual RISC. The AT90S8515 was the initial microcontroller which was based on the AVR architecture, though the first microcontroller to hit the commercial market was AT90S1200 in the year 1997. • There are three categories of AVR Microcontrollers: • TinyAVR – less memory, small size, appropriate just for simpler applications • MegaAVR – most popular, good quantity of memory (up to 256 KB), higher number of inbuilt peripherals and appropriate for modest to complex applications. • XmegaAVR – for commercial, complex applications, which need large program memory and high speed. 10

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ARM Processor

• An ARM processor is also one of a family of CPUs based on the RISC (reduced instruction set computer) architecture developed by Advanced RISC Machines (ARM). • An ARM makes at 32-bit and 64-bit RISC multi-core processors. RISC processors are designed to perform a smaller number of types of computer instructions so that they can operate at a higher speed, performing extra millions of instructions per second (MIPS). • ARM processors are widely used in customer electronic devices such as smart phones, tablets, multimedia players and other mobile devices, such as wearables. Because of their reduced to instruction set, they need fewer transistors, which enable a smaller die size of the integrated circuitry. The ARM processors, smaller size reduced difficulty and lower power expenditure makes them suitable for 11 increasingly miniaturized devices.

Comparison of Features

8051 PIC AVR ARM

8-bit for 32-bit mostly also Bus width 8/16/32-bit 8/32-bit standard core available in 64-bit

UART, USART, UART, USART, LIN, PIC, UART, SPI, I2C, Communica- I2C, SPI, CAN, USB, UART, USART, USART, LIN, special tion Ethernet, I2S, DSP, SPI, I2C CAN, Ethernet, purpose AVR SAI (serial audio Protocols SPI, I2S support CAN, interface), IrDA USB, Ethernet Speed 12 CPI 4 CPI 1 CPI 1 CPI ROM, SRAM, SRAM, Flash, SRAM, Flash, SDRAM, Memory FLASH FLASH EEPROM EEPROM Power 12 Consumptio Average Low Low Low n

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Comparison of Features

8051 PIC AVR ARM Some feature ISA CLSC RISC RISC of RISC Von Memory Harvard Modified Harvard Neumann Modified Architecture architecture architecture architecture Tiny, Atmega, PIC16,PIC17, Xmega, ARMv4,5,6,7 and Families 8051 variants PIC18, special series PIC24, PIC32 purpose AVR Community Vast Very Good Very Good Vast

High speed Other Known for its Cheap, Cheap operation 13 Features Standard effective Vast

Comparison of Features

8051 PIC AVR ARM NXP, Atmel, Apple, Nvidia, Silicon Labs, Manufacture Microchip Qualcomm, Dallas, Atmel r Average Samsung Cyprus, Electronics, TI etc. Infineon, etc. Cost / Very Low Average Average Low features

PIC18fXX8, Atmega8, 16, LPC2148, ARM Popular AT89C51, PIC16f88X, 32, Arduino Cortex-M0 to ARM series P89v51, etc. PIC32MXX Community Cortex-M7, etc.

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Three criteria in Choosing a Microcontroller 1. meeting the computing needs of the task efficiently and cost effectively • speed, the amount of ROM and RAM, the number of I/O ports and timers, size, packaging, power consumption • easy to upgrade • cost per unit 2. availability of software development tools • assemblers, debuggers, C compilers, emulator, simulator, technical support 3. wide availability and reliable sources of the microcontrollers.

The 8051 microcontroller

• a Harvard architecture (separate instruction/data memories) • single chip microcontroller (µC) • developed by Intel in 1980 for use in embedded systems. • today largely superseded by a vast range of faster and/or functionally enhanced 8051-compatible devices manufactured by more than 20 independent manufacturers

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Block Diagram

External interrupts On-chip Timer/Counter Interrupt ROM for program On-chip Timer 1 Counter Control RAM Inputs code Timer 0

CPU

Serial Bus 4 I/O Ports OSC Control Port

P0 P1 P2 P3 TxD RxD Address/Data 17

Comparison of the 8051 Family Members Feature 8051 8052 8031 ROM (program space in bytes) 4K 8K 0K RAM (bytes) 128 256 128 Timers 2 3 2 I/O pins 32 32 32 Serial port 1 1 1 Interrupt sources 6 8 6

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Pin Description of the 8051

P1.0 1 40 Vcc P1.1 2 39 P0.0(AD0 P1.2 3 38 )P0.1(AD1) P1.3 4 8051 37 P0.2(AD2 P1.4 5 36 )P0.3(AD3) P1.5 6 (8031) 35 P0.4(AD4) P1.6 7 34 P0.5(AD5) P1.7 8 33 P0.6(AD6) RST 9 32 P0.7(AD7) (RXD)P3.0 10 31 EA/VPP (TXD)P3.1 11 30 ALE/PROG (INT0)P3.2 12 29 PSEN (INT1)P3.3 13 28 P2.7(A15) (T0)P3.4 14 27 P2.6(A14) (T1)P3.5 15 26 P2.5(A13) (WR)P3.6 16 25 P2.4(A12) (RD)P3.7 17 24 P2.3(A11) XTAL2 18 23 P2.2(A10) XTAL1 19 22 P2.1(A9) GND 20 21 P2.0(A8) 20

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Pins of 8051（1/4）

• Vcc（pin 40）： • Vcc provides supply voltage to the chip. • The voltage source is +5V. • GND（pin 20）：ground • XTAL1 and XTAL2（pins 19,18）： • These 2 pins provide external clock. • Way 1：using a quartz crystal oscillator • Way 2：using a TTL oscillator • Example 4-1 shows the relationship between XTAL and the machine cycle.

Pins of 8051（2/4）

• RST（pin 9）：reset • It is an input pin and is active high（normally low）. • The high pulse must be high at least 2 machine cycles. • It is a power-on reset. • Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost. • Reset values of some 8051 registers • Way 1：Power-on reset circuit • Way 2：Power-on reset with debounce

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Pins of 8051（3/4）

• /EA（pin 31）：external access • There is no on-chip ROM in 8031 and 8032 . • The /EA pin is connected to GND to indicate the code is stored externally. • /PSEN ＆ ALE are used for external ROM. • For 8051, /EA pin is connected to Vcc. • “/” means active low. • /PSEN（pin 29）：program store enable • This is an output pin and is connected to the OE pin of the ROM. • See Chapter 14.

Pins of 8051（4/4）

• ALE（pin 30）：address latch enable • It is an output pin and is active high. • 8051 port 0 provides both address and data. • The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch. • I/O port pins • The four ports P0, P1, P2, and P3. • Each port uses 8 pins. • All I/O pins are bi-directional.

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Figure 4-2 (a). XTAL Connection to 8051

• Using a quartz crystal oscillator • We can observe the frequency on the XTAL2 pin.

RESET Value of Some 8051 Registers:

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Pins of I/O Port

• The 8051 has four I/O ports • Port 0 （pins 32-39）：P0（P0.0～P0.7） • Port 1（pins 1-8）：P1（P1.0～P1.7） • Port 2（pins 21-28）：P2（P2.0～P2.7） • Port 3（pins 10-17）：P3（P3.0～P3.7） • Each port has 8 pins. • Named P0.X （X=0,1,...,7）, P1.X, P2.X, P3.X • Ex：P0.0 is the bit 0（LSB）of P0 • Ex：P0.7 is the bit 7（MSB）of P0 • These 8 bits form a byte. 27 • Each port can be used as input or output (bi-direction).

Registers

R0 DPTR DPH DPL R1

R2 PC PC R3

R4 Some 8051 16-bit Register

Some 8-bitt Registers of the 8051 28

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Memory Map (RAM)

CPU timing

• Most 8051 instructions are executed in one cycle. • MUL (multiply) and DIV (divide) are the only instructions that take more than two cycles to complete (four cycles) • Normally two code bytes are fetched from the program memory during every machine cycle. • The only exception to this is when a MOVX instruction is executed. MOVX is a one-byte, 2-cycle instruction that accesses external data memory. • During a MOVX, the two fetches in the second cycle are skipped while the external data memory is being addressed and strobed. 30

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8051 machine cycle

Timers

• 8051 has two 16-bit on-chip timers that can be used for timing durations or for counting external events • The high byte for timer 1 (TH1) is at address 8DH while the low byte (TL1) is at 8BH • The high byte for timer 0 (TH0) is at 8CH while the low byte (TL0) is at 8AH. • Timer Mode Register (TMOD) is at address 88H

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Timer Mode Register

• Bit 7: Gate bit; when set, timer only runs while \INT high. (T0) • Bit 6: Counter/timer select bit; when set timer is an event counter when cleared timer is an interval timer (T0) • Bit 5: Mode bit 1 (T0) • Bit 4: Mode bit 0 (T0) • Bit 3: Gate bit; when set, timer only runs while \INT high. (T1) • Bit 2: Counter/timer select bit; when set timer is an event counter when cleared timer is an interval timer (T1) • Bit 1: Mode bit 1 (T1) • Bit 0: Mode bit 0 (T1) 33

Timer Modes

• M1-M0: 00 (Mode 0) – 13-bit mode (not commonly used) • M1-M0: 01 (Mode 1) - 16-bit timer mode • M1-M0: 10 (Mode 2) - 8-bit auto-reload mode • M1-M0: 11 (Mode 3) – Split timer mode

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8051 Interrupt Vector Table

The Stack and Stack Pointer

• The Stack Pointer, like all registers except DPTR and PC, may hold an 8-bit (1- byte) value. • The Stack Pointer is used to indicate where the next value to be removed from the stack should be taken from. • When you push a value onto the stack, the 8051 first increments the value of SP and then stores the value at the resulting memory location. • When you pop a value off the stack, the 8051 returns the value from the memory location indicated by SP, and then decrements the value of SP. • This order of operation is important. When the 8051 is initialized SP will be initialized to 07h. If you immediately push a value onto the stack, the value will be stored in Internal RAM address 08h. This makes sense taking into account what was mentioned two paragraphs above: First the 8051 will increment the value of SP (from 07h to 08h) and then will store the pushed value at that memory address (08h). • SP is modified directly by the 8051 by six instructions: PUSH, POP, ACALL, LCALL, RET, and RETI. It is also used intrinsically whenever an interrupt is triggered 36

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• PIC – from the presentation of Mohammed JBILOU

• These slides contain material developed and copyright by: • Grant McFarland (Intel) • Mark Louis (Intel) • Arvind (MIT) • Joel Emer (Intel/MIT)

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a general comparison ATMEL 39 AVR 8 BIT RISC MICROCONTROLLERS

What does AVR RISC mean?

• The acronym AVR has been reported to stand for: Advanced Virtual RISC and also for the chip's designers: Alf-Egil Bogen and Vegard Wollan who designed the basic architecture at the Norwegian Institute of Technology.

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A little history

• The PIC (Programmable Interrupt Controller) appeared around 1980. → 8 bit bus → executes 1 instruction in 4 clk cycles → Harvard architecture

• AVR (1994) → 8 bit bus → one instruction per cycle → Harvard architecture 41

AVR 8-Bit RISC High Performance • True single cycle execution • single-clock-cycle-per-instruction execution • PIC microcontrollers take 4 clock cycles per instruction • One MIPS (mega instructions per second) per MHz • up to 20 MHz clock • 32 general purpose registers • provide flexibility and performance when using high level languages • prevents access to RAM • Harvard architecture • separate bus for program and data memory 42

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AVR 8-Bit RISC Low Power Consumption • 1.8 to 5.5V operation • will use all the energy stored in batteries • A variety of sleep modes • AVR Flash microcontrollers have up to six different sleep modes • fast wake-up from sleep modes • Software controlled frequency

AVR 8-Bit RISC Compatibility

• AVR® Flash microcontrollers share a single core architecture • use the same code for all families • 1 Kbytes to 256 Kbytes of code • 8 to 100 pins • all devices have internal oscillators

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AVR 8-Bit RISC - picoPower Technology • “PicoPower enables AVR to achieve the industry’s lowest power consumption with 650nA with a RTC (real time clock) running and 100nA in Power Down sleep” (from ATMEL website) • True 1.8V Supply Voltage • Minimized Leakage Current • Ultra Low Power 32 kHz Crystal Oscillator • Digital Input Disable Registers • Power Reduction Register

AVR AT90S2313 Architecture

• 2K bytes of In-System Programmable Flash • 28 bytes EEPROM • 128 bytes SRAM • 15 general purpose I/O lines • 32 general purpose working registers • flexible Timer/Counters with compare modes • internal and external interrupts • programmable serial UART • one 8 bit timer/counter • one16-bit timer/counter • analog Comparator 46 • on chip oscillator and clock circuitry

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So what chip should I use?

• the application chooses the chip • each family has a large number of variants • the number of pins, the package, the cost of the chip, the peripherals, the operating voltage, the current consumption, and so forth • PIC is more application oriented • AVR mostly pin #s and flash memory differ

Many choices

• TI(MSP430), Zilog (Z8), Freescale (SC8), Atmel(AVR), Microchip (PIC), ST, Renesas / Hitachi (Mx or H8), Philips (8051) as just few of the many possible selections • MICROCHIP ATMEL and MSP430 • FREE SAMPLES

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AVR has very good documentation • Wide use

• AVRFreaks .net

• Free software

Most Important!!!

• Best C compiler to start programming in C • and it is FREE • Code Vision AVR • http://www.hpinfotech.ro/ • AVR Studio 4 also free from: • http://www.atmel.com/dyn/products/tools_card.asp?tool_id =2725

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AVR Architecture

Registers: Two types of registers GERNEL purpose & SPECIAL purpose registers

GERNEL purpose 32 general purpose registers having storage capacity of 8-Bits Named as R0,R1,R2 to R31. Register 0 to 15 & 16 to 31 are different. Can store both Data & Addresses.

SPECIAL purpose: Three registers Program counter Stack Pointer Status Register

AVR Architecture

Pointer Register Three 16-bit address registers pairs of registers 26 to 31 have extra meaning in AVR assembly. X (r27:r26), y (r29:r28), z (r31:r30).

pointer Sequence

X Read/Write from address X, don't change the pointer

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AVR Architecture

status register (SREG) that contains It is 8-bit long each bit has a different meaning.

I T H S V N Z C I: Global Interrupt Enable/Disable Flag, SREG7 T: Transfer bit used by BLD and BST instructions, SREG6 H: Half Carry Flag, SREG5 S: For signed tests Instruction Set, SREG4 V: Two's complement overflow indicator, SREG3 N: Negative Flag, SREG2 Z: Zero Flag, SREG1 C: Carry Flag, SREG0 53

AVR Architecture

Stack Pointer (SP)

16-bit stack pointer (SP) holds address in data space of area to save function call information.

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AVR Register Architecture

AVR Architecture

Memory:

There are two separate memories

Program Memory (Flash Memory)

Data Memory

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AVR AT90S2313 Memory Architecture

Memory:

Program Memory (Flash Memory)

2K Bytes of flash memory

128 Bytes of In-System Programmable EEPROM

program memory holds interrupt function addresses, 16 bit and double word (32 bit) opcode, and static data tables 57

AVR AT90S2313 Memory Architecture

Data Memory Used for data and is separate from the program memory.

128 Bytes of SRAM Register reassigned the 32 Data Space addresses ($00 - $1F), I/O memory space contains 64 addresses for CPU peripheral functions such as control registers, Timer/Counters, A/D converters and other I/O functions. I/O memory can be accessed directly or as the Data Space locations those of the Register File, $20 - $5F.

Stack is effectively allocated in the general data SRAM, and consequently the stack size is only limited by the total SRAM size and the usage of the SRAM. 58

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AVR AT90S2313 instruction Architecture

AVR Instruction SET

118 Powerful Instructions – Most Single Clock Cycle Execution

All arithmetic operations are done on registers R0 - R31 Mostly instructions take one cycle for execution

ADD Rd,Rr Rd: Destination (and source) register in the Register File Rr: Source register in the Register File

AVR AT90S2313 instruction Architecture

Instruction add R23, R11

encoded as the 16-bit opcode 0x0EEB.

Bit pattern : 0000 1110 1110 1011

Three components. 5 red bits 00011 distinguish this as an add instruction. 5 blue bits 10111 indicates register 23 is the first operand register. The 5 green bits 01011 indicates register 11 is the second operand register. 60 All add Rd, Rr instructions follow this pattern.

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AVR AT90S2313 I/O Pins

General Purpose I/O Ports Ports are simply the gates through which the CPU interacts with the outside world Each port has 3 control registers associated with it, DDRx, PORTx, and PINx

The DDR (Data Direction Register) bit tells a leg to act as an input (0), or output (1). The PORT (Pin Output / Read Tweak) The PIN (Port INput) register is read only,

I/O and Packages – 15 Programmable I/O Lines 61

AVR AT90S2313 I/O Pins

Port B is an 8-bit bi-directional I/O port.

Three I/O memory address locations are allocated for the Port B, Data Register (Read/Write) PORTB, ($38), Data Direction Register (Read/Write) DDRB, ($37) PortB Input Pins (read-only, )– PINB, ($36).

All port pins have individually selectable pull-up resistors.

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AVR AT90S2313 I/O Pins

Port B Data Register – PORTB

Port B Data Direction Register– DDRB

Port B Input Pins Address –PINB

AVR AT90S2313 I/O Pins

Three I/O memory address locations are allocated for the Port D: Data Register (read/write)– PORTD, $12($32), Data Direction Register (read/write)– DDRD, $11($31) Port D Input Pins(read-only) – PIND, $10($30).

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AVR AT90S2313 I/O Pins

Port B Data Register – PORTB

Port B Data Direction Register– DDRB

Port B Input Pins Address –PINB

AVR AT90S2313 CPU

CPU – Up to 10 MIPS Throughput at 10 MHz

The AVR is a Harvard architecture CPU, The AVR is a Harvard architecture CPU,

Program Memory Is separated from data Memory

Program memory is accessed with a single level pipelining (Fetch & execute).

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AVR AT90S2313 Extra factures

Peripheral Features – One 8-bit Timer/Counter with Separate Prescaler – One 16-bit Timer/Counter with Separate Prescaler, Compare, Capture Modes and 8-, 9-, or 10-bit PWM – On-chip Analog Comparator – Programmable Watchdog Timer with On-chip Oscillator – SPI Serial Interface for In-System Programming – FullDuplexUART

AVR AT90S2313 Extra factures

• Special Microcontroller Features – Low-power Idle and Power-down Modes – External and Internal Interrupt Sources • Specifications – Low-power, High-speed CMOS Process Technology

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11 PLC programming in accordance with IEC-61131. Operating Systems PLC. APPLICATIONS, SPECIFIC REQUIREMENTS 69

Automation engineering software. The assembly language, assembly language directives. Simulation software for debugging microprocessor systems, built on the basis of families MCS-51i PIC-controllers. The stages of software development. AUTOMATED PROGRAMMING TOOLS 70

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AVR Studio

Integrated Development Environment (IDE) for writing and debugging AVR applications for windows environments.

AVR Studio provides a project management tool, source file editor, chip simulator and In-circuit emulator interface for the powerful AVR 8-bit RISC family of microcontrollers.

Download site: AVR Studio 4 http://www.atmel.com/dyn/products 71

Code Vision AVR setup

• After opening Code Vision AVR click on: → tools → codewizardAVR select you chip version and oscillator frequency

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Set/clear the pins you want

LCD setup (LCD from microprocessors lab) • Control LCD with port A:

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Setting up the Analog to Digital conversion • 8 bit A/D on channel 3 (PORTA.3)