Digital Signal Processing in Hearing Aids

Jeremy Agnew

Starkey Laboratories, Inc., Colorado Research Center, I I10 Elkton Drive, Unit E, Colorado Springs, Colorado 80907, USA

Summary: For individuals with a hearing impairment, digital signal processing (DSP) offers the promise of implementingpreviously unavailablemethods of manipulatingsound to compensatefor hearing loss. However, the continuing miniahxization of hearing aids presents a complex electrical and mechanical challenge for tbe incorporation of DSP technology. This paperpresents an overview of achievingDSP in hearingaids within existing limitations.

The 1990’s have produced radical changesin hearing aid technology. Hearing enhancement prior to the 1990’s was accomplished primarily by conventional analog circuitry perlorming linear or compression amplification. Adjustment of the characteristics of the circuitry was achieved by physically changing componentson the circuit board, and later via potentiometers or mechanical switches that were used to vary resistor networks. In the late 1980’s and early 1990’s digitally-programmable hearing aids provided a more user-friendly method of hearing aid adjustment. Potentiometers and mechanical switches were replaced by electronic switches and resistor networks adjusted under computer control. The desired switch settings were stored in electronic memory, typically EEPROM. This ensured that the desired switch setting was retained when the battery was removed and replaced,but allowed re-prograrnming at a later date, if required, for modifying the amplification.

During the 1990’s, semiconductor processing advances made digital signal processing practical with the 1.25 volt power sourcesavailable to hearing aids. Though there were earlier attempts to incorporate DSP in ear-level hearing aids, it was not until the 1990’s that these efforts were successful, as outlined in Table 1.

Digital signal processing offers the ability to perform complex audio processing that cannot conveniently be implemented with analog circuits. Examples of this type of processing are: complex filtering of the signal, complex processing of different frequency bands to match hearing deficits, independentmanipulation of the phase and amplitude of the signal, decisions for determining the difference between desired speechand undesired noise, independent processing of speechand noise, and beamforming for directional sound reception. TAR1.E YIXW 1983 rlrst experunental body w 1987 First commercial body-worn hearing aid NlCOl 1992 First commercial Behind-The-Ear (BTE> hearine aid Dana 1995 First commercial In-The-Ear (ITE) hearing aid Widex Senso/Oticon Digifocus 1996 First commercial Completely-In-the-Canal (UC) hearing aid

Hardware implementation of a typical DSP hearing aid follows a traditional type of signal pathway, as shown in Figure 1. An analog electrical signal passesinto a preamplifier (PRE) from the microphone. The signal is then digitized by an A/D converter and is processedin the block labeled DSP. The output from the DSP block may go to a D/A converter and be amplified by a Class D (pulse width modulation) amplifier. Alternately the digital signal goes straight from the DSP block to a pulse density modulated (PDM) output stage, which replaces the two circuit blocks in the dashed box in Figure 1. Additional support circuitry are a master clock, memory to store processing and parameter values, and glue logic to interface internal digital circuitry and to interface with an external progmrnrner that configures the hearing aid to the individual user. Table 2 outlines typical circuit specifications found in current DSP hearing aids.

FROM PROGRAMYE

WA ND DSP k..-.

L------J \ WICROPHONE RECEWER

- muLOO- - OlGlTbL- Q PNALOO-

FIGURE 1: Block diagram of a typical DSP hearing aid.

TABLE 2: Range of typical specifications for current DSP hearing aids AD conversion 12 to 14 bits Circuit bandwidth I 6toSkHz Svstem dvnamic range 70 to 76 dB I I Clock speed 1 to2MHz Memory capacity up to 5 kBytes Processing power I to 5 MIPS Two primary challenges exist for implementing DSP in hearing aids. The first is the mechanical design challenge that the entire DSP and related hearing aid circuitry must tit into the human ear. Over the past 50 years, hearing aids have migrated into smaller and smaller sixes. This progression is outlined in Table 3 and shown in Figure 2.

TABLE 3: The evolution of hearingaid casesizes

FIGURE 2: Examplesof modem hearingaids. Clockwise from the paperclip are Completely-In- the-Canal(CIC), custom In-The-Ear(ITE), and traditional Behind-The-Ear(BTE) cases.

As the overall hearing aid size has shrunk, so has the internal space available for circuitry. However, conflicting with this is that the higher the complexity of the desired signal processing, in general, the larger the size of the internal circuit required to accomplish the task. Since the problem of reduced spaceis one of volume, rather than just planar area, solutions have migrated towards multiple die solutions. Available die footprint area is on the order of 12 to 15 square millimeters. One way that this problem has been partially solved is by partitioning the system into two or three die and then packaging them as a vertical stack in order to optirnize volumetric efficiency.

The second design challenge relates to the power source. Modem ear-level hearing aids are primarily powered by zinc-air cells. This chemistry produces one of the highest energy-densities of all battery technologies and thus results in the most power capacity for the smallest size. However, the use of these cells produces additional challengesfor the DSP technology that may be incorporated into a hearing aid. The design voltage available f?om a zinc-air cell is 1.25 volts. For design purposes the end-of-life of the cell for maintaining full specifications is usually considered to be 1.1 volts. Typical specifications also require that the hearing aid remain fully operational down to at least 1.0 volts. One challenge is to choose a digital integrated circuit process that will operate at these low voltages. An example of the difficulties that may be encountered are related to Figure 3, which shows gate delay versus supply voltage for a CMOS inverter designed on a representative0.6 micron process. Figure 3 shows that when the supply voltage is reduced from 5 volts to 1.15 volts, the gate delay increases by slightly over 22 times. It can also be seen that the delay increases asymptotically as the supply voltage decreasestowards 1.0 volt. So, while this process might work slower at 1.25 volts than at 5 volts, it will probably go into a failure mode as the battery ages and the voltage declines to 1.O volt. Advances in semiconductor technology will hopefully alleviate this problem over the next few years. The typical supply voltage range for mainstream digital circuits is expected to be on the order of 1.5 volts to 1.8 volts during 1999. Experts estimate that this will be reduced to the range of 0.9 volts to 1.2 volts by the year 2006.

FIGURE 3: Gate delay versus supply voltage for a CMOS inverter on a 0.6 micron process.

An additional constraint due to the miniaturization of batteries is that their capacity decreases correspondingly with a reduction in hearing aid case size. For example, the typical capacity of a #lo-sized cell is 60 milliAmpere-hours (mAH). Thus a target battery life for the consumer of approximately 100 hours (which representsabout 6 days of use at 16 hours per day) limits the practical drain from the battery to approximately 600 microamperes. This results in a power budget of approximately 750 microwatts, as opposed to up to 40 watts for a state-of-the-art PC processor. The challenge then for the hearing aid system designer is to balance the complexity of the digital signal processing against the limitation of current dram, which will increase as processing speed and complexity are increased to allow the use of more complex algorithms. Innovative algorithms and the reduction of processingrequirements to the minimum required to be effective can be used to partially managethis challenge.

In conclusion, digital signal processing offers the promise of improved and varied methods of sound processing for those individuals with a hearing impairment. Great strides have recently been made in algorithm development for compensation of hearing loss. The challenge for the hardware system designer is to incorporate interesting and effective processing in ear-level hearing aids, and yet stay within the limitations of size and power.