1730 IEEE TRANSACTIONS ON SCIENCE, VOL. 37, NO. 9, SEPTEMBER 2009 Inductively Coupled Pulsed Plasmas in the Presence of Synchronous Pulsed Substrate Bias for Robust, Reliable, and Fine Conductor Etching Samer Banna, Ankur Agarwal, Ken Tokashiki, Hong Cho, Shahid Rauf, Senior Member, IEEE, Valentin Todorow, Kartik Ramaswamy, Ken Collins, Phillip Stout, Jeong-Yun Lee, Junho Yoon, Kyoungsub Shin, Sang-Jun Choi, Han-Soo Cho, Hyun-Joong Kim, Changhun Lee, and Dimitris Lymberopoulos

Abstract—Inductively coupled pulsed plasmas in the presence ics for damage-free plasma etching processes with improved of synchronous pulsed substrate bias are characterized in a com- uniformity, higher selectivity, better anisotropy, and enhanced mercial plasma etching reactor for conductor etching. The syn- process throughput have stimulated an intensive research effort chronous pulsed plasma characteristics are evaluated through the among academic and industrial communities in search of novel following: 1) Ar-based Langmuir probe diagnostics; 2) Ar/Cl2 plasma modeling utilizing the hybrid plasma equipment model approaches and methods for the design and control of the and the Monte Carlo feature model for the investigation of fea- next generation of plasma processing reactors. Hence, there ture profile evolutions; 3) basic etching characteristics such as is a vital need for wider and more flexible ranges of plasma average etch rate and uniformity; 4) sub-50-nm Dynamic Random operating conditions aiming to improve the etch processes for Access Memory (DRAM) basic etching performance and profile control; and 5) charge damage evaluation. It is demonstrated that finer features. one can control the etching uniformity and profile in advanced Typically, plasma reactors use an RF power source with con- gate etching, and reduce the leakage current by varying the syn- stant average power or voltage to excite the plasma in a chronous pulsed plasma parameters. Moreover, it is shown that chamber. Such mode of operation is known as continuous-wave synchronous pulsing has the promise of significantly reducing the (CW) RF mode. For the last two decades, several researchers electron shading effects compared with source pulsing mode and continuous-wave mode. The synchronous pulsed plasma paves the have demonstrated through numerical modeling and experi- way to a wider window of operating conditions, which allows mental studies that pulsing the RF power input, i.e., pulsed new plasma etching processes to address the large number of RF mode, has the promise to increase the flexibility of plasma challenges emerging in the 45-nm and below . processing by enlarging the range of operating conditions [4]– Index Terms—Inductively coupled plasma (ICP), plasma con- [42]. Two main parameters characterize the RF pulse: 1) pulse trol, plasma-induced damage (PID), plasma material-processing frequency, i.e., the frequency at which the RF power is turned applications, synchronous pulse-time-modulated plasma. on and off per second, and 2) pulse duty cycle. The latter is de- fined as the ratio between the pulse ON time and the total pulse I. INTRODUCTION duration. By varying the pulse frequency and the duty cycle, OLLOWING Moore’s law, the pace at which the micro- pulsed plasmas provide additional “control knobs” in which pri- F electronic is moving these days might highly mary plasma properties, such as ion/electron densities, electron be challenging with conventional device architecture. Several temperature, ion/neutral flux ratio, and plasma potential, can intrinsic limitations have triggered an extensive research ac- be controlled. Hence, transitions from electron–ion plasma to tivity seeking new materials to be implemented in the next ion–ion plasma during the after-glow phase (power-off period) generation of integrated circuits (e.g., [1]–[3]). Moreover, the might occur for electronegative plasmas [5]–[7], [28]. Further- more stringent and conflicting requirements in microelectron- more, for gate patterning applications, it was demonstrated that the pulsed plasma exhibits highly selective, highly anisotropic, notch-free, and charge-build-up damage-free polycrystalline Manuscript received December 19, 2008; revised June 30, 2009. Current silicon etching [8]–[14], [39], [40]. Undesirable profile distor- version published September 10, 2009. This work was supported in part by tions, such as microtrenching, bowing, and local side etching the Etch Division, Applied Materials, Inc., and in part by the Semiconductor R&D Center, Samsung Electronics. (notching), which are thought to be due to differential charging S. Banna, A. Agarwal, S. Rauf, V. Todorow, K. Ramaswamy, K. Collins, and in features (electron shading), may be mitigated by using a P. Stout are with the RF and Plasma Technology Group, Etch Division, Applied Materials, Inc., Sunnyvale, CA 94085 USA (e-mail: [email protected]). pulsed plasma if the negative ions can be injected into the K. Tokashiki, H. Cho, J.-Y. Lee, J. Yoon, and K. Shin are with the Semi- feature to neutralize the charge deposited by positive ions [4]– conductor R&D Center, Samsung Electronics Company Ltd., Hwasung City [20]. In addition, the pulsed RF mode is capable of reducing 445-701, Korea. S.-J. Choi, H.-S. Cho, H.-J. Kim, C. Lee, and D. Lymberopoulos are with the ultraviolet radiation damage in plasma processing using the Etch Product Business Group, Etch Division, Applied Materials, Inc., high-density plasmas and plasma-induced charge damage (PID) Sunnyvale, CA 94085 USA. [22]–[27], [45]–[51]. Moreover, pulsed plasmas have gained Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. recognition as a means to control the plasma deposition envi- Digital Object Identifier 10.1109/TPS.2009.2028071 ronment (e.g., [31] and [37]).

0093-3813/$26.00 © 2009 IEEE

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The lack of efficient and stable coupling of RF pulsed power has substantially limited the operating window and has only allowed for a very limited number of applications to be run in mass production. There are two main ways to couple the pulsed RF power in inductively coupled plasma (ICP) reactors [43], [44]. One way is to operate the ICP source in CW RF mode and the substrate bias in pulsed RF mode. The other way is to pulse the ICP source in the presence of substrate bias in CW RF mode. The main challenge, with either way of coupling pulsed RF power, is managing the amount of reflected power. Specif- ically, in ICP reactors, a high-bias reflected power is observed for low-pressure processes (a few tens of millitorrs and below) with source pulsing, in which the time modulation of the source power is highly coupled to the bias. The high reflected power is mainly attributed to the nature of pulsed plasma, in which the plasma impedance rapidly varies within the pulse. These rapid variations cannot be tracked by a conventional commercial dynamic matching network due to the mechanical nature of its adjustment. The response time of such an adjustment is at least on the order of tens of milliseconds. Therefore, for pulse frequencies greater than 1 kHz, a high reflected power might Fig. 1. Schematic of Applied Materials, Inc., 300-mm Silicon Etch occur. Hence, even if the RF power supply operates in a load AdvantEdge G5 ICP reactor with pulsing capability. power mode, for which it compensates for the reflected power, there is a real concern of repeatability and reliability while operating at a very high reflected power level. feature profile evolution in Ar/Cl2-based chemistries. Third, Due to the aforementioned RF power coupling challenges, a basic etch performance investigation for gate applications the need for the development of new technology that renders is carried out and discussed in Section V. It includes etch pulsed plasmas production worthy is evident. As a result, the rate dependence on the synchronous pulsed plasma param- focus is on developing technology to reduce the reflected power eters. Profile control for sub-50-nm DRAM gate etching is when in pulse mode at the submillisecond scale. This paper demonstrated. Charge-build-up damage reduction and electron introduces the concept of synchronous source and bias pulsing shading control while using the synchronous pulsed plasma is with/without phase delay in ICP reactors. In this approach, both evaluated by using an in situ charge-up monitoring wafer. the ICP source and the substrate bias are pulsing at the same frequency and with the same duty cycle. II. EXPERIMENTAL SETUP Recently, Applied Materials, Inc. has modified its commer- cial ICP 300-mm silicon etch tool named AdvantEdge to fully Fig. 1 illustrates the ICP etching apparatus and the support the operation of the synchronous pulsed plasma, along Langmuir probe measurement setup that is used in this paper. with developing multiple techniques for optimizing the RF The ICP etching system is the Silicon Etch AdvantEdge G5 power delivery in pulsed RF mode, therefore providing an from Applied Materials, Inc. The ICP reactor consists of a expanded window of operating conditions. In doing so, the Yttria-coated chamber with a He-cooled chuck equipped to matching response time is reduced to a few microseconds, hold 300-mm wafers. The ICP source antenna consists of two which ensures a low reflected power level that is acceptable solenoid RF coils (inner and outer). The source RF power at for a wide variety of applications poised to benefit from pulsed 13.56 MHz is fed to the antenna coils through a matching plasmas (for details, see [42]). network and is coupled to the plasma through the dielectric win- In this paper, the basic characteristics of inductively coupled dow. The RF bias at 13.56 MHz is applied to the substrate. In pulsed plasmas in the presence of synchronous pulsed bias are the modified Silicon Etch AdvantEdge G5 tool, both source and investigated at three different levels. First, via basic Ar-based bias RF power supplies are capable of pulsing independently or Langmuir probe measurements, as presented in Section III. In in a fully synchronized fashion. The system can operate in two this section, the temporal behaviors of Ar plasma main prop- main power coupling settings. In the first setting, the source erties, such as ion/electron densities and electron temperatures, and the bias can independently operate in either one of two RF are measured and/or evaluated. Second, a computational inves- modes: 1) CW mode or 2) pulsed mode. In this setting, the tigation of the plasma properties of Ar/Cl2 discharges sustained source and the bias can be in CW RF mode, or the source is in a synchronous pulsed ICP source and bias is conducted to in CW mode while the bias is in pulsed RF mode, or the source provide additional insight to the main characteristics of the is in pulsed mode while the bias is in CW mode. Although synchronous pulsed plasmas, as introduced in Section IV. The one can pulse the source and bias at the same frequency and Ar-based synchronous pulsed plasma properties are investi- duty cycle using this type of setting, due to the lack of time gated using the Hybrid Plasma Equipment Model (HPEM) synchronization, the jitter in the occurrence of each pulse limits and the Monte Carlo feature model for the investigation of the process repeatability and the efficiency of the RF tuning

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TABLE I CF4/O2 ICP PULSED PLASMA WITH CW BIAS.SOURCE AND BIAS REFLECTION COEFFICIENTS WITHOUT UTILIZING SPECIAL MATCHING TECHNIQUES

TABLE II CF4/O2 ICP PULSED PLASMA WITH CW BIAS.SOURCE AND BIAS REFLECTION COEFFICIENTS UTILIZING SPECIAL MATCHING TECHNIQUES

techniques. Therefore, synchronous pulsing mode is needed to show the reflection coefficients for varying pulsing conditions have both the source and the bias simultaneously pulsing. when the source is pulsed and the bias is in CW mode with In the second setting, the source and the bias are fully and without utilizing the new matching techniques [42]. A synchronized, in which the source is set to be the master while reflection coefficient of ∼0.32 corresponds to 10% reflected the bias is set to be the slave. Hence, the bias follows the source power, whereas a reflection coefficient of ∼0.43 corresponds in all its RF parameters except the power level. The source to 20% reflected power. A reflected power of 10% and less and the bias pulses have identical pulse frequency and duty during pulsed plasma operation is considered acceptable for cycle. The system is designed to support pulse frequencies from mass production (in terms of process result repeatability and 500 Hz to 20 kHz and duty cycles varying from 10% to 90% hardware reliability), whereas more than 20% is not acceptable (with the limitation of minimum ON time of 5 µs). A phase (shaded in dark gray). It is clear that for the source pulsing case delay (lag) of up to 360◦ between the source and the bias syn- considered, the pulsed plasma window of operation is broader. chronous pulses can be applied. The phase delay is directly con- The window of pulse frequencies and duty cycles that can be trolled through the bias RF power supply. Multiple techniques, used is expanded. This expansion is more pronounced when for the reduction of the RF reflected power during the pulsed the source and bias pulses are fully synchronized, as illus- mode operation, were developed. These techniques mainly rely trated in Table III. Such a significant expansion in the pulsed on a time-resolved tuning algorithm in which both conventional plasma window of operation provides substantially improved dynamic matching network and fast frequency tuning algorithm flexibility in application development. To further elucidate the within the RF supply are combined (for more details, see expansion of the pulsed plasma window while utilizing syn- [42]). Tables I–III illustrate the expansion of the pulsed plasma chronous pulsed mode, Tables IV and V compare the actual window of operation due to the use of these techniques. The amount of reflected power in percentage while scanning the source and the bias RF reflection coefficients for different pulse pulse frequency and the duty cycle for two different pulsed parameters are presented for CF4/O2 plasma held at interme- plasma modes of operation. In the first mode, the source and diate pressure while keeping constant source/bias peak power bias are independently pulsing (nonsynchronized) at the same (1200-W source power and 600-W bias power). Tables I and II pulse frequency and duty cycle, and in the second mode, both

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TABLE III CF4/O2 ICP PULSED PLASMA WITH SYNCHRONOUS PULSED BIAS.SOURCE AND BIAS REFLECTION COEFFICIENTS UTILIZING SPECIAL MATCHING TECHNIQUES

TABLE IV Ar/CF4/CHF3/O2 ICP PULSED PLASMA WITH NONSYNCHRONOUS III. LANGMUIR PROBE DIAGNOSTICS PULSED BIAS.SOURCE AND BIAS REFLECTED POWER IN PERCENTAGE The electron temperature, the electron and ion densities, and the plasma potential are measured with a single cylindrical RF-compensated Langmuir probe. The probe consisted of a 0.25-mm-diameter tungsten wire of 10-mm length protruding out of a ceramic tube. The probe tip was positioned approxi- mately 50 mm above the wafer surface. The plasma parameters are derived from current–voltage characteristic (I–V ) curves using the standard Langmuir probe theory for Ar plasma. Each I–V curve is obtained by sweeping the probe voltage from −45 to 30 V. Each data point on the I–V curve is an average of over ten measurements. To draw a proper amount of electron current, TABLE V / / the Yttria-coated chamber walls were covered by grounded Ar/CF4 CHF3 O2 ICP PULSED PLASMA WITH SYNCHRONOUS PULSED (n ) BIAS.SOURCE AND BIAS REFLECTED POWER IN PERCENTAGE aluminum plates. A positive ion density i is determined from the ion saturation part of the I–V curve. The electron density (ne) is calculated based on the electron current at the plasma potential (Vp). The plasma potential is defined as the voltage at which the second derivative of the I–V curve is equal to zero. The electron temperature (Te) is estimated from the exponential part of the electron retardation region of the I–V curve. The time-resolved Vp, ni, ne, and Te in pulsed plasmas are measured with the Langmuir probe while operating in “boxcar” mode triggered in full synchronization with the source RF power supply. During pulse mode operation, a time resolution of 1 µs was utilized. Due to the inherent uncertainties the source and the bias are fully synchronized in time. For this and limitations of Langmuir probe analysis, plasma parameters purpose, the Ar/CF4/CHF3/O2 mixture held at a very low are accurate within a factor of about 1.2. Hence, the data pressure was considered while keeping the source and the bias contained therein are mainly intended to indicate general trends peak power at 500 and 250 W, respectively. Accordingly, it is during pulsed plasma operation. This study has been done in obvious that synchronous pulsing is the only viable option for an Ar plasma. Two base cases are considered. First, 100 sccm pulsing both source and bias in commercial ICP sources used of Ar is held at 5 mTorr with 500-W source power and 100-W in the semiconductor industry. bias power. Second, the Ar is held at 20 mTorr with the same A commercial Langmuir probe system (Smart Probe from flow and power levels. Table VI summarizes the values of the Scientific Systems Ltd.), which can be operated in a “boxcar” plasma parameters for CW mode of operation for both cases at averaging mode, is used to measure time-resolved electron and the center of the wafer surface. ion densities and electron temperatures. A detailed account of First, the temporal behaviors of Vp, Te, and ni for source the Langmuir probe measurements is presented in the following pulsing with CW bias are compared with the synchronous puls- section. ing mode without any phase lag. For this purpose, the 5-mTorr

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TABLE VI Ar PLASMA PARAMETERS FOR CW MODE OF OPERATION AS MEASURED WITH LANGMUIR PROBE FOR DIFFERENT PRESSURES AT THE CENTER OF THE WAFER

Fig. 3. Plasma properties as measured by the Langmuir probe for synchronous pulsed Ar plasma at 5 mTorr for different pulse duty cycles (25%: solid- line, 50%: dashed-line, 75%: dotted-line) and fixed pulse frequency of 1 kHz. (Top) Electron temperature. (Bottom) Ion density.

steady-state energy of about 3 eV is reached during the active- glow phase. The electron temperature abruptly drops to less than 0.5 eV within less than 50 µs. The monotonic decrease in electron temperature is a result of electron thermalization in the absence of ICP heating. Notice that, when the ICP power is first turned on, Te sharply increases as a consequence of the power being deposited into an initially smaller inventory of electrons remaining at the end of the previous after-glow. A higher peak (∼4.5 eV) is observed for the synchronous pulsed plasma compared with the source pulsed plasma (∼3.9 eV) as the electron density at the end of the after-glow phase reaches a lower value than the source pulsing case. Therefore, a higher Te is required for a smaller inventory of electrons to dissipate Fig. 2. Plasma properties as measured by the Langmuir probe (dashed-line) the same deposited RF power. As anticipated, the steady-state for ICP Ar pulsed plasma and (solid-line) for synchronous pulsed plasma at ion density during the active-glow phase for both cases is lower 5 mtorr. (Top) Plasma potential. (Middle) Electron temperature. (Bottom) Ion density. than that achieved for CW as the average deposited power is reduced. case is considered with 1-kHz pulse frequency and 75% duty Next, the impact of the pulse duty cycle on the plasma cycle. For both CW and pulsed modes, the peak power is kept properties for synchronous pulsed plasma is investigated. Fig. 3 constant. Fig. 2 shows the time dependence of the plasma presents the temporal behavior of electron temperature and ion potential, the electron temperature, and the positive ion density density while varying the pulse duty cycle for a given pulse during the pulse cycle for both cases. The following facts are frequency. The 5-mTorr case is considered. In Fig. 3, the pulse evident. The plasma potentials for both cases are almost iden- frequency is fixed at 1 kHz, and its duty cycle varies from 25% tical during the active-glow (ICP power-on) phase and reach to 75%. The electron temperature reaches a steady-state value a steady value of about 23 V similar to that obtained for CW of ∼3 eV during the active-glow phase regardless the pulse duty mode. However, in the after-glow (ICP power-off) phase, the cycle. Furthermore, the decay rate of the electron temperature drop in the plasma potential for the synchronous pulsed plasma during the after-glow phase is not affected by the duty cycle case is more pronounced than for the source pulsed plasma. for a given pulse frequency. The ion densities reach steady state This is expected, since, in the synchronous pulsed plasma, the within less than 50 µs, and therefore, their values are almost bias power is completely shut off. A plasma potential of less the same for each duty cycle. The rapid drop in Te shuts off than 5 V is observed for the synchronous pulsed plasma case ionization and reduces the rate of ambipolar diffusion, which at the end of the after-glow phase. The electron temperature results in a slow decrease in ion density in the remainder of the exhibits almost the same temporal behavior for both cases. A after-glow phase, as illustrated in Fig. 3 (bottom frame). Hence,

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Fig. 4. Schematic illustration of the source and bias pulse phase lags for 75% duty cycle. (Top left) 0◦ phase lag. (Top right) 90◦ phase lag. (Bottom left) 180◦ phase lag. (Bottom right) 270◦ phase lag. Black line corresponds to the source pulse, whereas the gray line corresponds to the bias pulse. the ion density at the end of the after-glow is higher for a larger duty cycle as the off time is shorter. To further investigate the characteristics of synchronous pulsed plasmas, the impact of the phase lag between the source and the bias pulses is examined. The pulse frequency is fixed at 1 kHz, and its duty cycle is 75%. The phase delay between the source and the bias is varied from 0◦ to 90 ◦, 180◦, and ◦ Fig. 5. Plasma properties as measured by the Langmuir probe for synchronous 270 . Fig. 4 schematically illustrates the different phase lags pulsed plasma at 20 mTorr for different phase lags (0◦,90◦, 180◦, and 270◦). between the source and the bias pulses for 75% duty cycle. In The pulse frequency is set to 1 kHz and its duty cycle to 75%. (Top) Plasma Fig. 5, the plasma properties for the different phase lags are pre- potential. (Middle) Electron temperature. (Bottom) Ion density. sented. The phase lag introduces an interesting temporal behav- ior for Vp, Te, and ni. Since the probe is positioned close to the (less than 10%) in electron temperature during the active-glow wafer surface, the measured plasma potential is correlated with phase is observed. The variation corresponds to the overlap the dc self-bias on the wafer surface. As revealed from the top between the source and the bias pulses. A lower temperature is frame of Fig. 5, the plasma potential during the ICP active-glow obtained when the bias is turned off while the source is still ON. varies between 16 and 24 V for phase lags different from zero. Moreover, it is clear that the ion density for zero phase lag is the The plasma potential attains its highest value when both the highest among the other phase lags. As the uninterrupted period source and the bias are ON and drops to its lowest value when of temporal overlap between the source and the bias pulse is ◦ ◦ the bias is turned OFF. Therefore, the plasma potential variation the same for 90 and 270 phase lags, the ion densities during within the active-glow corresponds to the overlap between the the active-glow phase are almost identical. A lower ion density source and the bias, as illustrated in Fig. 4. During the after- is obtained for the 180◦ phase lag. A similar analysis is valid glow phase, the ICP source is turned off, and the plasma for the after-glow phase. By controlling the bias power and the potential is mainly controlled by the bias power. For zero phase phase lag, one can increase Te during the after-glow. Hence, lag, i.e., in the absence of bias power, the plasma potential drops if the specific heating rate (power per electron) is sufficiently to less than 5 V. However, for phase lags of 90◦, 180◦, and 270◦, large that it dominates over thermalization and inelastic losses, the bias power is always ON, and accordingly, all three cases a transition from inductive to capacitive mode may occur. exhibit the same plasma potential during the after-glow phase, To summarize, Ar-based Langmuir probe diagnostics were which is almost ∼10 V at the end of the after-glow phase. This carried out to investigate the properties of ICP pulsed plasmas shows that the plasma potential can be controlled by varying in the presence of synchronous pulsed bias. It was demonstrated the phase lag between the source and bias pulses, and this helps that one can control the temporal behavior of the fundamen- give unprecedented control over the plasma parameters. tal plasma characteristics by varying the synchronous pulsed Although the variation in plasma potential is significant by plasma main parameters, i.e., pulse frequency, pulse duty cycle, controlling the phase lag, the electron temperature and the ion and phase lag between the source and the bias pulses. Such density do not exhibit the same sensitivity as their values are control enables flexibility in controlling the plasma parame- primarily dictated by the ICP source power. A slight variation ters for plasma material-processing applications. For instance,

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phase control can selectively enable the utilization of low Te electrons. Consequently, electron shading, which is thought to be responsible for notching and charge damage, can be reduced by reducing the effective electron temperature by selectively utilizing the electrons at the phase where Te is low.

IV. PLASMA MODELING In this section, we further investigate the properties of syn- chronous pulsed plasma utilizing numerical models. First, the basic Ar plasma characteristics are evaluated; this is followed by the evaluation of feature evolution in Ar/Cl2-based plasmas.

A. Model Description

All of the plasma simulations have been done using the Fig. 6. Schematic of the ICP reactor used in the plasma simulations. HPEM [34]–[36]. The HPEM consists of three modules: 1) an electromagnetic module for computing the electromag- netic fields generated by the antenna (dual-coil ICP source); 2) the electron energy transport module (EETM) for deter- mining the electron kinetics; and 3) the fluid kinetics module for calculating species transport and electrostatic fields. The Boltzmann equation is solved in the EETM to calculate rates for electron impact reactions and electron transport parameters. The plasma model in the HPEM is also linked to a Monte Carlo model for calculating the ion energy and the angular distribution at the substrate. The feature scale model used in this paper is a Monte Carlo model. The surface is tracked as the boundary between occupied and unoccupied lattice cells. The ion angular and energy distribution functions (IAEDs) and the species fluxes to the wafer are obtained from the reactor model previously intro- duced. The feature model uses a flux weighted average IAED of the five IAEDs calculated at different time zones during a plasma pulsing cycle, as will subsequently be discussed. The species flux to the wafer used by the feature model is the time- averaged flux over one pulsing cycle. The ions and electrons vary in time within the pulsing period. The neutral flux to the wafer is a constant over the pulsing period for these cases.

B. Plasma Properties Fig. 7. (Online color) Comparison of computed (a) electron density and (b) electron temperature with experimental measurements. Two duty cycles The reactor geometry considered in the model is shown in (50% and 75%) have been considered for electron density at 5 kHz. The Fig. 6. The antenna consists of two sets of coils, where the electron temperature results are for 50% duty cycle and two pulse frequencies current in the dual-coil sets can independently be controlled. (2 and 5 kHz). The reported pulsed plasma simulations are for Ar plasma at 100 sccm, which was sustained at either 5 or 20 mTorr. An electron temperature decrease after the power is turned OFF. inductive power of 500 W at 13.56 MHz is supplied through the Note that the computationally obtained density and electron antenna. The Si wafer sits on a substrate below the quartz lid, as temperature, as plotted, are reactor averaged during the pulse, illustrated in Fig. 6. The substrate is independently RF biased unlike Langmuir probe measurements, which are taken at about to deliver 100 W of power deposition. The metal chamber 50 mm above the wafer surface. Further, minor variations from wall is grounded. The modeling results are compared with the experimental measurements are expected due to various the experimental Langmuir probe measurements of electron numerical approximations made during the modeling. density and temperature for a few representative conditions, as The effect of the pulse duty cycle on plasma characteristics presented in Fig. 7. The model is able to adequately capture is shown in Fig. 8. The bias and source powers are fully the details of the measurements, including the electron density synchronized with no phase lag. At 25% duty cycle, the Ar+ falloff rate during the power-off phase, the spike in electron density does not reach steady state during the power-on phase. temperature when the RF power is turned ON, and the rapid There is an initial spike in electron temperature when the RF

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Fig. 8. (a) Spatially averaged Ar+ density, (b) spatially averaged electron temperature, and (c) source and bias power as a function of duty cycle. These results are at 5-mTorr gas pressure, 5-kHz pulsing frequency, 500-W peak source power, and 100-W peak bias power. power is turned ON due to the source power being dumped into a small pool of electrons from the previous cycle. As the duty cycle is increased to 50% and beyond, the Ar+ density reaches steady state, whereas the steady-state electron temperature remains the same. We next consider the impact of the phase lag between the source and the bias pulses. The pulse frequency and its duty cycle are kept constant at 5 kHz and 50%, respectively. The Fig. 9. (Online color) Bias power, bias RF voltage, and dc self-bias as a bias power, the bias RF voltage, and the dc self-bias voltage are function of lag between source and bias powers: (a) 0◦, (b) 90◦, (c) 180◦, shown in Fig. 9 as a function of time during the pulsing period, and (d) 270◦. These results are for Ar at 5-mTorr gas pressure, 5-kHz pulsing where time is referenced to the beginning of the source-ON frequency, 500-W peak source power, 100-W peak bias power, and 50% duty cycle. phase. There is an initial spike in the bias power when the bias power is turned on, which is particularly pronounced for 90◦ tive when the source power is off and the electron density ◦ and 180 phase lags. This spike is due to the power controller is small. The dc self-bias is negligible during the source-ON in the plasma model. The RF bias voltage is representative of period. the electron density during the period when bias is on. The RF The ion energy and the angular distribution (IAED) consid- voltage is smallest when the plasma is ON and the RF current is erably change during the period of the pulse. To characterize large, and vice versa. The dc self-bias voltage is large and nega- the IAED as a function of time, we have divided the pulsing

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Fig. 11. (Online color) Initial feature and calculated profiles for different Ar/Cl2 pulsed plasma duty cycles. As the duty cycle increases, the plasma is on for longer periods of time, increasing the ion and Cl neutral fluxes to the wafer, and, hence, increasing the etch depth rate.

down phase, the ion energy remains high for the 90◦ and 180◦ phase lag cases as the plasma density decreases during this period, whereas the associated dc self-bias voltage is high. The ions are moderately energetic during the off-1 period of the pulse, i.e., for the 90◦ and 180◦ phase lag cases, due to the slowly decaying dc self-bias voltage (see Fig. 9) as the plasma density is small. The off-2 period corresponds to when no bias power is deposited, and so, the ions only acquire the floating sheath voltage (or lower) corresponding to the source- only operation. Fig. 10. (Online color) IAED during different phases of the pulsing cycle. The IAEDs have been shown for (a) 90◦, (b) 180◦, and (c) 270◦ phase lag between source and bias powers. These results are at 5-mTorr gas pressure, 5-kHz C. Features Evolution pulsing frequency, 500-W peak source power, 100-W peak bias power, and 50% duty cycle. The initial feature used for this paper is shown in Fig. 11 (left frame). The material stack is an amorphous carbon hard period into five phases, where all phases are referenced to the mask (HM) on top of poly Silicon (Si). The HM has an initial beginning of the bias-on period. These phases are ramp-up sidewall angle of 1◦. All cases use a fixed etch time. The (when the bias power is ramped up), top-flat (steady-state bias calculated change in feature profile for different pulse duty power), ramp-down (when the bias power is ramped down), cycles are shown in Fig. 11. An 80/20 Ar/Cl2 gas mixture is pulse-off 1 (initial half of the bias power-off phase), and pulse- used for these investigations. The peak source and bias powers off 2 (later half of the bias power-off phase). are 300 and 100 W, respectively. The source and bias powers The influence of phase lag between source and bias powers are synchronously pulsed at 5-kHz pulse frequency. The etch on the IAED is considered in Fig. 10. When the source and bias depth rate increases as the duty cycle is increased. As the duty powers are pulsed with a phase lag, the IAED is complex with cycle increases, the plasma is ON for longer periods of time, peaks at multiple energies due to the overlap of the bias power which increases the time-averaged flux of electrons, ions, and with the source power pulse in its OFF and/or ON state. The ion atomic chlorine (Cl) to the wafer. The etch depth rate increase energy is highest during the initial top-flat for the 270◦ phase is due to this increase in reactive specie flux to the feature as lag case when the RF bias and dc self-bias voltages are large the duty cycle increases. (as shown in Fig. 9). The IAED for the 90◦ phase lag case has The specie flux increase with duty cycle offsets any increase a signature corresponding to the period when the source is ON in the reactive ion etch yields from the high-ion energy tails (leading to somewhat bimodal distribution and broad angular present in the low-duty-cycle plasmas. The ion energies have distribution), and when the source is turned OFF, it exhibits a high-energy tail for small duty cycles. The IAEDs become higher energy ions (and more focused as the sheath expands) as more energetically focused as the duty cycle increases to CW the RF bias and dc self-bias voltages increase. During the ramp operation (100% duty cycle). The minimum ion energies also

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The ion energy boost and the ion flux levels during the overlap portion of the pulse period are both playing a role in the phase lag trend calculated here. The ion flux levels during this overlap are highest for 90◦ followed by 180◦ and 270◦, respectively. This is seen in the IAEDs, which have the highest ion energies for 270◦ and become smaller for 180◦ and 90◦, respectively. That is, the smaller the collected ion current at the wafer for the same wafer power, the higher the ion energy. The etch depth rate depends on the ion flux and ion energy. The ion flux determines how many potential etch “events” occur (i.e., proportional dependence) while the ion yield has a square root dependence on the ion energy. Hence the ion flux, has a larger influence on the etch rate than on the ion energy. The decrease in ion yield for a decreasing ion energy from 270◦ to 90◦ is offset by the increase in the number of etch events occurring because of the higher ion fluxes to the wafer. As a result, for the conditions modeled, the 90◦ lag case has the highest etch depth rate.

V. E TCH CHARACTERISTICS This section summarizes the results obtained in an investi- gation of the effect of pulsed ICP plasma in the presence of Fig. 12. (online color) Calculated profiles for different Ar/Cl2 pulsed plasma synchronous pulsed bias on basic etch characteristics and on source and wafer bias pulsing phase lag values. The ion energy is boosted sub-50-nm DRAM basic etching performance. in source-off/wafer bias-on regions, which can potentially enhance the etch depth rate. A. Basic Etch Characteristics decrease with the increase of the duty cycle. As the plasma is turned ON, the ion current collected at the wafer is slowly To explore the impact of the synchronous pulsed plasmas on increasing to the peak within the ON pulse. During this ion cur- basic etch characteristics, the HBr/O2 overetch process for gate rent ramp up, the ions gain more energy. That is, for a constant application is considered, as this chemistry is widely used in wafer power, a lower ion current leads to more energetic ions. CW mode to achieve high Si/SiO2 selectivity for the fabrication For the low duty cycle case, the time the plasma spends ramping of poly-Si gate electrodes. In our previous study [42], we have up is commensurate to the rest of the pulse on time. Therefore, investigated the etch rates on blanket samples of poly-Si and the ion energies are defined as much by the plasma ramp up SiO2 for various pulse conditions. It was demonstrated that, as by any plasma peak that is achieved. As the duty cycle is by varying the pulse frequency, the pulse duty cycle, and the increased, the plasma ramp up time becomes a lower percentage source and bias phase lag, Si/SiO2 selectivity can be controlled of the total pulse ON time, and the ions accelerated through the to exceed the CW, along with improving the etching uniformity sheath at this plasma ramp up time make less of a contribution across the wafer. Moreover, we have shown that the mean etch to the total IAED. rate decreases with the decrease of the duty cycle. However, The impact of the phase lag between source and wafer bias the dependence of the mean etch rate on the duty cycle is on the feature profile is shown in Fig. 12. The plasma conditions not linear. Hence, as illustrated later, full power compensation are identical to those used in Fig. 11. For the plasma conditions might not be needed for the recovery of etch rate drop. The modeled, the 90◦ phase lag case has the largest etch depth rate variations in etch rate as a function of the phase lag, the pulse with decreasing rates for 0◦, 180◦, and 270◦, respectively. The frequency, and the duty cycle are attributed to the variations in overlap of wafer bias-on/source power-off during the pulse can the ion density/ion flux and ion energy when varying the phase be used to predict the trend of decreasing etch depth rate for lag due to the overlap between the source and the bias pulses 90◦, 180◦, and 270◦ phase lag. This is because the RF bias [42]. A direct byproduct of such flexibility in controlling the voltages (and the dc self-bias) increase as the source power is ion energy and the ion density is increasing Si/SiO2 selectivity turned off, giving a “boost” to the ion energies. The position of as one can tailor reactive ion (Si) versus physical (SiO2) this overlap also determines the ion flux levels. The 0◦ case has etching. no such source-off/bias on the region, but a higher minimum As the etch rate during pulsed plasma might drop due energy relative to the other three cases gives it the second to the lower effective power deposited in the reactor, one highest etch depth rate. Of note is that the time-averaged specie might consider to compensate either in power or in time to fluxes to the wafer are fairly constant among these cases. For achieve the same etching needed for a specific application. instance, the Cl time-averaged flux is changing by less than 1%, Time compensation is not practical for any mass-production and the time-averaged total ion flux is changing by less than 4% facility as the throughput will accordingly be reduced. There- between these cases. fore, power compensation is more desirable. The question to

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TABLE VII HBr/O2 ETCH RATE CHARACTERISTICS.CWBASELINE,BIAS PULSING,SOURCE PULSING, AND SYNCHRONOUS PULSING. FOR ALL PULSING CONDITIONS, THE PULSE FREQUENCY IS SET TO 5kHzAND ITS DUTY CYCLE TO 50%. TIME COMPENSATION IS APPLIED (NO POWER COMPENSATION IS APPLIED)

TABLE VIII HBr/O2 ETCH RATE CHARACTERISTICS.CWBASELINE AND SYNCHRONOUS PULSING FOR DIFFERENT PULSE FREQUENCIES AND FIXED DUTY CYCLE OF 50%. TIME COMPENSATION IS APPLIED (NO POWER COMPENSATION IS APPLIED)

TABLE IX HBr/O2 ETCH RATE CHARACTERISTICS.CWBASELINE,BIAS PULSING, AND SYNCHRONOUS PULSING WITH/WITHOUT APPLYING SOURCE/BIAS POWER COMPENSATION.PULSE FREQUENCY IS SET TO 5kHzAND ITS DUTY CYCLE TO 50%

be addressed in the following discussion is whether one needs Synchronous pulsing exhibits the lowest average etch rate to fully compensate in power to achieve the same average compared with CW, source pulsing, and bias pulsing; however, power as used in CW mode or a pulsed plasma might exhibit it exhibits the highest uniformity. The latter is attributed to a higher etch rate even without full power compensation. For the fact that, in fully synchronous pulsing, both source and this purpose, the gate overetch HBr/O2 chemistry is consid- bias are turned OFF during the after-glow phase, allowing ered. Such chemistry suffers from two major drawbacks: the charge and neutral relaxation, and hence, improving uniformity. first is the high nonuniformity in the etching pattern, and Despite the fact that the effective power deposited during the the second is the challenge to control the balance between pulsed plasma with 50% duty cycle drops to 50% of the CW etching and deposition. Tables VII–IX summarize the etch- mode, the average etch rate and the maximum etch rate over ing characteristics for this chemistry utilizing pulsed plasma the wafer do not drop by 50%, as illustrated in Table VII. with different power levels. The following facts are evident. In Table VIII, the impact of the pulse frequency while utilizing

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Fig. 13. SEM profiles for 35-nm gate etching. (Left) CW baseline mi- crotrenching occurs. (Right) Synchronous pulsed mode applied for the SL step. No microtrenching is observed. synchronous pulse mode is presented. Although the average RF power is the same for all frequencies (1, 3, and 5 kHz), the higher the frequency, the higher the average and maximum etch rates. Bearing in mind that the pulse duration is shorter for a higher frequency, the drop in ion density is less for a higher frequency for the same duty cycle. Accordingly, the etch rate is higher. Finally, Table IX elucidates the effect of power compensation on the etch characteristics. It is obvious that, by compensating the source and the bias power for synchronous pulsed plasma mode, the average etch rate and its peak value exceed the CW ones. By compensating for the source power, only the average etch rate recovers while maintaining a more Fig. 14. (Online color) Comparison of cumulative antenna MOS structure uniform etch pattern and a deposition-free etch process. The gate leakage for CW baseline and synchronous pulsed plasma at 1 kHz and same trend is available for bias pulsing only, in which the 50% duty cycle. bias power is doubled to compensate for the etch rate drop. As the plasma species densities remain almost unchanged while pulsing the bias only in the ICP reactor, the ion energy, and accordingly the etch rate, increases by doubling the bias power. The aforementioned discussion just confirms the nonlinearity in plasma properties while operating in pulsed mode. Moreover, it reflects the different etching natures of pulsed plasma com- pared with the CW mode.

B. Sub-50-nm DRAM CD Uniformity and Profile Control To demonstrate the benefits of pulsed ICP plasmas in the presence of synchronous pulsed substrate bias, sub-50-nm Fig. 15. (Online color) PID monitor tool setup for the evaluation of PID. A Si DRAM gate application is considered. Tokashiki et al. [42] substrate is grounded, and the poly-Si pad is biased as a gate electrode. has demonstrated that, for 35-nm gate etching, the profiles for CW and synchronous pulsed modes are comparable for different pulse frequencies, duty cycles, and phase lags. It is worth mentioning that the synchronous pulsed mode profile was achieved by a one-to-one CW process transfer without any further optimization in the process. Furthermore, it was demonstrated [42] that the CD (Critical Dimension) uniformity for synchronous pulsed mode was improved compared with the CW baseline by almost 2 nm. Fig. 13 further elucidates the improvement exhibited by the use of synchronous pulsing, in which profile distortion is eliminated by utilizing synchronous pulsed plasma mode for the soft landing (SL) step in the aforementioned gate etching. Microtrenching due to the microloading effect is present for the CW baseline, as illustrated in the left frame. Once synchronous pulsing mode is introduced to the SL step for two different frequencies (1 and 5 kHz) and at the same duty cycle, no microtrenching takes place any more. Fig. 16. (Online color) Typical gate I–V curve for different stresses.

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Fig. 17. (Online color) I–V curves for four different RF modes (no plasma as a reference/CW mode/source pulsing/synchronous pulsing) for the overetch step for three different antenna sizes.

C. Charge Damage baseline, which indicates the reduction in charge damage by PID is one of the major concerns in the design of future utilizing pulsed plasmas. semiconductor devices [45]–[51]. A direct byproduct of such To further investigate the impact of synchronous pulsing on PID can dramatically affect the threshold voltage of the CMOS PID, an additional test was performed at Samsung Electronics transistor. The drift in the threshold voltage deteriorates the Semiconductor R&D Center using different type of PID moni- electrical performance of the device. The pulsed plasma has toring wafers with different RF modes. MOS capacitors having the potential to reduce such an effect. To evaluate the reduction a PID antenna structure were adapted. Fig. 15 shows a cartoon in the damage induced by plasma while using synchronous of the MOS capacitor having a large area of poly-Si pad as pulsing mode, the gate current–voltage properties are measured the PID antenna with 60 Å of gate oxide underlying the poly- using Applied Materials Inc. in situ charge-up monitoring wafer Si and with the line and space pattern of poly-Si, where the with comb-shaped antenna circuit elements. Specifically, a space is varied from 0.1 to 0.5 µm. To evaluate the impact of 300-mm metal gate antenna MOS capacitor structure test wafer synchronous pulsing, the line and space poly-Si pattern with is used in characterizing plasma charging. Aluminum is used as ArF photo resist mask has been etched at three different RF the metal gate and plasma charging antenna electrode material. modes: 1) CW; 2) source pulsing; and 3) synchronous pulsing. The plasma charging damage sensitivity of the device can be After etching, the photo resist was stripped by a PID-less ashing controlled by the gate oxide quality from the process flow. tool, and an electrical test was conducted. In this structure, a Si The gate leakage from this test structure can also be evaluated. substrate (P type) is grounded, and poly-Si pad is biased as a A good agreement between leakage current measurements gate electrode. At each measurement, the gate oxide is stressed and charge-to-breakdown was established [52]. Fig. 14 shows with a given amount of charge density, and the gate voltage is the cumulative plot of the gate leakage on different antenna swept from 0 to 8 V, and the I–V curve is established. The first structures with two different process conditions. The current is measurement is achieved without applying any stress. This is measured after gate etching using CW mode and synchronous followed by gradually stressing the gate from 0.5 to 3 C/cm2. pulsed (1 kHz, 50%) mode, whereby both poly-Si etching rates The stress is achieved by applying 9 V for 0.1 s. As the are regulated to ensure they were virtually the same. Two stress increases, the gate current increases as well. The typical different antenna spacing are considered, i.e., 0.35 and 1.00 µm. I–V curves are presented in Fig. 16. The measurements were For both antennas, spacing reduction in the leakage current is conducted for different antenna sizes, different poly-Si spaces, observed for the synchronous pulsing condition versus the CW and different RF modes (no plasma as a reference/CW/source

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pulsing/synchronous pulsing) for the overetch step. The I–V [7] L. J. Overzet, Y. Lin, and L. Luo, “Modeling and measurements of the curves for the four aforementioned RF modes and for three negative ion flux from amplitude modulated RF discharges,” J. Appl. µ Phys., vol. 72, no. 12, pp. 5579–5592, Dec. 1992. different poly-Si spaces (0.1, 0.15, and 0.25 m) were evaluated [8] S. Samukawa and S. Furuoya, “Time-modulated electron cyclotron res- at 10 000 of antenna size, as demonstrated in Fig. 17. It is onance plasma discharge for controlling generation of reactive species,” obvious that the leakage current for the synchronous pulsing Appl. Phys. Lett., vol. 63, no. 15, pp. 2044–2046, Oct. 1993. [9] S. Samukawa and K. Terada, “Pulse-time modulated electron cyclotron case is lower at least by two orders of magnitude from the resonance plasma etching for highly selective, highly anisotropic, and CW and source pulsing case. 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Institute of Technology, Haifa, Israel, in 1997, 2000, [34] P. Subramonium and M. J. Kushner, “Extraction of negative ions from and 2004, respectively. pulsed electronegative inductively coupled plasmas having a radio- After his graduate studies, he was engaged in frequency substrate bias,” J. Vac. Sci. Technol. A, Vac. Surf. Films, vol. 22, research for one year as a Postdoctoral Research no. 3, pp. 534–544, Apr. 2004. Associate with the Technion-Israel Institute of Tech- [35] P. Subramonium and M. J. Kushner, “Pulsed plasmas as a method to nology on the design of future optical acceleration improve uniformity during materials processing,” J. Appl. Phys., vol. 96, structures. Afterward, during 2005 and 2006, he led no. 1, pp. 82–93, Jul. 2004. the first experimental demonstration of the Particle [36] P. Subramonium and M. J. Kushner, “Pulsed inductively coupled plasmas Acceleration by Stimulated Emission of Radiation as a method to recoup uniformity: Three-dimensional modeling study,” (PASER) at the Accelerator Test Facility, Brookhaven National Laboratory, Appl. Phys. Lett., vol. 85, no. 5, pp. 721–723, Aug. 2004. Upton, NY, as a Postdoctoral Research Associate. He is currently part of [37] S. Kumagai, T. Shiraiwa, and S. Samukawa, “Reactive etching of the Engineering Research and Development Group, Etch Division of Applied platinum-manganese using pulse-time-modulated chlorine plasma and Materials, Inc., Sunnyvale, CA, where he serves as an RF and Plasma Engineer. aH2 plasma post-etch corrosion treatment,” J. Vac. Sci. Technol. A, Vac. He has published more than 30 articles in top international scientific journals Surf. Films, vol. 22, no. 4, pp. 1093–1100, May 2004. and professional conference proceedings. In his field of expertise, he has [38] C. B. Labelle, R. Opilla, and A. Kornblit, “Plasma deposition of served on many scientific meeting organizing committees and advisory boards. fluorocarbon thin films from c − C4F8 using pulsed and continuous His current main fields of interest are the design of PASER-based medical RF excitation,” J. Vac. Sci. Technol. A, Vac. Surf. Films, vol. 23, no. 1, accelerators for cancer therapy and the RF design of future etchers for the pp. 190–196, Jan. 2005. 45-nm node technology and below. [39] T. Mukai, H. Hada, S. Tahara, H. Yoda, and S. Samukawa, “High- Dr. Banna was the recipient of a number of prizes and fellowships for his performance and damage-free magnetic film etching using pulse- research, among them the Guttwirth Prize, the Wolf Foundation Award, the time-modulated Cl2 plasma,” Jpn. J. Appl. Phys., vol. 45, no. 6B, Andrew and Erna Finci Viterbi Fellowship, and the Rothschild Fellowship. pp. 5542–5544, Jun. 2006. [40] T. Mukai, N. Ohshima, H. Hada, and S. Samukawa, “Reactive and anisotropic etching of magnetic tunnel junction films using pulse-time- modulated plasma,” J. Vac. Sci. Technol. A, Vac. Surf. Films, vol. 25, no. 3, pp. 432–436, Mar. 2007. [41] S. Samukawa, “Plasma-induced damage and its control in plasma etch- ing processes,” in Proc. Int. Conf. IC Des. Technol., Rabat, Morocco, Ankur Agarwal received the B.Tech. degree from Indian Institute of Technol- Sep. 2007, pp. 1–4. ogy Bombay, Mumbai, India, in 2003 and the M.S. and Ph.D. degrees from [42] K. Tokashiki, H. Cho, S. Banna, J.-Y. Lee, K. Shin, V. Todorow, the University of Illinois at Urbana-Champaign in 2005 and 2007, respectively, W.-S. Kim, K. Bal, S. Joo, J.-D. Choe, K. Ramaswamy, all in chemical engineering. His graduate thesis work focused on low-pressure A. Agarwal, S. Rauf, K. Collins, S. Choi, H. Cho, H. J. Kim, plasma sources for processing of advanced materials for use in sub-60-nm C. Lee, D. Lymberopoulus, J. Yoon, W. Han, and J.-T. technologies. Moon, “Synchronous pulse plasma operation upon source and bias In December 2007, he joined Applied Materials, Inc., Santa Clara, CA, where RFs for inductively coupled plasma for highly reliable gate etching he is responsible for computational modeling for design of plasma processing technology,” Jpn. J. Appl. Phys., vol. 48, Aug. 2009, to be published. systems. He has published seven articles in international scientific journals and [43] V. A. Godyak, R. B. Piejak, and B. M. Alexandrovich, “Electron energy presented more than 25 conference papers. distribution function measurements and plasma parameters in inductively Dr. Agarwal was the recipient of the Best Paper Award from Semiconductor coupled argon plasma,” Plasma Sources Sci. Technol., vol. 11, no. 4, Research Corporation in 2005 and 2006. pp. 525–543, Nov. 2002. [44] V. Godyak, “Plasma phenomena in inductive discharges,” Plasma Phys. Control. Fusion, vol. 45, no. 12A, pp. A399–A424, Nov. 2003. [45] T. Yunogami, T. Mizutani, K. Suzuki, and S. Nishimatsu, “Radiation dam- age in SiO2/Si induced by VUV photons,” Jpn. J. Appl. Phys., vol. 28, no. 10, pp. 2172–2176, Oct. 1989. [46] K. Hashimoto, “New phenomena of charge damage in plasma etching: Heavy damage only through dense-line antenna,” Jpn. J. Appl. Phys., Ken Tokashiki received the M.Sc. degree in plasma vol. 32, no. 12S, pp. 6109–6113, Dec. 1993. physics from Kyushu University, Fukuoka, Japan, in [47] T. Tatsumi, S. Fukuda, and S. Kadomura, “Radiation damage of SiO2 1989 and the Ph.D. degree in intelligent nanoprocess surface induced by vacuum ultraviolet photons of high-density plasma,” from Tohoku University, Sendai, Japan, in 2007. Jpn. J. Appl. Phys., vol. 33, no. 4B, pp. 2175–2178, Apr. 1994. In 1989, he joined NEC Corporation, where he [48] K. P. Cheung and C. P. Chang, “Plasma-charging damage: A physical was engaged in R&D activity for semiconductor study,” J. Appl. Phys., vol. 75, no. 9, pp. 4415–4426, May 1994. device process development, particularly in the dry [49] J. Keller, “Inductive plasmas for plasma processing,” Plasma Sources etching field. In 2004, he joined Samsung Electron- Sci. Technol., vol. 5, no. 2, pp. 166–172, May 1996. ics Company Ltd., Hwasung City, Korea, where he [50] K. Tokashiki, K. Noguchi, H. Miyamoto, and T. Horiuchi, “Correlation serves as a Principal Engineer with the Semiconduc- between electron temperature uniformity and charging damage in high tor R&D Center.

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Hong Cho received the M.Sc. degree in plasma physics from Seoul National Ken Collins received the B.A. degree in mathemat- University, Seoul, Korea, in 2000. ics from San Jose State University, San Jose, CA. In 2000, he joined Samsung Electronics Company Ltd., Hwasung City, In 1984, he joined Applied Materials, Inc., Korea, where he is engaged in advanced process development within the Sunnyvale, CA, as an Engineer with the CVD Prod- Memory Division. ucts Group. Since then, he has filled a number of dif- ferent positions within the company. Currently, as a Vice President in the Etch Products Business Group, he is the Head of the Engineering and Technology Group, Etch Division. He has authored numerous professional publications. He is the holder of more Shahid Rauf (S’89–M’95–SM’01) received the than a hundred patents. Ph.D. degree in electrical engineering from the Uni- versity of Wisconsin-Madison in 1995. His gradu- ate thesis work focused on nonlinear properties of plasma waves and their application to current drive in fusion plasmas. Following his Ph.D., he spent three years in Phillip Stout, photograph and biography not available at the time of the laboratory of Prof. M. Kushner at the Univer- publication. sity of Illinois at Urbana-Champaign. His research at the University of Illinois at Urbana-Champaign dealt with computational modeling of plasma dis- charges, plasma applications in semiconductor processing and lighting, and plasma display panels. He joined the Semiconductor Products Sector (SPS), Motorola, Inc., in December 1998. His work at Motorola SPS (subsequently Jeong-Yun Lee, photograph and biography not available at the time of Freescale Semiconductor) primarily focused on computational modeling of publication. plasma processes and equipment used in commercial integrated circuit man- ufacturing. His research addressed issues related to etching and deposition of thin films, atomic and molecular processes in processing plasmas, the dynamics of multifrequency magnetized plasmas, plasma-induced damage, surface processes during dielectric etching, and electrical performance of 3-D integrated circuits. In August 2006, he joined Applied Materials, Inc., Santa Junho Yoon received the M.S. degree in materials Clara, CA, where he currently directs the Plasma Technology Team within the engineering from Chungnam National University, Silicon Systems Group. His team is responsible for computational modeling Daejeon, Korea, in 2004. and plasma diagnostics for the design of plasma processing systems. He has In 1997, he joined Hynix Semiconductor Inc. published more than 50 articles in international scientific journals and presented (formerly Hyundai Electronics Corporation), where more than 90 conference papers. he engaged in R&D of the semiconductor process, Dr. Rauf has served on the program committee of the IEEE International particularly in the dry etching field. He retired from Conference on Plasma Science and has coedited two special issues of the IEEE Hynix and moved to Samsung Electronics Company TRANSACTIONS ON PLASMA SCIENCE. Ltd., Hwasung City, Korea, in 2006.

Valentin Todorow received the M.Sc. degree in mi- croelectronics from Slovak University of Technology Kyoungsub Shin received the B.S. and M.S. degrees in Bratislava, Bratislava, Slovakia, in 1981. in electrical engineering from Seoul National Uni- After receiving the M.Sc. degree, he spent about versity, Seoul, Korea, in 1992 and 1994, respectively, ten years in Bulgaria, developing TV and radio and the Ph.D. degree in electrical engineering and transmitters for communication industry. In 1994, he computer science from the University of California, joined the Conductor Etch Division, Applied Mate- Berkeley, in 2006. rials, Inc., Sunnyvale, CA, where he currently serves In 1994, he joined the Semiconductor R&D Cen- as a Distinguished Member of Technical Staff with ter, Samsung Electronics Company Ltd., Hwasung expertise in RF design. Over the years, he has been City, Korea, where he worked on dry etching process involved with the RF delivery system and plasma development and low-damage plasma process de- source design for DPS, DPSII, DPS AdvantEdge, DPS deep trench, and sign, including plasma diagnostics. He was with the producer etchers of Applied Materials. He is the author or coauthor of numerous University of California, Berkeley, where he worked on performance enhance- publications. He is the holder of more than 15 patents. He is well known by ment of nano-CMOS devices such as strained FinFET. He is currently a customers for his troubleshooting and problem-solving skills. Principal Engineer with the Semiconductor R&D Center, Samsung Electronics Company Ltd., where he has been working on dry etching process development for DRAM and Flash performance enhancement. He has also recently joined the Sub-30-nm Logic Process Development Project. His research interests include process and equipment development for the low-damage plasma process.

Kartik Ramaswamy received the B.E. degree in electrical engineering and the M.Sc. degree in math- ematics from Birla Institute of Technology and Sci- ence, Pilani, India, in 1989, and the M.Sc. and Ph.D. degrees in electrical engineering from the Univer- Sang-Jun Choi received the M.S. degree from Seoul National University, sity of Maryland, College Park, in 1994 and 1996, Seoul, Korea, in 1992 and the Ph.D. degree from the University of Southern respectively. California, Los Angles, in 2004. His M.S. thesis was on MOCVD of high He is currently with Applied Materials, Inc., dielectric materials, and his Ph.D. thesis was on fabrication and characterization Sunnyvale, CA, as the Director of the RF and Plasma of photonic devices with the III–V compound semiconductor. Engineering Group. He has authored numerous pro- He was with LG Semicon Co. Ltd., where he worked on etch process fessional publications. He is the holder of a large development for DRAM and logic devices until 1999. He is currently with number of patents. His main fields of interest are VHF high-power matching Applied Materials, Inc., Sunnyvale, CA, where he has been conducting etch circuits, plasma implantation, and high-voltage engineering. process development since February 2008.

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Han-Soo Cho received the B.S. and M.S. degrees in materials science and Changhun Lee received the B.S. degree in chem- engineering from the University of Hanyang, Seoul, Korea. istry from Korea University, Seoul, Korea, in 1986 He developed etch processes for 0.095-μm CMOS and SiGe BiCMOS and the Ph.D. degree in physical chemistry from the technology at Cypress Semiconductor R&D, San Jose, CA, in 2001. He was University of Iowa, Iowa City, in 1993. a Process Engineer with Novo Research, San Jose, where he was involved in In 1998, he joined Applied Materials, Inc., development of ozone-related cleaning processes in 2003. He is currently with Sunnyvale, CA, where he was responsible for metal Applied Materials, Inc., Sunnyvale, CA, where he is engaged in research and etch process development. From 2004 to 2007, he development of conductor and dielectric etch processes. was the Senior Technology Development Manager leading the Technology Development Group, where he successfully developed higher throughout and higher yielding metal etch equipment for semicon- ductor memory device makers. He is currently the Director of Conductor Etch Application Technology Development, Etch Business Unit, Applied Materials, Inc.

Hyun-Joong Kim received the Ph.D. degree from Purdue University, West Lafayette, IN, in 2007. Dimitris Lymberopoulos received the Ph.D. degree in chemical engineering He is currently with Applied Materials, Inc., Sunnyvale, CA, where he has from the University of Houston, Houston, TX. been conducting damage-free gate etch process development since February He is currently the Product Manager for Conductor Etch, Etch Business Unit, 2008. His research works have been the design and fabrication of PVDF- Applied Materials, Inc., Sunnyvale, CA. He has over ten years of industry based ultrasound transducer array and fabrication technology development for experience and has held various roles at Applied Materials, Inc. He has authored stretchable interconnects for flexible electronics. or coauthored more than 50 papers. He is the holder of a number of patents.

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