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E-Infrastructures H2020-EINFRA-2014-2015 EINFRA-4-2014: Pan-European High Performance Computing Infrastructure and Services PRACE-4IP PRACE Fourth Implementation Phase Project Grant Agreement Number: EINFRA-653838 D5.2 Market and Technology Watch Report Year 2. Final summary of results gathered Final Version: 1.0 Author(s): Ioannis Liabotis, GRNET Date: 21.04.2017 D5.2 Market and Technology Watch Report Year 2. Final summary of results gathered Project and Deliverable Information Sheet PRACE Project Project Ref. №: EINFRA-653838 Project Title: PRACE Fourth Implementation Phase Project Project Web Site: http://www.prace-project.eu Deliverable ID: D5.2 Deliverable Nature: Report Dissemination Level: Contractual Date of Delivery: PU * 30 / April / 2017 Actual Date of Delivery: 30 / April / 2017 EC Project Officer: Leonardo Flores Añover * - The dissemination level are indicated as follows: PU – Public, CO – Confidential, only for members of the consortium (including the Commission Services) CL – Classified, as referred to in Commission Decision 2991/844/EC. Document Control Sheet Title: Market and Technology Watch Report Year 2. Final Document summary of results gathered ID: D5.2 Version: 1.0 Status: Final Available at: http://www.prace-project.eu Software Tool: Microsoft Word 2010 File(s): D5.2.docx Written by: Ioannis Liabotis, GRNET PRACE-4IP-EINFRA-653838 i 21.04.2017 D5.2 Market and Technology Watch Report Year 2. Final summary of results gathered Authorship Contributors: Felip Moll, BSC Oscar Yerpes, BSC Francois Robin, CEA Jean-Philippe Nominé, CEA Guillaume Colin de Verdiere, CEA Carlo Cavazzoni, CINECA Bertrand Cirou, CINES Samuli Saarinen, CSC Susanna Salminen, CSC Dirk Pleiter, FZJ Eric Boyer, GENCI Philippe Segers, GENCI Ioannis Liabotis, GRNET Dimitrios Dellis, GRNET Branislav Jansik, IT4I-VSB Filip Stanek, IT4I-VSB Gert Svensson, KTH Andreas Johansson, LiU Torsten Wilde, LRZ Radek Januszewski, PSNC Norbert Meyer, PSNC Huub Stoffers, SURFsara Walter Lioen, SURFsara Damian Podareanu, SURFsara Reviewed by: Thomas Bönisch, HLRS Florian Berberich, FZJ Approved by: MB/TB Document Status Sheet Version Date Status Comments 0.1 15/February/2017 Draft Initial Draft with TOC and 1st set of contributions 0.2 03/March/2017 Draft 1st almost complete draft with all contributions received before the 02 March included. 0.3 05/March/2017 Draft Added CRAY contribution, fixed references, acronyms etc. 0.3 07/March/2017 Draft Added new section in Heterogeneous systems 0.4 08/March/2017 Draft Minor corrections 0.5 14/March/2017 Draft Added new section on HPC and Cloud, PRACE-4IP-EINFRA-653838 ii 21.04.2017 D5.2 Market and Technology Watch Report Year 2. Final summary of results gathered corrections to glossary and conclusions. 0.6 19/March/2017 Draft Incorporated extra comments and corrections from WP5 partners 1.0 21/April/2017 Final Addressed internal review comments PRACE-4IP-EINFRA-653838 iii 21.04.2017 D5.2 Market and Technology Watch Report Year 2. Final summary of results gathered Document Keywords Keywords: PRACE, HPC, Research Infrastructure, Market Survey, Technology Watch Disclaimer This deliverable has been prepared by the responsible Work Package of the Project in accordance with the Consortium Agreement and the Grant Agreement n° EINFRA-653838. It solely reflects the opinion of the parties to such agreements on a collective basis in the context of the Project and to the extent foreseen in such agreements. Please note that even though all participants to the Project are members of PRACE AISBL, this deliverable has not been approved by the Council of PRACE AISBL and therefore does not emanate from it nor should it be considered to reflect PRACE AISBL’s individual opinion. Copyright notices 2017 PRACE Consortium Partners. All rights reserved. This document is a project document of the PRACE project. All contents are reserved by default and may not be disclosed to third parties without the written consent of the PRACE partners, except as mandated by the European Commission contract EINFRA-653838 for reviewing and dissemination purposes. All trademarks and other rights on third party products mentioned in this document are acknowledged as own by the respective holders. PRACE-4IP-EINFRA-653838 iv 21.04.2017 D5.2 Market and Technology Watch Report Year 2. Final summary of results gathered Table of Contents Project and Deliverable Information Sheet ......................................................................................... i Document Control Sheet ........................................................................................................................ i Document Status Sheet ......................................................................................................................... ii Document Keywords ............................................................................................................................ iv Table of Contents .................................................................................................................................. v List of Figures ...................................................................................................................................... vii List of Tables ........................................................................................................................................ vii References and Applicable Documents ............................................................................................. vii List of Acronyms and Abbreviations ................................................................................................... x List of Project Partner Acronyms ..................................................................................................... xiii Executive Summary .............................................................................................................................. 1 1 Introduction ................................................................................................................................... 1 2 Worldwide HPC landscape and market overview ..................................................................... 3 2.1 A quick snapshot of HPC worldwide ................................................................................................. 3 2.1.1 TOP 500 ....................................................................................................................................... 3 2.2 Exascale plans China, Japan, USA and Europe ............................................................................... 5 2.2.1 Exascale plans China ................................................................................................................... 5 2.2.2 Exascale plans Japan ................................................................................................................... 5 2.2.3 Exascale plans USA ...................................................................................................................... 6 2.2.4 Exascale plans Europe ................................................................................................................. 6 2.3 Business analysis .................................................................................................................................. 7 3 Core technology and components ................................................................................................ 8 3.1 Processors ............................................................................................................................................. 8 3.1.1 AMD ............................................................................................................................................. 8 3.1.2 ARM .............................................................................................................................................. 8 3.1.3 IBM ............................................................................................................................................... 9 3.1.4 Intel ............................................................................................................................................... 9 3.2 Highly parallel components/compute engines ..................................................................................10 3.2.1 NVIDIA Tesla P100 .................................................................................................................... 10 3.2.2 Intel Knights Landing ................................................................................................................. 11 3.2.3 SW26010 ..................................................................................................................................... 12 3.3 Memory and storage technologies .....................................................................................................13 3.3.1 DRAM ......................................................................................................................................... 13 3.3.2 Non-volatile Memory .................................................................................................................. 14 3.3.3 Tapes .......................................................................................................................................... 16 3.4 Interconnect ........................................................................................................................................17