Towards a Common Hardware/Software Specification

Total Page:16

File Type:pdf, Size:1020Kb

Towards a Common Hardware/Software Specification Towards a common hardware/software specification and implementation approach for distributed, rel time and embedded systems, based on middlewares and object-oriented components Gregory Gailliard To cite this version: Gregory Gailliard. Towards a common hardware/software specification and implementation approach for distributed, rel time and embedded systems, based on middlewares and object-oriented components. Engineering Sciences [physics]. Université de Cergy Pontoise, 2010. English. tel-00524737 HAL Id: tel-00524737 https://tel.archives-ouvertes.fr/tel-00524737 Submitted on 8 Oct 2010 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. ECOLE DOCTORALE SCIENCES ET INGENIERIE de l’université de Cergy-Pontoise THESE Présentée pour obtenir le grade de docteur d’université Discipline : Sciences et Technologies de l’Information et de la Communication Spécialité : Informatique Vers une approche commune pour le logiciel et le matériel de spécification et d’implémentation des systèmes embarqués temps-réels distribués, basée sur les intergiciels et les composants orientés objet Application aux modèles de composants Software Communications Architecture (SCA) et Lightweight Corba Component Model (LwCCM) pour les systèmes de radio logicielle Towards a common hardware/software specification and implementation approach for distributed, real-time and embedded systems, based on middlewares and object-oriented components Application to Software Communications Architecture (SCA) and Lightweight Corba Component Model (LwCCM) component models for Software Defined Radio (SDR) systems par Grégory Gailliard Laboratoire Equipes Traitement des Images et du Signal (ETIS) - CNRS UMR 8051 Equipe Architecture, Systèmes, Technologies pour les unités Reconfigurables Embarquées (ASTRE) Thèse soutenue le Vendredi 5 Février 2010 Devant le jury composé de : M. Jean-Luc Dekeyser Président M. Michel Auguin Examinateur M. Christophe Dony Examinateur M. Laurent Pautet Rapporteur M. Guy Gogniat Rapporteur M. François Verdier Directeur de thèse M. Michel Sarlotte Invité 1 The devil lies in the details Proverb Everything should be made as simple as possible, but not simpler Albert Einstein Acknowledgments I would like to thank my thesis director, François Verdier, and my industrial tutor, Michel Sarlotte, for providing me with a very interesting Ph.D. topic. I appreciated the autonomy and trust they have given me throughout my thesis. I am grateful to Michel Sarlotte for having allowed me to have a trainee, Benjamin Turmel, who helped me a lot in the implementation of my ideas down to hardware. I also thank the members of the jury for having accepted to be part of my Ph.D. examinating board. I would also like to thank Bruno Counil for discussions about the SCA, Hugues Balp and Vin- cent Seignole for discussions about CCM, the IDL-to-VDHL mapping and participation in the SPICES project. I also thank Eric Nicollet for discussions about the MDE approach and the importance of an IDL-to- VHDL mapping. I am very grateful to Bertrand Caron for its precious advices about VHDL and for the discussions about the Transceiver and the MHAL. I also thank Bertrand Mercier for our common work on DiMITRI. My thanks are also due to Bernard Candaele for its suggestions and the trainings. I acknowledge my colleagues during three years for providing me a very nice work environment at Thales: Helene Came, Frédéric Dotto, Olivier Pierrelee, Eric Combot, Laurent Chaillou, François Kasperski, Jérôme Quevremont, Rémi Chau, Matthieu Paccot, Pauline Roux, Jessica Bouvier, Laurent Chmelesvki, Eric Chabod, Vincent Chiron, Eliane Carimantrant and all the others. My gratitude also goes to Lesly Levy for its native rereading of some chapters. Finally, I thank my close family members and relatives for their support and encouragements all through this work. 3 4 Acknowledgments Contents Acknowledgments 3 1 Introduction 9 1.1 Context: Real-Time, Heterogeneous and Distributed Hardware/Software Embedded Systems 9 1.2 ThesisOrganization.. ..... ...... ..... ...... ..... ....... 13 2 Models and Methodologies for Embedded Systems Design 15 2.1 Introduction.................................... ..... 15 2.2 Languages ....................................... 18 2.3 ModelsofComputation ............................. ..... 22 2.4 ModelsofCommunication . ...... 23 2.5 Parallel Programming Models . ........ 24 2.6 Traditional hardware/software design flow . .............. 25 2.7 System-Level Design (SLD) with Transaction-Level Modeling (TLM) . 27 2.8 Model-Based Design (MBD) and Model-Driven Engineering (MDE) .......... 29 2.9 Platform-BasedDesign(PBD) . ........ 33 2.10Conclusion ..................................... 33 3 Hardware Communication Infrastructure Architecture 35 3.1 On-chipbuses .................................... 35 3.2 Interconnection Sockets . ........ 38 3.3 Network-On-Chip (NoC) Architecture . ........... 44 3.4 Conclusion ...................................... 49 4 Object-Oriented Design (OOD) 51 4.1 FundamentalConcepts ..... ...... ..... ...... ..... .. ...... 52 4.2 Object-Oriented Hardware Design . .......... 63 4.3 Synthesis ....................................... 84 4.4 Conclusion ...................................... 84 5 6 Contents 5 Middlewares 89 5.1 MiddlewareDefinition . ..... ...... ...... ..... ...... ...... 90 5.2 Middleware Requirements . ....... 90 5.3 Middleware Classification . ........ 92 5.4 OMG Object Management Architecture (OMA) . ......... 97 5.5 CORBAObjectModel ................................ 99 5.6 State of the art on hardware implementations of object middlewares . 119 5.7 Conclusion ...................................... 126 6 Component-Oriented Architecture 127 6.1 Introduction.................................... 129 6.2 Definitions ...................................... 131 6.3 From Object-Oriented to Component-Oriented approach . ................132 6.4 Principles ...................................... 135 6.5 TechnicalConcepts ............................... 137 6.6 Software Component Models . 144 6.7 Hardware Component Models for FPGAs and ASICs . ..........163 6.8 SystemComponentModels . 173 6.9 Conclusion ...................................... 175 7 Unified Component and Middleware Approach for Hardware/Software Embedded Systems 179 7.1 Introduction.................................... 180 7.2 Component-Oriented Design Flow . ......... 181 7.3 Mapping OO component-based specification to system, SW and HW components . 185 7.4 Hardware Application of the Software Communications Architecture . 235 7.5 Hardware Middleware Architecture Framework . .............245 7.6 Limitations ..................................... 249 7.7 Conclusion ...................................... 250 8 Experiments 253 8.1 Introduction.................................... 253 8.2 DiMITRI MPSoC for Digital Radio Mondiale (DRM) . ..........254 8.3 High-DataRateOFDMModem . 258 8.4 Conclusion ...................................... 276 9 Conclusions and Perspectives 279 9.1 Problems ........................................ 279 7 9.2 Synthesis ....................................... 279 9.3 Contributions ................................... 280 9.4 Limitations ..................................... 282 9.5 Conclusions..................................... 282 9.6 Perspectives.................................... 283 A CORBA IDL3 to VHDL and SystemC RTL Language Mappings 285 A.1 NamingConvention................................ 286 A.2 Common Standard Interfaces and Protocols . ............287 A.3 Constant........................................ 295 A.4 BasicDataTypes .................................. 295 A.5 ConstructedDataTypes. ....... 297 A.6 Attribute....................................... 310 A.7 ScopedName ...................................... 310 A.8 Module .......................................... 310 A.9 Interface....................................... 311 A.10 Operation Invocation . ........ 318 A.11Object......................................... 321 A.12Inheritance .................................... 321 A.13InterfaceAttribute. ......... 322 A.14ComponentFeature .. ..... ...... ..... ...... ..... .. 324 A.15NotSupportedFeatures . ........ 326 A.16MappingSummary ................................. 326 B Personal Bibliography 329 C Résumé Etendu 331 List of Figures 335 List of Tables 339 List of Listings 340 Acronyms 343 Glossary 347 Bibliography 351 Chapter 1 Introduction Contents 1.1 Context: Real-Time, Heterogeneous and Distributed Hardware/Software Embedded Systems 9 1.1.1 Modemapplications . .... .... .... .... ... .... .... .. 9 1.1.2 EmbeddedSystems............................... 10 1.1.3 Middlewares ................................... 10 1.1.4 Real-TimeSystems.. .... .... .... .... ... .... .... .. 10 1.1.5 SoftwareDefinedRadio . .. 10 1.1.6 Software Communications Architecture (SCA) Requirements ......... 12 1.1.7 ProblemsFormulation . ... 13 1.2 ThesisOrganization .. ... .... .... .... .... ... .... .. ..... 13 1.1 Context: Real-Time, Heterogeneous and Distributed Hardware/Soft- ware Embedded Systems
Recommended publications
  • The Model Transformation Language of the VIATRA2 Framework
    View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by Elsevier - Publisher Connector Science of Computer Programming 68 (2007) 214–234 www.elsevier.com/locate/scico The model transformation language of the VIATRA2 framework Daniel´ Varro´ ∗, Andras´ Balogh Budapest University of Technology and Economics, Department of Measurement and Information Systems, H-1117, Magyar tudosok krt. 2., Budapest, Hungary OptXware Research and Development LLC, Budapest, Hungary Received 15 August 2006; received in revised form 17 April 2007; accepted 14 May 2007 Available online 5 July 2007 Abstract We present the model transformation language of the VIATRA2 framework, which provides a rule- and pattern-based transformation language for manipulating graph models by combining graph transformation and abstract state machines into a single specification paradigm. This language offers advanced constructs for querying (e.g. recursive graph patterns) and manipulating models (e.g. generic transformation and meta-transformation rules) in unidirectional model transformations frequently used in formal model analysis to carry out powerful abstractions. c 2007 Elsevier B.V. All rights reserved. Keywords: Model transformation; Graph transformation; Abstract state machines 1. Introduction The crucial role of model transformation (MT) languages and tools for the overall success of model-driven system development has been revealed in many surveys and papers during the recent years. To provide a standardized support for capturing queries, views and transformations between modeling languages defined by their standard MOF metamodels, the Object Management Group (OMG) has recently issued the QVT standard. QVT provides an intuitive, pattern-based, bidirectional model transformation language, which is especially useful for synchronization kind of transformations between semantically equivalent modeling languages.
    [Show full text]
  • JHDF5 (HDF5 for Java) 19.04
    JHDF5 (HDF5 for Java) 19.04 Introduction HDF5 is an efficient, well-documented, non-proprietary binary data format and library developed and maintained by the HDF Group. The library provided by the HDF Group is written in C and available under a liberal BSD-style Open Source software license. It has over 600 API calls and is very powerful and configurable, but it is not trivial to use. SIS (formerly CISD) has developed an easy-to-use high-level API for HDF5 written in Java and available under the Apache License 2.0 called JHDF5. The API works on top of the low-level API provided by the HDF Group and the files created with the SIS API are fully compatible with HDF5 1.6/1.8/1.10 (as you choose). Table of Content Introduction ................................................................................................................................ 1 Table of Content ...................................................................................................................... 1 Simple Use Case .......................................................................................................................... 2 Overview of the library ............................................................................................................... 2 Numeric Data Types .................................................................................................................... 3 Compound Data Types ................................................................................................................ 4 System
    [Show full text]
  • Model Transformation Languages Under a Magnifying Glass:A Controlled Experiment with Xtend, ATL, And
    CORE Metadata, citation and similar papers at core.ac.uk Provided by The IT University of Copenhagen's Repository Model Transformation Languages under a Magnifying Glass: A Controlled Experiment with Xtend, ATL, and QVT Regina Hebig Christoph Seidl Thorsten Berger Chalmers | University of Gothenburg Technische Universität Braunschweig Chalmers | University of Gothenburg Sweden Germany Sweden John Kook Pedersen Andrzej Wąsowski IT University of Copenhagen IT University of Copenhagen Denmark Denmark ABSTRACT NamedElement name : EString In Model-Driven Software Development, models are automatically processed to support the creation, build, and execution of systems. A large variety of dedicated model-transformation languages exists, Project Package Class StructuralElement modifiers : Modifier promising to efficiently realize the automated processing of models. [0..*] packages To investigate the actual benefit of using such specialized languages, [0..*] subpackages [0..*] elements Modifier [0..*] classes we performed a large-scale controlled experiment in which over 78 PUBLIC STATIC subjects solve 231 individual tasks using three languages. The exper- FINAL Attribute Method iment sheds light on commonalities and differences between model PRIVATE transformation languages (ATL, QVT-O) and on benefits of using them in common development tasks (comprehension, change, and Figure 1: Syntax model for source code creation) against a modern general-purpose language (Xtend). Our results show no statistically significant benefit of using a dedicated 1 INTRODUCTION transformation language over a modern general-purpose language. In Model-Driven Software Development (MDSD) [9, 35, 38] models However, we were able to identify several aspects of transformation are automatically processed to support creation, build and execution programming where domain-specific transformation languages do of systems.
    [Show full text]
  • Sun 64-Bit Binary Alignment Proposal
    1 KMIP 64-bit Binary Alignment Proposal 2 3 To: OASIS KMIP Technical Committee 4 From: Matt Ball, Sun Microsystems, Inc. 5 Date: May 1, 2009 6 Version: 1 7 Purpose: To propose a change to the binary encoding such that each part is aligned to an 8-byte 8 boundary 9 10 Revision History 11 Version 1, 2009-05-01: Initial version 12 Introduction 13 The binary encoding as defined in the 1.0 version of the KMIP draft does not maintain alignment to 8-byte 14 boundaries within the message structure. This causes problems on hard-aligned processors, such as the 15 ARM, that are not able to easily access memory on addresses that are not aligned to 4 bytes. 16 Additionally, it reduces performance on modern 64-bit processors. For hard-aligned processors, when 17 unaligned memory contents are requested, either the compiler has to add extra instructions to perform 18 two aligned memory accesses and reassemble the data, or the processor has to take a „trap‟ (i.e., an 19 interrupt generated on unaligned memory accesses) to correctly assemble the memory contents. Either 20 of these options results in reduced performance. On soft-aligned processors, the hardware has to make 21 two memory accesses instead of one when the contents are not properly aligned. 22 This proposal suggests ways to improve the performance on hard-aligned processors by aligning all data 23 structures to 8-byte boundaries. 24 Summary of Proposed Changes 25 This proposal includes the following changes to the KMIP 0.98 draft submission to the OASIS KMIP TC: 26 Change the alignment of the KMIP binary encoding such that each part is aligned to an 8-byte 27 boundary.
    [Show full text]
  • Data Transformation Language (DTL)
    DTL Data Transformation Language Phillip H. Sherrod Copyright © 2005-2006 All rights reserved www.dtreg.com DTL is a full programming language built into the DTREG program. DTL makes it easy to generate new variables, transform and combine input variables and select records to be used in the analysis. Contents Contents...................................................................................................................................................3 Introduction .............................................................................................................................................6 Introduction to the DTL Language......................................................................................................6 Using DTL For Data Transformations ....................................................................................................7 The main() function.............................................................................................................................7 Global Variables..................................................................................................................................8 Implicit Global Variables ................................................................................................................8 Explicit Global Variables ................................................................................................................9 Static Global Variables..................................................................................................................11
    [Show full text]
  • Making Classes Provable Through Contracts, Models and Frames
    View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by CiteSeerX DISS. ETH NO. 17610 Making classes provable through contracts, models and frames A dissertation submitted to the SWISS FEDERAL INSTITUTE OF TECHNOLOGY ZURICH (ETH Zurich)¨ for the degree of Doctor of Sciences presented by Bernd Schoeller Diplom-Informatiker, TU Berlin born April 5th, 1974 citizen of Federal Republic of Germany accepted on the recommendation of Prof. Dr. Bertrand Meyer, examiner Prof. Dr. Martin Odersky, co-examiner Prof. Dr. Jonathan S. Ostroff, co-examiner 2007 ABSTRACT Software correctness is a relation between code and a specification of the expected behavior of the software component. Without proper specifica- tions, correct software cannot be defined. The Design by Contract methodology is a way to tightly integrate spec- ifications into software development. It has proved to be a light-weight and at the same time powerful description technique that is accepted by software developers. In its more than 20 years of existence, it has demon- strated many uses: documentation, understanding object-oriented inheri- tance, runtime assertion checking, or fully automated testing. This thesis approaches the formal verification of contracted code. It conducts an analysis of Eiffel and how contracts are expressed in the lan- guage as it is now. It formalizes the programming language providing an operational semantics and a formal list of correctness conditions in terms of this operational semantics. It introduces the concept of axiomatic classes and provides a full library of axiomatic classes, called the mathematical model library to overcome prob- lems of contracts on unbounded data structures.
    [Show full text]
  • Model-Based Hardware Generation and Programming - the MADES Approach
    1 Model-based hardware generation and programming - the MADES approach Ian Gray∗, Nikos Matragkas∗, Neil C. Audsley, Leandro Soares Indrusiak, Dimitris Kolovos, Richard Paige University of York, York, U.K. F Abstract—This paper gives an overview of the model-based hardware the proposed hardware development flow and the way generation and programming approach proposed within the MADES that embedded software can be targeted at the resulting project. MADES aims to develop a model-driven development process complex architectures. for safety-critical, real-time embedded systems. MADES defines a sys- tems modelling language based on subsets of MARTE and SysML that allows iterative refinement from high-level specification down to 1.1 MADES Project Goals final implementation. The MADES project specifically focusses on three The MADES project (Model-based methods and tools unique features which differentiate it from existing model-driven develop- ment frameworks. First, model transformations in the Epsilon modelling for Avionics and surveillance embeddeD systEmS) aims framework are used to move between system models and provide to develop the elements of a fully model-driven ap- traceability. Second, the Zot verification tool is employed to allow early proach for the design, validation, simulation, and code and frequent verification of the system being developed. Third, Compile- generation of complex embedded systems to improve Time Virtualisation is used to automatically retarget architecturally- the current practice in the field. MADES differentiates neutral software for execution on complex embedded architectures. itself from similar projects in that way that it covers This paper concentrates on MADES’s approach to the specification of hardware and the way in which software is refactored by Compile-Time all the phases of the development process: from system Virtualisation.
    [Show full text]
  • Steve Bernier, M.Sc
    Presented by: Steve Bernier, M.Sc., Research Manager Advanced Radio Systems Communications Research Centre Canada How Different Messaging Semantics Can Affect Applications Performances SCA applications are made of several software components typically connected in a pipeline configuration Using the SCA, software components can be implemented by different organizations Interactions between components requires a middleware The middleware for SCA is CORBA 2 How Different Messaging Semantics Can Affect Applications Performances This paper provides metrics comparing two types of CORBA interactions: One-way and Two-way Using CORBA, every interaction is transformed into a message sent from a source component to a destination component Two-way interactions Source is blocked until a response is received from the destination Synchronized with the target One-way interactions Source is not blocked until a response is received from the destination 3 levels of synchronization: with the middleware, with the transport, or with the server 3 How Different Messaging Semantics Can Affect Applications Performances Two-way messaging can lead to the empty pipeline problem 4 How Different Messaging Semantics Can Affect Applications Performances One-way messaging can lead to the packet reordering problem 3, 2, 1 2, 3, 1 3, 1, 2 5 How Different Messaging Semantics Can Affect Applications Performances This paper provides metrics for 4 tests. All tests work as follows: Pipeline configuration of 4 components The first component produces 1000 packets
    [Show full text]
  • Multithreaded Programming Guide
    Multithreaded Programming Guide Sun Microsystems, Inc. 4150 Network Circle Santa Clara, CA 95054 U.S.A. Part No: 816–5137–10 January 2005 Copyright 2005 Sun Microsystems, Inc. 4150 Network Circle, Santa Clara, CA 95054 U.S.A. All rights reserved. This product or document is protected by copyright and distributed under licenses restricting its use, copying, distribution, and decompilation. No part of this product or document may be reproduced in any form by any means without prior written authorization of Sun and its licensors, if any. Third-party software, including font technology, is copyrighted and licensed from Sun suppliers. Parts of the product may be derived from Berkeley BSD systems, licensed from the University of California. UNIX is a registered trademark in the U.S. and other countries, exclusively licensed through X/Open Company, Ltd. Sun, Sun Microsystems, the Sun logo, docs.sun.com, AnswerBook, AnswerBook2, and Solaris are trademarks or registered trademarks of Sun Microsystems, Inc. in the U.S. and other countries. All SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC International, Inc. in the U.S. and other countries. Products bearing SPARC trademarks are based upon an architecture developed by Sun Microsystems, Inc. The OPEN LOOK and Sun™ Graphical User Interface was developed by Sun Microsystems, Inc. for its users and licensees. Sun acknowledges the pioneering efforts of Xerox in researching and developing the concept of visual or graphical user interfaces for the computer industry. Sun holds a non-exclusive license from Xerox to the Xerox Graphical User Interface, which license also covers Sun’s licensees who implement OPEN LOOK GUIs and otherwise comply with Sun’s written license agreements.
    [Show full text]
  • IBM Informix Glossary
    IBM Informix Version 11.70 IBM Informix Glossary SC27-3531-00 IBM Informix Version 11.70 IBM Informix Glossary SC27-3531-00 Note Before using this information and the product it supports, read the information in “Notices” on page B-1. This document contains proprietary information of IBM. It is provided under a license agreement and is protected by copyright law. The information contained in this publication does not include any product warranties, and any statements provided in this manual should not be interpreted as such. When you send information to IBM, you grant IBM a nonexclusive right to use or distribute the information in any way it believes appropriate without incurring any obligation to you. © Copyright IBM Corporation 1996, 2010. US Government Users Restricted Rights – Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Glossary ..................................1-1 Numerics ....................................1-1 A......................................1-1 B ......................................1-3 C......................................1-4 D......................................1-8 E......................................1-13 F......................................1-15 G......................................1-16 H......................................1-17 I......................................1-17 J......................................1-19 K......................................1-19 L......................................1-19 M......................................1-21 N......................................1-22
    [Show full text]
  • Feather: a Feature Model Transformation Language
    1 Feather: A Feature Model Transformation Language Ahmet Serkan Karataş * area of usage to include dynamic systems that can face Abstract: Feature modeling has been a very popular approach fluctuating context conditions, changing user requirements, for variability management in software product lines. Building need to include and facilitate novel resources rapidly, and so on. a feature model requires substantial domain expertise, however, The constant need for adaptation required to enhance the even experts cannot foresee all future possibilities. Changing variability management capabilities of SPLs to cover runtime, requirements can force a feature model to evolve in order to which gave birth to the dynamic software product lines adapt to the new conditions. Feather is a language to describe (DSPLs). In addition to the properties they inherit from SPLs, model transformations that will evolve a feature model. This DSPLs have several other properties such as dynamic article presents the structure and foundations of Feather. First, variability management, flexible variation points and binding the language elements, which consist of declarations to times, context awareness, and self-adaptability [21]. characterize the model to evolve and commands to manipulate A major factor affecting the success of a software product its structure, are introduced. Then, semantics grounding in line, classic or dynamic, is the variability management activity feature model properties are given for the commands in order it incorporates [12]. In the literature there are reports of various to provide precise command definitions. Next, an interpreter variability modeling and management approaches such as that can realize the transformations described by the commands in a Feather script is presented.
    [Show full text]
  • Review of FPD's Languages, Compilers, Interpreters and Tools
    ISSN 2394-7314 International Journal of Novel Research in Computer Science and Software Engineering Vol. 3, Issue 1, pp: (140-158), Month: January-April 2016, Available at: www.noveltyjournals.com Review of FPD'S Languages, Compilers, Interpreters and Tools 1Amr Rashed, 2Bedir Yousif, 3Ahmed Shaban Samra 1Higher studies Deanship, Taif university, Taif, Saudi Arabia 2Communication and Electronics Department, Faculty of engineering, Kafrelsheikh University, Egypt 3Communication and Electronics Department, Faculty of engineering, Mansoura University, Egypt Abstract: FPGAs have achieved quick acceptance, spread and growth over the past years because they can be applied to a variety of applications. Some of these applications includes: random logic, bioinformatics, video and image processing, device controllers, communication encoding, modulation, and filtering, limited size systems with RAM blocks, and many more. For example, for video and image processing application it is very difficult and time consuming to use traditional HDL languages, so it’s obligatory to search for other efficient, synthesis tools to implement your design. The question is what is the best comparable language or tool to implement desired application. Also this research is very helpful for language developers to know strength points, weakness points, ease of use and efficiency of each tool or language. This research faced many challenges one of them is that there is no complete reference of all FPGA languages and tools, also available references and guides are few and almost not good. Searching for a simple example to learn some of these tools or languages would be a time consuming. This paper represents a review study or guide of almost all PLD's languages, interpreters and tools that can be used for programming, simulating and synthesizing PLD's for analog, digital & mixed signals and systems supported with simple examples.
    [Show full text]