Hierarchical Data Visualization in Desktop Virtual Reality

Total Page:16

File Type:pdf, Size:1020Kb

Hierarchical Data Visualization in Desktop Virtual Reality Hierarchical Data Visualization In Desktop Virtual Reality by David K. Modjeska A thesis submitted in conformity with the requirements for the degree of Doctor of Philosophy Graduate Department of Computer Science University of Toronto © Copyright by David Modjeska 2000 Hierarchical Data Visualization in Desktop Virtual Reality by David K. Modjeska Ph.D. Thesis Department of Computer Science University of Toronto 2000 Abstract While desktop virtual reality (VR) offers a way to visualize structure in large information sets, there have been relatively few empirical investigations of visualization designs in this domain. This thesis reports the development and testing of a series of prototype desktop VR worlds, which were designed to support navigation during information visualization and retrieval. Four methods were used for data collection: search task scoring, subjective questionnaires, navigational activity logging and analysis, and administration of tests for spatial and structure-learning ability. The combination of these research methods revealed significant effects of user abilities, information environment designs, and task learning. The first of four studies compared three versions of a structured virtual landscape, finding significant differences in sense of presence, ease of use, and overall enjoyment; there was, however, no signifi- cant difference in performance among the three landscape versions. The second study found a hypertext interface to be superior to a VR interface for task performance, ease of use, and rated effi- ciency; nevertheless, the VR interface was rated as more enjoyable. The third study used a new layout algorithm; the resulting prototype was rated as easier to use and more efficient than the previous VR version. In the fourth study, a zoomable, map-like view of the newest VR prototype was developed. Experimental participants found the map-view superior to the 3D-view for task performance and rated efficiency. Overall, this research did not find a performance advantage for using 3D versions of VR. In addition, the results of the fourth study found that people in the lowest quartile of spatial ability had signifi- cantly lower search performance (relative to the highest three quartiles) in a VR world. This finding suggests that individual differences for traits such as spatial ability may be important in determining the usability and acceptability of VR environments. In addition to the experimental results summarized above, this thesis also developed and refined a methodology for investigating tasks, users, and software in 3D environments. This methodology in- cluded tests for spatial and structure-learning abilities, as well as logging and analysis of a user’s navigational activities. ii Table of Contents Abstract . ii Acknowledgements . Error! Bookmark not defined. Table of Contents . iii List of Tables . Error! Bookmark not defined. List of Figures . Error! Bookmark not defined. List of Appendices . .Error! Bookmark not defined. 1. Introduction . 1 1.1. Research Context . .1 1.2. Research Questions . 2 1.3. Thesis Perspective and Organization . 7 2. Related Research . Error! Bookmark not defined. 2.1. Introduction . Error! Bookmark not defined. 2.2. Cognitive Engineering and UI Metaphors . Error! Bookmark not defined. 2.3. Information Structuring . .Error! Bookmark not defined. 2.3.1. Semantic vs. Physical Models . Error! Bookmark not defined. 2.3.2. Structure Types . Error! Bookmark not defined. 2.3.3. Hierarchical Structures . Error! Bookmark not defined. 2.3.4. Experimental Results . .Error! Bookmark not defined. 2.3.5. Designs for Hypermedia and Spatial Worlds . Error! Bookmark not defined. 2.3.6. Discussion . Error! Bookmark not defined. iii 2.4. Physical and Information Exploration . Error! Bookmark not defined. 2.4.1. General Models . .Error! Bookmark not defined. 2.4.2. Mental Maps . Error! Bookmark not defined. 2.4.3. Wayfinding . Error! Bookmark not defined. 2.4.4. Hypermedia Environments . Error! Bookmark not defined. 2.4.5. Spatial Ability in Electronic Environments . Error! Bookmark not defined. 2.4.6. Discussion . .Error! Bookmark not defined. 2.5. Information Visualization . Error! Bookmark not defined. 2.5.1. Fisheye Views . .Error! Bookmark not defined. 2.5.2. Semantic Zooming . Error! Bookmark not defined. 2.5.3. Cone Tree, Hyperbolic Browser, and Butterfly . Error! Bookmark not defined. 2.5.4. Visualization for Information Retrieval . Error! Bookmark not defined. 2.5.5. Spaces for Public Information . Error! Bookmark not defined. 2.5.6. Visualizing Hypermedia Structure . Error! Bookmark not defined. 2.5.7. Discussion . .Error! Bookmark not defined. 2.6. Summary . Error! Bookmark not defined. 2.7. Conclusions . Error! Bookmark not defined. 3. Study 1 – Day, Dusk, and Night Worlds . Error! Bookmark not defined. iv 3.1. Introduction . Error! Bookmark not defined. 3.2. Methodology . Error! Bookmark not defined. 3.2.1. Apparatus . Error! Bookmark not defined. 3.2.1.1. Description . Error! Bookmark not defined. 3.2.1.2. Development . Error! Bookmark not defined. 3.2.2. Procedure . Error! Bookmark not defined. 3.2.3. Measures . .Error! Bookmark not defined. 3.3. Results . Error! Bookmark not defined. 3.3.1. Description . Error! Bookmark not defined. 3.3.2. Underlying Factors of Performance . Error! Bookmark not defined. 3.3.3. Effects on User Strategy . Error! Bookmark not defined. 3.3.4. Learning Effects within Blocks . Error! Bookmark not defined. 3.3.5. Experimental Control . Error! Bookmark not defined. 3.4. Conclusions . Error! Bookmark not defined. 4. Study 2 – VR vs. Hypertext . Error! Bookmark not defined. 4.1. Introduction . Error! Bookmark not defined. 4.2. Methodology . Error! Bookmark not defined. 4.2.1. Apparatus . Error! Bookmark not defined. v 4.2.2. Procedure . Error! Bookmark not defined. 4.2.3. Measures . .Error! Bookmark not defined. 4.3. Results . Error! Bookmark not defined. 4.3.1. Description . Error! Bookmark not defined. 4.3.2. Underlying Factors of Performance . Error! Bookmark not defined. 4.3.3. Effects on User Strategy . ..
Recommended publications
  • A Type Inference on Executables
    A Type Inference on Executables Juan Caballero, IMDEA Software Institute Zhiqiang Lin, University of Texas at Dallas In many applications source code and debugging symbols of a target program are not available, and what we can only access is the program executable. A fundamental challenge with executables is that during compilation critical information such as variables and types is lost. Given that typed variables provide fundamental semantics of a program, for the last 16 years a large amount of research has been carried out on binary code type inference, a challenging task that aims to infer typed variables from executables (also referred to as binary code). In this article we systematize the area of binary code type inference according to its most important dimensions: the applications that motivate its importance, the approaches used, the types that those approaches infer, the implementation of those approaches, and how the inference results are evaluated. We also discuss limitations, point to underdeveloped problems and open challenges, and propose further applications. Categories and Subject Descriptors: D.3.3 [Language Constructs and Features]: Data types and struc- tures; D.4.6 [Operating Systems]: Security and Protection General Terms: Languages, Security Additional Key Words and Phrases: type inference, program executables, binary code analysis ACM Reference Format: Juan Caballero and Zhiqiang Lin, 2015. Type Inference on Executables. ACM Comput. Surv. V, N, Article A (January YYYY), 35 pages. DOI:http://dx.doi.org/10.1145/0000000.0000000 1. INTRODUCTION Being the final deliverable of software, executables (or binary code, as we use both terms interchangeably) are everywhere. They contain the final code that runs on a system and truly represent the program behavior.
    [Show full text]
  • Targeting Embedded Powerpc
    Freescale Semiconductor, Inc. EPPC.book Page 1 Monday, March 28, 2005 9:22 AM CodeWarrior™ Development Studio PowerPC™ ISA Communications Processors Edition Targeting Manual Revised: 28 March 2005 For More Information: www.freescale.com Freescale Semiconductor, Inc. EPPC.book Page 2 Monday, March 28, 2005 9:22 AM Metrowerks, the Metrowerks logo, and CodeWarrior are trademarks or registered trademarks of Metrowerks Corpora- tion in the United States and/or other countries. All other trade names and trademarks are the property of their respective owners. Copyright © 2005 by Metrowerks, a Freescale Semiconductor company. All rights reserved. No portion of this document may be reproduced or transmitted in any form or by any means, electronic or me- chanical, without prior written permission from Metrowerks. Use of this document and related materials are governed by the license agreement that accompanied the product to which this manual pertains. This document may be printed for non-commercial personal use only in accordance with the aforementioned license agreement. If you do not have a copy of the license agreement, contact your Metrowerks representative or call 1-800-377- 5416 (if outside the U.S., call +1-512-996-5300). Metrowerks reserves the right to make changes to any product described or referred to in this document without further notice. Metrowerks makes no warranty, representation or guarantee regarding the merchantability or fitness of its prod- ucts for any particular purpose, nor does Metrowerks assume any liability arising
    [Show full text]
  • Interprocedural Analysis of Low-Level Code
    TECHNISCHE UNIVERSITAT¨ MUNCHEN¨ Institut fur¨ Informatik Lehrstuhl Informatik II Interprocedural Analysis of Low-Level Code Andrea Flexeder Vollstandiger¨ Abdruck der von der Fakultat¨ fur¨ Informatik der Technischen Universitat¨ Munchen¨ zur Erlangung des akademischen Grades eines Doktors der Naturwissenschaften (Dr. rer. nat.) genehmigten Dissertation. Vorsitzender: Univ.-Prof. Dr. H. M. Gerndt Prufer¨ der Dissertation: 1. Univ.-Prof. Dr. H. Seidl 2. Dr. A. King, University of Kent at Canterbury / UK Die Dissertation wurde am 14.12.2010 bei der Technischen Universitat¨ Munchen¨ eingereicht und durch die Fakultat¨ fur¨ Informatik am 9.6.2011 angenommen. ii Contents 1 Analysis of Low-Level Code 1 1.1 Source versus Binary . 1 1.2 Application Areas . 6 1.3 Executable and Linkable Format (ELF) .................. 12 1.4 Application Binary Interface (ABI)..................... 18 1.5 Assumptions . 24 1.6 Contributions . 24 2 Control Flow Reconstruction 27 2.1 The Concrete Semantics . 31 2.2 Interprocedural Control Flow Reconstruction . 33 2.3 Practical Issues . 39 2.4 Implementation . 43 2.5 Programming Model . 44 3 Classification of Memory Locations 49 3.1 Semantics . 51 3.2 Interprocedural Variable Differences . 58 3.3 Application to Assembly Analysis . 73 4 Reasoning about Array Index Expressions 81 4.1 Linear Two-Variable Equalities . 81 4.2 Application to Assembly Analysis . 88 4.3 Register Coalescing and Locking . 89 5 Tools 91 5.1 Combination of Abstract Domains . 91 5.2 VoTUM . 96 6 Side-Effect Analysis 101 6.1 Semantics . 105 6.2 Analysis of Side-Effects . 108 6.3 Enhancements . 115 6.4 Experimental Results . 118 iii iv CONTENTS 7 Exploiting Alignment for WCET and Data Structures 123 7.1 Alignment Analysis .
    [Show full text]
  • Mac OS X ABI Function Call Guide
    Mac OS X ABI Function Call Guide 2005-12-06 PowerPC and and the PowerPC logo are Apple Computer, Inc. trademarks of International Business © 2005 Apple Computer, Inc. Machines Corporation, used under license All rights reserved. therefrom. Simultaneously published in the United No part of this publication may be States and Canada. reproduced, stored in a retrieval system, or Even though Apple has reviewed this document, transmitted, in any form or by any means, APPLE MAKES NO WARRANTY OR mechanical, electronic, photocopying, REPRESENTATION, EITHER EXPRESS OR IMPLIED, WITH RESPECT TO THIS recording, or otherwise, without prior DOCUMENT, ITS QUALITY, ACCURACY, written permission of Apple Computer, Inc., MERCHANTABILITY, OR FITNESS FOR A with the following exceptions: Any person PARTICULAR PURPOSE. AS A RESULT, THIS DOCUMENT IS PROVIDED “AS IS,” AND is hereby authorized to store documentation YOU, THE READER, ARE ASSUMING THE on a single computer for personal use only ENTIRE RISK AS TO ITS QUALITY AND ACCURACY. and to print copies of documentation for IN NO EVENT WILL APPLE BE LIABLE FOR personal use provided that the DIRECT, INDIRECT, SPECIAL, INCIDENTAL, documentation contains Apple’s copyright OR CONSEQUENTIAL DAMAGES notice. RESULTING FROM ANY DEFECT OR INACCURACY IN THIS DOCUMENT, even if The Apple logo is a trademark of Apple advised of the possibility of such damages. Computer, Inc. THE WARRANTY AND REMEDIES SET FORTH ABOVE ARE EXCLUSIVE AND IN Use of the “keyboard” Apple logo LIEU OF ALL OTHERS, ORAL OR WRITTEN, EXPRESS OR IMPLIED. No Apple dealer, agent, (Option-Shift-K) for commercial purposes or employee is authorized to make any without the prior written consent of Apple modification, extension, or addition to this may constitute trademark infringement and warranty.
    [Show full text]
  • Alignment in C Seminar “Effiziente Programmierung in C”
    Introduction Data Structure Alignment Heap Alignment Stack Alignment Summary Alignment in C Seminar “Effiziente Programmierung in C" Sven-Hendrik Haase Universit¨atHamburg, Fakult¨atf¨urInformatik 2014-01-09 Sven-Hendrik Haase Seminar \Effiziente Programmierung in C" 1/ 32 Introduction Data Structure Alignment Heap Alignment Stack Alignment Summary Outline Introduction Guiding Questions of This Presentation Memory Addressing Alignment 101 Consquences of Misalignment Different Types of Alignment Data Structure Alignment Structs and Stuff Padding in the Real World Performance Implications SSE Heap Alignment Introduction Example Use Cases Stack Alignment Introduction The Problem Use Cases Summary TL;DR Resources Sven-Hendrik Haase Seminar \Effiziente Programmierung in C" 2/ 32 • What is data alignment? • What is heap alignment? • What is stack alignment? • How does it work in C? • Do we need to care abouy any of these? Introduction Data Structure Alignment Heap Alignment Stack Alignment Summary Introduction Guiding Questions of This Presentation • Which types of alignment exist in C? Sven-Hendrik Haase Seminar \Effiziente Programmierung in C" 3/ 32 • What is heap alignment? • What is stack alignment? • How does it work in C? • Do we need to care abouy any of these? Introduction Data Structure Alignment Heap Alignment Stack Alignment Summary Introduction Guiding Questions of This Presentation • Which types of alignment exist in C? • What is data alignment? Sven-Hendrik Haase Seminar \Effiziente Programmierung in C" 3/ 32 • What is stack alignment? •
    [Show full text]
  • Compiler Construction
    Compiler construction PDF generated using the open source mwlib toolkit. See http://code.pediapress.com/ for more information. PDF generated at: Sat, 10 Dec 2011 02:23:02 UTC Contents Articles Introduction 1 Compiler construction 1 Compiler 2 Interpreter 10 History of compiler writing 14 Lexical analysis 22 Lexical analysis 22 Regular expression 26 Regular expression examples 37 Finite-state machine 41 Preprocessor 51 Syntactic analysis 54 Parsing 54 Lookahead 58 Symbol table 61 Abstract syntax 63 Abstract syntax tree 64 Context-free grammar 65 Terminal and nonterminal symbols 77 Left recursion 79 Backus–Naur Form 83 Extended Backus–Naur Form 86 TBNF 91 Top-down parsing 91 Recursive descent parser 93 Tail recursive parser 98 Parsing expression grammar 100 LL parser 106 LR parser 114 Parsing table 123 Simple LR parser 125 Canonical LR parser 127 GLR parser 129 LALR parser 130 Recursive ascent parser 133 Parser combinator 140 Bottom-up parsing 143 Chomsky normal form 148 CYK algorithm 150 Simple precedence grammar 153 Simple precedence parser 154 Operator-precedence grammar 156 Operator-precedence parser 159 Shunting-yard algorithm 163 Chart parser 173 Earley parser 174 The lexer hack 178 Scannerless parsing 180 Semantic analysis 182 Attribute grammar 182 L-attributed grammar 184 LR-attributed grammar 185 S-attributed grammar 185 ECLR-attributed grammar 186 Intermediate language 186 Control flow graph 188 Basic block 190 Call graph 192 Data-flow analysis 195 Use-define chain 201 Live variable analysis 204 Reaching definition 206 Three address
    [Show full text]
  • An Introduction to Reverse Engineering for Beginners
    An Introduction To Reverse Engineering for Beginners Dennis Yurichev <[email protected]> cbnd ○c 2013, Dennis Yurichev. This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported License. To view a copy of this license, visit http://creativecommons.org/licenses/by-nc-nd/3.0/. Text version (November 23, 2013). There is probably a newer version of this text, and also Russian language version also accessible at http://yurichev.com/RE-book.html You may also subscribe to my twitter, to get information about updates of this text, etc: @yurichev, or to subscribe to mailing list. CONTENTS CONTENTS Contents Preface vi 0.1 Mini-FAQ1 ................................................. vi 0.2 About the author............................................. vi 0.3 Thanks.................................................. vi 0.4 Donate.................................................. vii 1 Compiler’s patterns 1 1.1 Hello, world!...............................................1 1.1.1 x86................................................1 1.1.2 ARM................................................4 1.2 Stack...................................................8 1.2.1 What is the stack used for?...................................9 1.3 printf() with several arguments.................................... 13 1.3.1 x86................................................ 13 1.3.2 ARM: 3 printf() arguments.................................. 14 1.3.3 ARM: 8 printf() arguments.................................. 15 1.3.4 By the way...........................................
    [Show full text]
  • Unstructured Computations on Emerging Architectures
    Unstructured Computations on Emerging Architectures Dissertation by Mohammed A. Al Farhan In Partial Fulfillment of the Requirements For the Degree of Doctor of Philosophy King Abdullah University of Science and Technology Thuwal, Kingdom of Saudi Arabia May 2019 2 EXAMINATION COMMITTEE PAGE The dissertation of M. A. Al Farhan is approved by the examination committee Dissertation Committee: David E. Keyes, Chair Professor, King Abdullah University of Science and Technology Edmond Chow Associate Professor, Georgia Institute of Technology Mikhail Moshkov Professor, King Abdullah University of Science and Technology Markus Hadwiger Associate Professor, King Abdullah University of Science and Technology Hakan Bagci Associate Professor, King Abdullah University of Science and Technology 3 ©May 2019 Mohammed A. Al Farhan All Rights Reserved 4 ABSTRACT Unstructured Computations on Emerging Architectures Mohammed A. Al Farhan his dissertation describes detailed performance engineering and optimization Tof an unstructured computational aerodynamics software system with irregu- lar memory accesses on various multi- and many-core emerging high performance computing scalable architectures, which are expected to be the building blocks of energy-austere exascale systems, and on which algorithmic- and architecture-oriented optimizations are essential for achieving worthy performance. We investigate several state-of-the-practice shared-memory optimization techniques applied to key kernels for the important problem class of unstructured meshes. We illustrate
    [Show full text]
  • AUTHOR PUB TYPE Needs of Potential Users, System
    DOCUMENT RESUME ED 355 773 FL 021 026 AUTHOR Mao, Tang TITLE Courseware Authoring and Delivering System for Chinese Language Instruction. Final Report. INSTITUTION Comptek Co., Springfield, NJ. SPONE AGENCY Department of Education, Washington, DC. PUB DATE 5 Feb 85 CONTRACT 300-84-0180 NOTE 41p. PUB TYPE Reports Descriptive (141) EDRS PRICE MF01/PCO2 Plus Postage. DESCRIPTORS *Authoring Aids (Programing); Chinese; *Computer Assisted Instruction; Computer Software Development; *Courseware; *Programing; Research Projects; Second Language Instruction; *Second Languages; *Uncommonly Taught Languages IDENTIFIERS *Unix Operating System ABSTRACT A study investigated technical methods for simplifying and improving the creation of software for teaching uncommonly taught languages such as Chinese. Research consisted of assessment of existing authoring systems, domestic and overseas, available hardware, peripherals, and software packages that could be integrated into this projectThen some features of an authoring system, were applied to a personal computer using available hardware and software. Among the findings were that interactive computer-assisted instruction (CAI) applications have large storage requirements; choice of hardware and peripherals require trade-offs in cost, speed, and adequacy; a courseware author is needed; the program can be designed to incorporate a third language; data compatibility is the primary difficulty in transferring information from one computer type to another; and the Unix system is inadequate for this application. It is concluded that an interactive CAI system for multiple languages with graphics, text, and voice capability at reasonable cost can be developed if special care is given to the needs of potential users, system development, and integration of hardware and software. The final product of the research is a detailed design for a multi-language, multimedia courseware authoring and delivery system.
    [Show full text]
  • Program Optimization
    Program optimization Alexey A. Romanenko [email protected] What this course about? In this course you will learn: ● Types of program optimization ● Approaches for program optimization ● Profiling tools Optimization Optimization consists of analyzing and tuning software code to make it perform faster and more efficiently on Intel processor architecture. www.intel.com/products/glossary/body.htm On ANY architecture! Types of optimization ● Performance ● Memory ● Scalability ● Communications ● etc. ● We address mainly to performance optimization Statements ● Donald Knuth – Premature optimization is the root of all evil ● If your code already works, optimizing it is a sure way to introduce new, and possibly subtle, bugs ● Optimization tends to make code harder to understand and maintain ● Some of the optimization techniques increase speed by reducing the extensibility of the code ● A lot of time can be spent optimizing, with little gain in performance, and can result in obfuscated code ● If you're overly obsessed with optimizing code, people will call you a nerd behind your back Statements ● Faster program, more memory required. ● Making more faster program required more time for optimization. ● Optimizing code for one platform may actually make it worse on another platform BUT!!!!! ● Michael Abrash (Quake, Unreal Tournament, Space Strike, Half-life, etc.): – Performance must always be measured – Any optimization, user can feel, should be done. Does compilers make an optimization? ● They does. But – Compiler do not have database for algorithms
    [Show full text]
  • A Guide to Vectorization with Intel® C++ Compilers
    A Guide to Vectorization with Intel® C++ Compilers Contents 1. Introduction .............................................................................................................................................. 4 2. What is Vectorization in the Intel Compiler? ............................................................................... 4 2.1 When does the compiler try to vectorize? ............................................................................... 6 2.2 How do I know whether a loop was vectorized? .................................................................. 6 2.3 What difference does it make?...................................................................................................... 7 3. What sort of loops can be vectorized? ............................................................................................ 7 4. Obstacles to vectorization ................................................................................................................ 10 4.1 Non-contiguous Memory Accesses ............................................................................................ 10 4.2 Data Dependencies ........................................................................................................................... 11 5. Guidelines for writing vectorizable code ................................................................................... 13 5.1 General Guidelines ....................................................................................................................
    [Show full text]
  • Gdura, Youssef Omran (2012) a New Parallelisation Technique for Heterogeneous Cpus
    Gdura, Youssef Omran (2012) A new parallelisation technique for heterogeneous CPUs. PhD thesis http://theses.gla.ac.uk/3406/ Copyright and moral rights for this thesis are retained by the author A copy can be downloaded for personal non-commercial research or study, without prior permission or charge This thesis cannot be reproduced or quoted extensively from without first obtaining permission in writing from the Author The content must not be changed in any way or sold commercially in any format or medium without the formal permission of the Author When referring to this work, full bibliographic details including the author, title, awarding institution and date of the thesis must be given Glasgow Theses Service http://theses.gla.ac.uk/ [email protected] . A New Parallelisation Technique for Heterogeneous CPUs by Youssef Omran Gdura A Thesis presented for the degree of Doctor of Philosophy to the School of Computing Science, College of Science and Engineering, University of Glasgow May 2012 . Copyright © Youssef Omran Gdura, 2012. Abstract Parallelization has moved in recent years into the mainstream compilers, and the demand for parallelizing tools that can do a better job of automatic parallelization is higher than ever. During the last decade considerable attention has been focused on developing pro- gramming tools that support both explicit and implicit parallelism to keep up with the power of the new multiple core technology. Yet the success to develop automatic paral- lelising compilers has been limited mainly due to the complexity of the analytic process required to exploit available parallelism and manage other parallelisation measures such as data partitioning, alignment and synchronization.
    [Show full text]