Specjbb2013 Oracle Corporation SPARC T5-2 114492

Oracle Corporation SPARC T5-2 114492 SPECjbb2013-MultiJVM max-jOPS 43963 SPECjbb2013-MultiJVM critical-jOPS

Tested by: Oracle Corporation () Test Sponsor: Oracle Corporation Test location: Hillsboro, OR Test date: Feb 13, 2014

SPEC license #: 6 Hardware Availability: Mar-2013 Software Availability: Sep-2013 Publication: MMM DD, YYYY

Benchmark Results Summary

Overall Throughput RT curve SPECjbb2013- MultiJVM: Multiple JVMs/Single Host (# of groups: 2)

Overall SUT Description SUT Description max-jOPS and critical-jOPS Details Number of probes Request Mix Accuracy Rate Of Non-Critical Failures Delay between performance status pings IR/PR Accuracy Topology SUT Conﬁguration Properties Validation Details Overall SUT (System Under Test) Description

Vendor Oracle Corporation

Vendor URL http://www.oracle.com/

System Source Single Supplier

System Designation Server Rack

Total Systems 1

All SUT Systems Identical YES

Total Nodes 1

All Nodes Identical YES

Nodes Per System 1

Total Chips 2

Total Cores 32

Total Threads 256

Total Memory Amount (GB) 512

Total OS Images 1

SW Environment Non-virtual

SUT Description

Hardware hw_1 Operating System os_1

Vendor Oracle Corporation Vendor Oracle Corporation

Vendor URL http://www.oracle.com/ Vendor URL http://www.oracle.com/

Available Mar-2013 Version Oracle Solaris 11.1.10.6.0

Model SPARC T5-2 Available Sep-2013

Form Factor 3RU rackmount server Bitness 64

CPU Name SPARC T5 Notes None

CPU Characteristics 3600 MHz SPARC T5 Java Virtual Machine jvm_1

Number of Systems 1 Vendor Oracle Corporation

Nodes Per System 1 Vendor URL http://www.oracle.com

Chips Per System 2 Version Java HotSpot 64-bit Server VM, version 1.8.0

Cores Per System 32 Available March-2014

Cores Per Chip 16 Bitness 64

Threads Per System 256 Notes None

Threads Per Core 8 Other Software other_1

Version None Vendor None. CPU Frequency (MHz) 3600 Vendor URL None.

Primary Cache 16 KB I + 16 KB D per core Version None.

Secondary Cache 128 KB I+D per core Available None.

Tertiary Cache 8 MB I+D per chip Bitness None.

Other Cache None Notes None.

Disk 2 x 300 GB 10000 RPM SAS disk drive

File System ZFS

Memory Amount (GB) 512

# and size of DIMM(s) 32 x 16 GB

Memory Details 16GB 2Rx8 PC3-12800R ECC CL11; each slot populated

# and type of Network Interface Cards Onboard 10/100/1000 NIC (NICs)

Power Supply Quantity and Rating (W) 1 x 2060W AC power supply

Other Hardware None

Cabinet/Housing/Enclosure None

Shared Description None

Shared Comment None

Tuning None

Notes None Other Hardware network_1

Vendor None.

Vendor URL None.

Version None.

Available None.

Bitness None.

Notes None. max-jOPS and critical-jOPS Details Last Success jOPS/First Failure jOPS for SLA points max-jOPS = jOPS passed before the First Failure Percentile Pass/Fail Pass Pass Fail Fail Fail 10-th 50-th 90-th 95-th 99-th 100-th jOPS 113274 114492 115710 116928 118146 500us - / 1218 - / 1218 - / 1218 - / 1218 - / 1218 - / 1218 1000us - / 1218 - / 1218 - / 1218 - / 1218 - / 1218 - / 1218 critical-jOPS = Geomean ( jOPS @ 10000; 50000; 100000; 200000; 500000; SLAs ) 65772 / 19488 / Response time percentile is 99-th 5000us 8526 / 9744 7308 / 8526 6090 / 7308 - / 1218 66990 20706 SLA (us) 10000 50000 100000 200000 500000 Geomean 68208 / 62118 / 37758 / 31668 / 21924 / 10000us - / 1218 69426 63336 38976 32886 23142 69426 / 66990 / 59682 / 54810 / 36540 / 20000us - / 1218 70644 68208 60900 56028 34104 70644 / 66990 / 62118 / 59682 / 41412 / 14616 / 50000us 71862 68208 63336 60900 35322 2436 jOPS 22533 39382 45675 57855 70035 43963 71862 / 69426 / 65772 / 62118 / 46284 / 14616 / 100000us 73080 70644 66990 63336 45066 2436 73080 / 70644 / 66990 / 65772 / 57246 / 31668 / 200000us 74298 71862 68208 66990 58464 12180 114492 / 80388 / 70644 / 70644 / 69426 / 58464 / 500000us 108402 75516 71862 71862 70644 51156 86478 / 80388 / 74298 / 65772 / 1000000us 114492 / - 114492 / - 87696 79170 75516 66990

Number of probes Request Mix Accuracy

Note

(Actual % in the Mix - Expected % in the Mix) must be within: 'Main Tx' limit of +/-5.0% for the requests whose expected % in the mix is >= 10.0% 'Minor Tx' limit of +/-1.0% for the requests whose expected % in the mix is < 10.0%

Rate of Non-Critical Failures There were no non-critical failures in Response Time curve building Delay between performance status pings during RT Curve (Response-Throughput Curve) IR/PR Accuracy Topology

SUT Hardware config_1 OS Image os_Image_1 JVM jvm_Ctr_1 : Controller JVM jvm_Backend_1 : Backend JVM jvm_TxInjector_1 : TxInjector SUT config_1 Configuration

Hardware OS Image os_Image_1

OS Images os_Image_1(1) JVM jvm_Ctr_1(1), jvm_Backend_1(2), jvm_TxInjector_1(2) Instances Hardware Description hw_1 OS Image os_1 Number of Systems 1 Description SW Environment non-virtual Tuning A processor set was conﬁgured containing the virtual processors (HW Tuning None. threads) of CPU 1. Notes None. Notes The controller and group 2 (backend and transaction injector) were run in the processor set. Group 1 (backend and transaction injector) was run outside the processor set. JVM Instance jvm_Ctr_1

Parts of Controller Benchmark

JVM Instance jvm_1 Description

Command -Xmx2048m -Xms2048m -Xmn1536m -Dspecjbb.forkjoin.workers=129 Line -Dspecjbb.group.count=2

Tuning A processor set was conﬁgured containing the virtual processors (HW threads) of CPU 1.

Notes Controller was run in processor set 1. The object-caching memory allocation library libumem was used by setting the environment variable LD_PRELOAD=libumem.so. JVM Instance jvm_Backend_1

Parts of Backend Benchmark

JVM Instance jvm_1 Description

Command -Xmx182g -Xms182g -Xmn167g -XX:+UseParallelOldGC Line -XX:ParallelGCThreads=107 -XX:+UseLargePages -XX:LargePageSizeInBytes=2g -XX:+AlwaysPreTouch -XX:-UseAdaptiveSizePolicy -XX:SurvivorRatio=16 -XX:TargetSurvivorRatio=90

Tuning A processor set was conﬁgured containing the virtual processors (HW threads) of CPU 1.

Notes The controller and group 2 (backend and transaction injector) were run in the processor set. Group 1 (backend and transaction injector) was run outside the processor set. The object-caching memory allocation library libumem was used by setting the environment variable LD_PRELOAD=libumem.so. JVM Instance jvm_TxInjector_1

Parts of TxInjector Benchmark

JVM Instance jvm_1 Description

Command -Xmx2048m -Xms2048m -Xmn1536m Line

Tuning A processor set was conﬁgured containing the virtual processors (HW threads) of CPU 1. Notes The controller and group 2 (backend and transaction injector) were run in the processor set. Group 1 (backend and transaction injector) was run outside the processor set. The object-caching memory allocation library libumem was used by setting the environment variable LD_PRELOAD=libumem.so.

Run Properties This section lists properties only set by user; use -defaultProps reporter option to list all properties

Property Name Default Controller specjbb.group.count 1 2

View table in csv format

Validation Details Validation Reports

Level: COMPLIANCE Check AgentResult Check properties on compliance All PASSED

Level: CORRECTNESS Check AgentResult Compare SM and HQ Inventory All PASSED Other Checks

High-bound (max attempted) is 121800 IR

High-bound (settled) is 115206 IR