Combining Processor Virtualization and Component-Based Engineering in C for Many-Core Heterogeneous Embedded Mpsocs

Combining Processor Virtualization and Component-Based Engineering in C for Many-Core Heterogeneous Embedded MPSoCs Erven Rohou∗, Andrea C. Ornsteiny, Ali Erdem Ozcan¨ y, and Marco Corneroz ∗INRIA, ySTMicroelectronics, zST-Ericsson Abstract so high that the same IP must be reused in many products. Short time-to-market also plays in favor of reuse. In other The design of embedded systems is driven by strong words, hardware needs to be more programmable. In this constraints in terms of performance, silicon area and context, the design of software-based solution substituting power consumption, as well as pressure on the cost and the hardware IPs becomes one of the most critical topics time-to-market. This has three consequences: 1) many-core of the overall production process of SoCs. systems are becoming mainstream, but there is still no sat- Problem Statement Unfortunately, designing software isfactory approach for distributing software applications systems for those constrained platforms is a complex issue. on these platforms; 2) these systems integrate heteroge- The reasons can be categorized as follows. neous processors for efficiency reasons, thus programming 1) Large scale multi-processing is a must. For almost them requires complex compilation environments; 3) hard- 30 years, general purpose processors as well as embedded ware resources are precious and low-level languages are systems followed Moore’s law. Performance used to “au- still a must to exploit them fully. These factors negatively tomatically” double every 18-24 months. However, since impact the programmability of many-core platforms and 2002, diminishing performance return, as well as increas- limit our ability to address the challenges of the next ing power consumption, and the approaching “temperature decade. wall” made the microprocessor industry follow a new path This paper devises a new programming approach lever- for performance: the multicore approach. While it is true aging processor virtualization and component-based soft- that embedded system have always been heterogeneous ware engineering paradigms to address these issues all multicores, several studies take parallelism to unprece- together. We present a programming model based on C for dented levels and forecast thousands of cores on a chip developing fine grain component-based applications and by the end of the next decade [1], [2]. Programming a toolset that compiles them into a processor-independent distributed applications has always been difficult, even bytecode representation that can be deployed on hetero- in general purpose computing, because of the lack of geneous MPSoCs. We also discuss the effectiveness of this convenient programming abstractions and tools [3]. The approach and present future directions that will have a key situation is worse for SoC platforms, with minimum run- role in addressing the above challenges. time support, and no alternative to low-level programming languages. This has always constituted a big barrier to the productivity. Given the new order of magnitude of I. Introduction cores, the exploitation of the available hardware is a major challenge of the coming decade. Compared to the general purpose computing world, em- 2) Heterogeneity is unavoidable. Although the homoge- bedded consumer systems are characterized by particularly neization of hardware platforms aims at reducing produc- stringent efficiency requirements in terms of performance, tion costs, modern embedded platforms continue to inte- power and area. SoC (System-on-Chip) vendors used to grate heterogeneous computing nodes (e.g. DSP, VLIW, design application specific hardware components (IPs) etc.) for several reasons. First, suitable hardware support controlled by a host processor for implementing complex (i.e. instruction sets, data representation, etc.) is key to operations. This process is no longer valid because of to- satisfying the performance requirements of different kinds day’s technological and market constraints. Non-recurring of applications executed on a single chip. Second, these engineering costs of silicon manufacturing are becoming computing nodes are always evolving to enjoy the best 1 technological solutions in the market. Beside evolving and implementation of a toolset combining these two architectures, heterogeneity is a source of difficulties since paradigms, for the C language, in order to start ad- it requires the software development kits (compilers, de- dressing the above issues all together. Using this toolset, buggers, profilers, etc.) to be ported and maintained, and legacy code written in C can be encapsulated into well- the developers to be trained on them. Tools for different defined components programming model with limited re- cores are likely to come from different vendors and to use engineering effort. These components can then be com- different technologies, yielding to integration problems. posed using an Architecture Description Language (ADL) The source code is likely to be written with conditional that describes the software architecture of the system, and compilation directives (#ifdef) in order to adapt to each compiled into a target independent bytecode representa- compiler and to best exploit each architecture. While they tion. Using this toolset, programmers can develop reusable are of no theoretical nature, these issues are a significant binary component libraries that can be used by system burden (and cost) to software companies. architects for composing applications to be deployed on 3) Physical resources are precious. Embedding soft- heterogeneous multiprocessor SoC (MPSoC). Newly de- ware in consumer systems has always been a challenge veloped components, on the other hand, can be envisioned for satisfying the performance requirements on top of either in C or in any higher-level language that can be limited constrained physical resources. Even though an compiled to the bytecode representation. unprecedented number of cores is expected soon, silicon In addition, the combination of component-based design area (be it CPU or memory) directly translates into cost. with such a target independent bytecode representation Each core must be as efficient as possible. Henceforth, opens various perspectives that leverage the performance software developers are still not free to enjoy high-level of embedded systems. First, the design flexibility can programming languages and run-time environments such be increased by mapping components on heterogeneous as garbage collectors, exception handlers, and rich li- processors at deployment time. In particular, this lets braries. This results in many applications being coded from programmers deal with memory hierarchy as an orthog- scratch and reduces the productivity while increasing the onal issue. Second, important memory and performance maintenance, support and evolution costs. optimizations can be obtained by on-board generation of These issues motivate many language-oriented research interface-specific communication bridges between remote projects [4], [5]. However, some pragmatic concerns components. (legacy, efficiency, toolset availability, etc.) make industrial Outline This paper is organized as follows. Section II solutions evolve with small steps. In particular, since overviews the paradigms we propose to combine, and it many multimedia processors do not support higher level presents the state-of-the-art on these domains. Section III languages such as C++ or Java, the C language remains presents our proposal. Section IV discusses its effective- the de facto standard, although it does not sufficiently deal ness and presents some ideas that we will investigate in with heterogeneity and multi-processing issues. Indeed, future work. Finally, we conclude in Section V. the C language implies the use of different development kits (compiler, debugger, etc.), potentially coming from II. Related Work different vendors, for each processor. Beside the over- head related to their installation and maintenance, these This paper proposes a new methodology and toolset for tools may behave differently (command-line flags, error programming heterogeneous MPSoCs in the C language. messages, etc.), and may imply the source code to be We build upon previous works on processor virtualization specialized for their own header files, intrinsics and library 1 and component based software engineering. This section functions . In addition, the lack of specific abstractions reviews previous work related to both paradigms. for application distribution makes plain C programs very difficult to deploy efficiently on multiple processors. A. Processor Virtualization Contribution In the past, some research and industrial proposals partially addressed these issues. On the one Processor virtualization first appeared for deploying hand, processor virtualization provided a way of dealing programs on computers connected through the Internet, with heterogeneous target platforms. On the other hand, and became a well established technique for dealing with component-based software engineering approach improved the processor heterogeneity. While the traditional compila- the software modularity and contributed to the develop- tion flow consists in compiling program sources into binary ment of distributed systems. objects that can be natively executed on a given processor, The main contribution of this paper is the design processor virtualization splits that flow in two parts. The 1Target-specific source-code specialization makes the code difficult to first part — the front-end

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