DOCSLIB.ORG

Innovatives Supercomputing in Deutschland

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Innovatives Supercomputing in Deutschland inSiDE • Vol. 8 No.1 • Spring 2010 Innovatives Supercomputing in Deutschland Editorial Contents Welcome to this new issue of InSiDE the physics of galactic nuclei and the the journal on innovative Supercomput- global parameter optimization of a News ing in Germany published by the Gauss physics-based united-residue force field PRACE: Ready for Implementation 4 Center for Supercomputing. for proteins. New JUVIS Visualization Cluster 7 The focus of the last months all over Projects are an important driving fac- Europe was on the European HPC initia- tor for our community. They provide Applications tive PRACE (Partnership for Advanced a chance to develop and test new Direct Numerical Simulation of Computing in Europe) and the Gauss methods and tools. They allow further Active Separation Control Devices 8 Center for Supercomputing has played improving existing codes and building a very active and important role in the tools we need in order to harness Numerical Simulation and Analysis of Cavitating Flows 14 this process. As a result of all these the performance of our systems. activities PRACE is now ready for the A comprehensive section of projects Modelling Convection over West Africa 18 implementation phase. Here you find an describes among other the recent ad- overview of the results achieved in this vances in the UNICORE 6 middleware Driving Mechanisms of the Geodynamo 26 Editorial issue. In our autumn edition we will be software. This is a good example how Contents able to report on the next steps which a nationally funded project that was The Maturing of Giant Galaxies by Black Hole Activity 32 will include the founding of a formal supported by European projects finally European organization. turned into a community tool and The Physics of Galactic Nuclei 36 is now taking the next step in the PRACE is an important driving factor improvement process. Global Parameter Optimization of a Physics-based also for German supercomputing. Hence United Residue Force Field (UNRES) for Proteins 40 the Gauss Center for Supercomputing Let us highlight a typical hardware has again stepped up its effort to pro- project, which is an excellent example Projects • Prof. Dr. H.-G. vide leading edge systems for Europe in of how the community can drive also Recent Advances in the UNICORE 6 Middleware 46 Hegering (LRZ) the next years. HLRS should be able to hardware development. QPACE (Quan- announce its system soon after we go tum Chromodynamics Parallel Comput- LIKWID Performance Tools 50 • Prof. Dr. Dr. Th. to press – so stay tuned for further in- ing on the Cell) is a project driven by Lippert (JSC) formation. LRZ has started its procure- several research institutions and IBM. Project ParaGauss 54 • Prof. Dr.-Ing. M. M. ment process. InSiDE expects to report The collaboration is a good example Resch (HLRS) on the results in the autumn issue. how we can deviate from main stream Real World Application Acceleration with GPGPUs 58 technology and still closely work with As we enter the Petaflops-era applica- leading edge technology providers. Systems tions are the driving factors of all our The resulting merger of ideas and activities. InSiDE presents the three technologies provides an outstanding Storage and Network Design 62 winners of a Golden Spike Award of solution for a large group of application for the JUGENE Petaflop System the HLRS. The applications that were researchers. 67 honored by the HLRS steering commit- QPACE tee are reporting on direct numerical As usual, this issue includes informa- simulation of active separation control, tion about new systems and events in Centres 68 the modeling of convection over West supercomputing in Germany over the Africa, and the maturing of galaxies by last months and gives an outlook of Activities 74 black hole activity. Further application workshops in the field. Readers are in- papers deal with the numerical simula- vited to participate in these workshops. Courses 88 tion and analysis of cavitating flows, the driving mechanisms of the geo dynamo, 2 Spring 2010 • Vol. 8 No. 1 • inSiDE Spring 2010 • Vol. 8 No. 1 • inSiDE 3 theses were: IBM Blue Gene/P (MPP To stay at the forefront of HPC, PRACE PRACE: [4]) at FZJ, CRAY XT5 (MPP) at CSC, has to play an active role: The project Ready for Implementation IBM Power 6 (SMP-FN) at Sara, IBM evaluated promising hardware and Cell at BSC (Hybrid), NEC SX-9 coupled software components for future multi- with Intel Nehalem (Hybrid) at HLRS, Petaflop/s systems, including: comput- In October 2009 PRACE [1], the identified in 2006 by ESFRI [3]. Having and Intel Nehalem clusters by Bull and ing nodes based on NVIDIA as well as Partnership for Advanced Computing started in January 2008, PRACE is Sun respectively at CEA and FZJ (SMP- AMD GPUs, Cell, ClearSpeed-Petapath, in Europe, demonstrated to a panel among the first projects to complete TN). All prototypes were evaluated in FPGAs, Intel Nehalem and AMD Bar- of external experts and the European its work after only two years. This close to production condition using celona and Istanbul processors; sys- Commission that the project made includes not only the legal and adminis- synthetic benchmarks to measure sys- tems to assess memory bandwidth, “satisfactory progress in all areas” [2] trative tasks and the securing of ad- tem performance, I/O bandwidth, and interconnect, power consumption and and “that PRACE has the potential equate funds but due to the specific communication characteristics. Most I/O performance as well as hybrid and to have real impact on the future of challenges of the rapidly evolving nature applications from the above set of power-efficient solutions; programming European HPC, and the quality and of High Performance Computing also were evaluated on at least three differ- models or languages such as Chapel, outcome of European research that very important technical work. ent prototypes. The results contain a CUDA, Rapidmind, HMPP, OpenCL, depends on HPC services”. wealth of information for the selection StarSs (CellSs), UPC and CAF. PRACE PRACE identified and classified a set of of future systems and where vendors co-funded work to extend the world’s News This marked an important milestone over twenty application that constitute a and application developers should focus “greenest” supercomputer QPACE [5] News towards the implementation of the per- cross-section of the most important sci- to improve performance. The Blue for general purpose applications. manent HPC Research Infrastructure entific applications that consume a large Gene/P installed at FZJ in 2009 is the in Europe, consisting of several world- portion of the resources of Europe’s first European Petaflop/s system that Finally, promising technologies, espe- class top-tier centres managed as a leading HPC centres. When neces- qualifies as a PRACE tier-0 system. In cially with respect to energy efficiency, single European entity. It will be estab- sary, these applications were ported addition, PRACE made the prototypes will be evaluated with the ultimate goal lished temporarily as an association to the architectures that PRACE identi- available to users through open call to engage in collaborations with indus- with its seat in Lisbon in spring 2010. fied as likely candidates for near term for proposals. In the first and second trial partners to develop products The project has prepared signature- Petaflop/s systems. The focus was, round, over 8.9 million CPU hours were exploiting STRATOS, the PRACE advi- ready statutes and other documents however, to evaluate how well the ap- granted to nine research teams. The sory group for Strategic Technologies required to create the association as a plications scale on the different archi- results will be published on the PRACE created in the PRACE Preparatory legal entity. Among them is the Agree- tectures, how well the systems enable web site. Phase project. ment for the Initial Period that covers petascaling, and how difficult it is to the commitments of the partners dur- exploit the parallelism provided by the ing the first five years where national hardware. Ten of these applications procurements are foreseen by the constitute the core of a benchmark hosting partners. Germany, France, suite that may be used in the procure- Italy, and Spain have each committed ments of the next Tier-0 systems. themselves to provide supercomputing resources worth at least 100 Million In parallel PRACE conducted an in- Euro to PRACE during the initial period. depth survey of the HPC market involv- The Netherlands and the UK are ex- ing all relevant vendors. The objective pected to follow suit. The access to the was to classify and select architec- PRACE resources will be governed by a tures promising to deliver systems single European Peer Review system. capable of a peak performance of one Petaflop/s in 2009/10. As one im- PRACE is one of 34 Preparatory Phase portant result a comprehensive set of projects funded in part by the European architectures was defined and proto- Commission to prepare the important types covering this set were deployed European Research Infrastructures as prototypes at partner sites. In detail PRACE Management Board welcomes Bulgaria and Serbia to the PRACE Initiative (Toulouse, September 8, 2009). Photo by Thomas Eickermann. 4 Spring 2010 • Vol. 8 No. 1 • inSiDE Spring 2010 • Vol. 8 No. 1 • inSiDE 5 PRACE started an advanced training ture will be open to all European states. and education programme for scien- The Gauss Centre for Supercomputing New JUVIS Visualization Cluster tists and students in advanced pro- represents Germany both in the legal gramming techniques, novel languages, entity and in the project. The project JSC offers a new visualization service and tools. Among them were a sum- partners asked the Research Centre which was made possible by additional mer school (Stockholm, 2008) and a Jülich to coordinate also the Implemen- BMBF-funding dedicated to the D-Grid winter school (Athens, 2009), six code tation Phase project and to continue the project.
Load more

Recommended publications
  • An Introduction to Analysis and Optimization with AMD Codeanalyst™ Performance Analyzer
    An introduction to analysis and optimization with AMD CodeAnalyst™ Performance Analyzer Paul J. Drongowski AMD CodeAnalyst Team Advanced Micro Devices, Inc. Boston Design Center 8 September 2008 Introduction This technical note demonstrates how to use the AMD CodeAnalyst™ Performance Analyzer to analyze and improve the performance of a compute-bound program. The program that we chose for this demonstration is an old classic: matrix multiplication. We'll start with a "textbook" implementation of matrix multiply that has well-known memory access issues. We will measure and analyze its performance using AMD CodeAnalyst. Then, we will improve the performance of the program by changing its memory access pattern. 1. AMD CodeAnalyst AMD CodeAnalyst is a suite of performance analysis tools for AMD processors. Versions of AMD CodeAnalyst are available for both Microsoft® Windows® and Linux®. AMD CodeAnalyst may be downloaded (free of charge) from AMD Developer Central. (Go to http://developer.amd.com and click on CPU Tools.) Although we will use AMD CodeAnalyst for Windows in this tech note, engineers and developers can use the same techniques to analyze programs on Linux. AMD CodeAnalyst performs system-wide profiling and supports the analysis of both user applications and kernel- mode software. It provides five main types of data collection and analysis: • Time-based profiling (TBP), • Event-based profiling (EBP), • Instruction-based sampling (IBS), • Pipeline simulation (Windows-only feature), and • Thread profiling (Windows-only feature). We will look at the first three kinds of analysis in this note. Performance analysis usually begins with time-based profiling to identify the program hot spots that are candidates for optimization.
    [Show full text]
  • Software Optimization Guide for Amd Family 15H Processors (.Pdf)
    Software Optimization Guide for AMD Family 15h Processors Publication No. Revision Date 47414 3.06 January 2012 Advanced Micro Devices © 2012 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices, Inc. (“AMD”) products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. The infor- mation contained herein may be of a preliminary or advance nature and is subject to change without notice. No license, whether express, implied, arising by estoppel or other- wise, to any intellectual property rights is granted by this publication. Except as set forth in AMD’s Standard Terms and Conditions of Sale, AMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. AMD’s products are not designed, intended, authorized or warranted for use as compo- nents in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD’s product could create a situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make changes to its products at any time without notice. Trademarks AMD, the AMD Arrow logo, and combinations thereof, AMD Athlon, AMD Opteron, 3DNow!, AMD Virtualization and AMD-V are trademarks of Advanced Micro Devices, Inc.
    [Show full text]
  • AMD Codexl 1.7 GA Release Notes
    AMD CodeXL 1.7 GA Release Notes Thank you for using CodeXL. We appreciate any feedback you have! Please use the CodeXL Forum to provide your feedback. You can also check out the Getting Started guide on the CodeXL Web Page and the latest CodeXL blog at AMD Developer Central - Blogs This version contains: For 64-bit Windows platforms o CodeXL Standalone application o CodeXL Microsoft® Visual Studio® 2010 extension o CodeXL Microsoft® Visual Studio® 2012 extension o CodeXL Microsoft® Visual Studio® 2013 extension o CodeXL Remote Agent For 64-bit Linux platforms o CodeXL Standalone application o CodeXL Remote Agent Note about installing CodeAnalyst after installing CodeXL for Windows AMD CodeAnalyst has reached End-of-Life status and has been replaced by AMD CodeXL. CodeXL installer will refuse to install on a Windows station where AMD CodeAnalyst is already installed. Nevertheless, if you would like to install CodeAnalyst, do not install it on a Windows station already installed with CodeXL. Uninstall CodeXL first, and then install CodeAnalyst. System Requirements CodeXL contains a host of development features with varying system requirements: GPU Profiling and OpenCL Kernel Debugging o An AMD GPU (Radeon HD 5000 series or newer, desktop or mobile version) or APU is required. o The AMD Catalyst Driver must be installed, release 13.11 or later. Catalyst 14.12 (driver 14.501) is the recommended version. See "Getting the latest Catalyst release" section below. For GPU API-Level Debugging, a working OpenCL/OpenGL configuration is required (AMD or other). CPU Profiling o Time-Based Profiling can be performed on any x86 or AMD64 (x86-64) CPU/APU.
    [Show full text]
  • AMD Codexl 1.8 GA Release Notes
    AMD CodeXL 1.8 GA Release Notes Contents AMD CodeXL 1.8 GA Release Notes ......................................................................................................... 1 New in this version .............................................................................................................................. 2 System Requirements .......................................................................................................................... 2 Getting the latest Catalyst release ....................................................................................................... 4 Note about installing CodeAnalyst after installing CodeXL for Windows ............................................... 4 Fixed Issues ......................................................................................................................................... 4 Known Issues ....................................................................................................................................... 5 Support ............................................................................................................................................... 6 Thank you for using CodeXL. We appreciate any feedback you have! Please use the CodeXL Forum to provide your feedback. You can also check out the Getting Started guide on the CodeXL Web Page and the latest CodeXL blog at AMD Developer Central - Blogs This version contains: For 64-bit Windows platforms o CodeXL Standalone application o CodeXL Microsoft® Visual Studio®
    [Show full text]
  • Instruction-Based Sampling: a New Performance Analysis Technique for AMD Family 10H Processors
    Instruction-Based Sampling: A New Performance Analysis Technique for AMD Family 10h Processors Paul J. Drongowski AMD CodeAnalyst Project Advanced Micro Devices, Inc. Boston Design Center 16 November 2007 1. Introduction Software applications must use computational resources efficiently in order to deliver best results in a timely manner. This is especially true for time-sensitive applications such as transaction processing, real-time control, multi-media and games. A program profile is a histogram that reflects dynamic program behavior. For example, a profile shows where a program is spending its time. Program profiling helps software developers to meet performance goals by identifying performance bottlenecks and issues. Profiling is most effective when a developer can quickly identify the location and cause of a performance issue. Instruction-Based Sampling (IBS) is a new profiling technique that provides rich, precise program performance information. IBS is introduced by AMD Family10h processors (AMD Opteron Quad- Core processor “Barcelona.”) IBS overcomes the limitations of conventional performance counter sampling. Data collected through performance counter sampling is not precise enough to isolate performance issues to individual instructions. IBS, however, precisely identifies instructions which are not making the best use of the processor pipeline and memory hierarchy. IBS collects a wide range of performance information in a single program run, making it easier to conduct performance testing. The AMD CodeAnalyst performance analysis tool suite supports IBS and correlates the instruction-level IBS information with processes, program modules, functions and source code. IBS in combination with CodeAnalyst helps a developer to find, analyze and ameliorate performance problems. This technical note is a brief introduction to Instruction-Based Sampling.
    [Show full text]
  • AMD Codexl 1.1 GA Release Notes
    AMD CodeXL 1.1 GA Release Notes Thank you for using CodeXL. We appreciate any feedback you have! Please use our CodeXL Forum to provide your feedback. You can also check out the Getting Started guide on the CodeXL Web Page and the latest CodeXL blog at AMD Developer Central - Blogs This version contains: CodeXL Visual Studio 2012 and 2010 packages and Standalone application, for 32-bit and 64-bit Windows platforms CodeXL for 64-bit Linux platforms Kernel Analyzer v2 for both Windows and Linux platforms Note about 32-bit Windows CodeXL 1.1 Upgrade Error On 32-bit Windows platforms, upgrading from previous version of CodeXL using the CodeXL 1.1 installer will remove the previous version and then display an error message without installing CodeXL 1.1. The recommended method is to uninstall previous CodeXL before installing CodeXL 1.1. If you ran the 1.1 installer to upgrade a previous installation and encountered the error mentioned above, ignore the error and run the installer again to install CodeXL 1.1. Note about installing CodeAnalyst after installing CodeXL for Windows CodeXL can be safely installed on a Windows station where AMD CodeAnalyst is already installed. However, do not install CodeAnalyst on a Windows station already installed with CodeXL. Uninstall CodeXL first, and then install CodeAnalyst. System Requirements CodeXL contains a host of development features with varying system requirements: GPU Profiling and OpenCL Kernel Debugging o An AMD GPU (Radeon HD 5xxx or newer) or APU is required o The AMD Catalyst Driver must be installed, release 12.8 or later.
    [Show full text]
  • AMD Codexl 1.9 GA Release Notes
    AMD CodeXL 1.9 GA Release Notes Contents AMD CodeXL 1.9 GA Release Notes ......................................................................................................... 1 New in this version .............................................................................................................................. 2 System Requirements .......................................................................................................................... 2 Getting the latest Radeon software release ......................................................................................... 4 Note about installing CodeAnalyst after installing CodeXL for Windows ............................................... 4 Fixed Issues ......................................................................................................................................... 4 Known Issues ....................................................................................................................................... 5 Support ............................................................................................................................................... 7 Thank you for using CodeXL. We appreciate any feedback you have! Please use the CodeXL Forum to provide your feedback. You can also check out the Getting Started guide on the CodeXL Web Page and the latest CodeXL blog at AMD Developer Central - Blogs This version contains: For 64-bit Windows platforms o CodeXL Standalone application o CodeXL Microsoft® Visual Studio® 2010
    [Show full text]
  • AMD Technology & Software
    AMD Technology & Software Justin Boggs, Sr. Developer Relations Engineer [email protected] Q3’06 Agenda • Desktop Overview • Processors & Roadmap • Software Architecture & Performance • Desktop Platforms • Future AMD Technology Directions • AMD Developer Resources • Call to Action 2 AMD Technology & Software AMD Desktop Overview AMD Desktop Advantage • Built from the ground up, AMD x86 processor technology makes it possible to improve responsiveness to changing business needs AMD64 offers flexibility by supporting 32- and 64-bit applications across desktop, mobile and server applications Direct Connect Architecture enables increased performance, scalability and improved multi-tasking AMD Dual Core provides enhanced performance without increasing power requirements AMD Cool ‘n’ Quiet™ decreases overall power consumption by optimizing performance on demand Enhanced Virus Protection adds an extra level of virus protection to your security solution 4 AMD Technology & Software AMD64™ Powerful 64-Bit Computing • Technology that gives total backward compatibility with leading-edge 32-bit computing performance. • Technology that paves the way to multi-core computing with cutting-edge communications technology. • Technology is more than 64-bit computing— it’s also about next-generation architecture. • Technology that allows software developers to create new functionality for end users. • Technology that solves real problems. 5 AMD Technology & Software AMD Direct Connect Architecture Direct Connect Architecture moves more data more efficiently,
    [Show full text]
  • Improving Program Performance with AMD Codeanalyst for Linux® Paul J. Drongowski AMD Codeanalyst Team May 9, 2007
    Improving program performance with AMD CodeAnalyst for Linux® Paul J. Drongowski AMD CodeAnalyst team May 9, 2007 AMD CodeAnalyst for Linux® Identify and investigate performance hot-spots Easy to use graphical user interface – Simplified configuration of performance events – GUI is consistent for cross-platform use Low overhead, system-wide data collection – Can profile dynamically loaded modules – Can profile kernel mode drivers as well as applications Results are displayed in configurable views – Source and disassembly annotated with performance data – Rates and ratios assist interpretation of results 2 May 9, 2007 Using AMD CodeAnalyst for Linux AMD CodeAnalyst for Linux Open source – Uses oprofile for data collection – Can import oprofile data – CodeAnalyst GUI is Qt-based Java profiling support – Version 2.5: Modified oprofile driver and daemon – Version 2.6: Modified daemon only 3 May 9, 2007 Using AMD CodeAnalyst for Linux Presentation outline AMD CodeAnalyst in action – Time-based profiling – Event-based profiling – Tuning Downloading AMD CodeAnalyst On-line resources 4 May 9, 2007 Using AMD CodeAnalyst for Linux AMD CodeAnalyst in action 5 May 9, 2007 Using AMD CodeAnalyst for Linux Performance tuning cycle Measure performance Change Identify program hot-spot Identify cause 6 May 9, 2007 Using AMD CodeAnalyst for Linux Kinds of analysis Identify hot-spot: Time-based profiling – Where is the application or system spending time? Identify cause: Event-based profiling – How is the application behaving on the CPU? Memory?
    [Show full text]
  • Efficient Implementation of Finite Element Operators on Gpus
    FRIEDRICH-ALEXANDER-UNIVERSITAT¨ ERLANGEN-NURNBERG¨ INSTITUT FUR¨ INFORMATIK (MATHEMATISCHE MASCHINEN UND DATENVERARBEITUNG) Lehrstuhl f¨ur Informatik 10 (Systemsimulation) Efficient Implementation of Finite Element Operators on GPUs Severin Strobl Studienarbeit Efficient Implementation of Finite Element Operators on GPUs Severin Strobl Studienarbeit Aufgabensteller: Prof. Dr. C. Pflaum Betreuer: Prof. Dr. C. Pflaum Bearbeitungszeitraum: 01.01.2008 – 02.09.2008 Erkl¨arung: Ich versichere, dass ich die Arbeit ohne fremde Hilfe und ohne Benutzung anderer als der angegebenen Quellen angefertigt habe und dass die Arbeit in gleicher oder ¨ahnlicher Form noch keiner anderen Prufungsbeh¨ ¨orde vorgelegen hat und von dieser als Teil einer Prufungs-¨ leistung angenommen wurde. Alle Ausfuhrungen,¨ die w¨ortlich oder sinngem¨aß ubernommen¨ wurden, sind als solche gekennzeichnet. Erlangen, den 1. September 2008 . Abstract Graphics processing units (GPUs) of the current generation are highly programmable using interfaces like NVIDIA’s Compute Unified Device Architecture (CUDA) while of- fering a massive computational power for a relatively low price. The solution of systems of linear equations described by stencils representing finite element operators by iterative solvers is a application which can utilize these benefits of GPUs. This thesis describes the implementation of a parallelized Gauss-Seidel solver achieving up to 40 times the perfor- mance of a corresponding solver on standard CPUs. The solver is part of a library named GPUsolve, which offers the infrastructure to integrate this GPU-enabled application into object oriented C++ code. 4 Contents 1 Introduction 7 2 GPU Programming 8 2.1 GPU Hardware .................................... 8 2.2 Shader Programming ................................. 9 2.2.1 BrookGPU .................................. 10 2.2.2 Sh ......................................
    [Show full text]
  • A Methodology for Efficient Multiprocessor System-On
    A Methodology for Efficient Multiprocessor System-on-Chip Software Development Von der Fakult¨at f¨ur Elektrotechnik und Informationstechnik der Rheinisch–Westf¨alischen Technischen Hochschule Aachen zur Erlangung des akademischen Grades eines Doktors der Ingenieurwissenschaften genehmigte Dissertation vorgelegt von M.Sc. Jianjiang Ceng aus Zhejiang/China Berichter: Univ.-Prof. Dr. rer. nat. Rainer Leupers Univ.-Prof. Dr.-Ing. Gerd Ascheid Tag der m¨undlichen Pr¨ufung: 28.04.2011 Diese Dissertation ist auf den Internetseiten der Hochschulbibliothek online verf¨ugbar. Contents 1 Introduction 1 1.1 Background ...................................... 1 1.2 MPSoCSoftwareDevelopmentChallenge . ........ 3 1.2.1 ProgrammingModel .............................. 4 1.2.2 ApplicationParallelization . ...... 6 1.2.3 MappingandScheduling . .. 6 1.2.4 CodeGeneration ................................ 7 1.2.5 ArchitectureModelingandSimulation . ...... 7 1.2.6 Summary .................................... 8 1.3 ThesisOrganization. .. ... .. .. .. .. .. ... .. .. .. .. .. ..... 8 2 Related Work 11 2.1 GeneralPurposeMulti-Processor . ........ 11 2.1.1 Cell ....................................... 12 2.2 GeneralPurposeGraphicsProcessingUnit . ......... 13 2.3 Embedded Multi-Processor System-on-Chip . .......... 14 2.3.1 MPCore ..................................... 14 2.3.2 IXP ....................................... 14 2.3.3 OMAP...................................... 15 2.3.4 CoMPSoC.................................... 17 2.3.5 SHAPES....................................
    [Show full text]
  • AMD Codexl 1.3 GA Release Notes
    AMD CodeXL 1.3 GA Release Notes Thank you for using CodeXL. We appreciate any feedback you have! Please use the CodeXL Forum to provide your feedback. You can also check out the Getting Started guide on the CodeXL Web Page and the latest CodeXL blog at AMD Developer Central - Blogs This version contains: For Windows for 32-bit and 64-bit Windows platforms o CodeXL Standalone application o CodeXL Microsoft® Visual Studio® 2010 extension o CodeXL Microsoft® Visual Studio® 2012 extension o CodeXL Remote Agent For 64-bit Linux platforms o CodeXL Standalone application o CodeXL Remote Agent Note about 32-bit Windows CodeXL 1.3 Upgrade Error On 32-bit Windows platforms, upgrading from CodeXL 1.0 using the CodeXL 1.3 installer will remove the previous version and then display an error message without installing CodeXL 1.3. The recommended method is to uninstall previous CodeXL versions before installing CodeXL 1.3. If you ran the 1.3 installer to upgrade a previous installation and encountered the error mentioned above, ignore the error and run the installer again to install CodeXL 1.3. Note about installing CodeAnalyst after installing CodeXL for Windows CodeXL can be safely installed on a Windows station where AMD CodeAnalyst is already installed. However, do not install CodeAnalyst on a Windows station already installed with CodeXL. Uninstall CodeXL first, and then install CodeAnalyst. System Requirements CodeXL contains a host of development features with varying system requirements: GPU Profiling and OpenCL Kernel Debugging o An AMD GPU (Radeon HD 5000 series or newer, desktop or mobile version) or APU is required.
    [Show full text]