Freescale Semiconductor Document Number: AN3457 Application Note Rev. 1, 04/2007

Designing with MC33596/MC33696 A Step-by-Step Approach for a Reference Design by: Laurent Gauthier RF Systems & Application Engineer Toulouse, France

Contents 1 Introduction 1 Introduction ...... 1 2 Preliminary...... 1 This document presents a step-by-step approach to 2.1 MC33696/MC33596 RF Module: Various Versions. . . . . 2 designing an optimized RF Module using an MC33696 2.2 MC33696/MC33696 RF Module References ...... 2 2.3 CE-FCC Regulation Compliance...... 2 transceiver or MC33596 receiver. It also describes how 3 Introduction to RF Transceivers ...... 2 to evaluate the RF Module using measurements. 3.1 RF Transceiver Operation ...... 2 3.2 RF Transceiver Application ...... 3 4 MC33696 Presentation ...... 4 4.1 Main Features ...... 4 2 Preliminary 4.2 Architecture ...... 5 4.3 Typical Application...... 7 Because of the similarities between MC33596 and the 5 MC33696 RF Module: Reference Design Version . . . . . 8 receiver components of the MC33696, this application 5.1 Target of this Design ...... 8 5.2 Reference Design Version of the MC33696 RF Module . 9 note is based on MC33696. It provides some directions 6 Connector Pin Out ...... 21 for an MC33596-based design. 7 First Step For Receiver Testing...... 22 7.1 Test Set Up for OOK and FSK ...... 22 7.2 Registers and Pins Set up ...... 23 8 First Step for Testing ...... 24 8.1 Test Set-Up ...... 24 8.2 Registers and Pins Set Up ...... 24 8.3 Measurements...... 26 9 MC33696/MC33596 RF Module Performances ...... 26 9.1 Performance Variables ...... 26 10 PCB Design ...... 27 10.1 Layout ...... 27 11 Bill of Material ...... 28

© Freescale Semiconductor, Inc., 2007. All rights reserved. 2.1 MC33696/MC33596 RF Module: Various Versions • MC33696MOD092EV evaluation boards are available at various frequencies for RF evaluation. • MC33696MOD434 reference design is a transceiver reference design optimized for RF performances equipped with a SAW filter, low noise amplifier, and a pin diode switch. This document describes the design of the 434 MHz version. It is not available. • MC33596MOD434 reference design is a receiver reference design optimized for RF performances equipped with a SAW filter and a low noise amplifier. This document gives some indications for the 434 MHz version. It is not available.

2.2 MC33696/MC33696 RF Module References Table 1. Module References

Web Ref Frequency Type Status

MC33696MOD315EV 315 MHz Evaluation tool available MC33696MOD434EV 433.92 MHz Evaluation tool available MC33696MOD868EV 868.3 MHz Evaluation tool available MC33696MOD916EV 916.5 MHz Evaluation toolnot available MC33696MOD434 433.92 MHz Reference design not available MC33596MOD434 433.92 MHz Reference design not available

2.3 CE-FCC Regulation Compliance For local regulation compliance, RF modules are not provided with an SMA connector. A printed antenna replaces this connector. The study of this antenna is not included in this application note.

3 Introduction to RF Transceivers

3.1 RF Transceiver Operation A transceiver is essentially a receiver and a transmitter in the same package. A full-duplex transceiver can transmit and receive simultaneously. You can transmit and receive in RF using different frequencies with a high level of isolation between the transmitter and receiver. This un-economical approach is not used in SRD applications. A half-duplex transceiver can transmit or receive on the same or different frequencies (if required). This approach is far more economical, as many parts of the transmitter and the receiver can be shared.

Designing with MC33596/MC33696, Rev. 1 2 Freescale Semiconductor

Transceiver 1 Transceiver 2 TransmitterTransmitter TransmitterTransmitter ControlControl ControlControl UnitUnit 11 UnitUnit 22 ReceiverReceiver ReceiverReceiver

Figure 1. Bidirectional Communication Using Transceivers An MCU is usually necessary to control the transceiver and send or receive messages according to a defined protocol. The MCU should have control and status of the following parameters: • Frequency of operation: to allow frequency change for maximum link reliability in the presence of interferences, for multi-channel operation of several devices • used: OOK or FSK • RSSI value: to verify channel clearance before transmission, to evaluate the distance from the transmitter to the receiver, to allow dynamic RF power management for power saving • Transmitted power: for power saving where distance between transmitter and receiver is short • Various digital features such as automatic wake up of the receiver and data processing of the message to reduce MCU load

3.2 RF Transceiver Application Transceivers are used in many applications in the SRD world, where classic use of a single transmitter and receiver is not possible and additional functionalities are required. Bidirectional communication improves link performances even if the system functionality doesn't require it. In fact, you can design a protocol that re-transmits a frame when an order is not followed by a feedback indicating that everything is okay, using an RF transceiver. Automotive: • Remote keyless entry: The car provides feedback on an LCD screen after a button is pushed (battery voltage, car temperature, tire pressure, fuel level). • Passive entry: After the driver opens the car door, a special badge he wears activates a bidirectional communication between the badge and the car. After the badge has been authenticated, this signal tells the doors to open. • Tire pressure monitoring system: A sensor in the wheel transmits temperature and pressure measurements to the car. When the car stops, it transmits information to the sensor to reduce the periodic transmission rate for power saving. : • Garage door opener: After the driver closes the door with the garage door opener and drives off, the car receives confirmation that the door is locked.

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 3

• Awnings, screen and shutter control: After pressing the button that closes the house’s shutters, the home owner is informed by a feedback that the shutters are locked and not blocked by, for example, a flower pot left on the window sill. • Light management: Feedback informs you if a lamp is broken. • Home networking: Information from a or sensor can be transmitted to a receiver several stages up because of networking allowed by transceivers. Remote metering: • Fuel level control: The level is transmitted only on demand from a central unit to reduce power consumption and extend the battery life. • Gas and water metering: The measured quantity is transmitted only on demand from a central unit to reduce power consumption and extend the battery life. Security: • Door and window sensors, alarm central unit: All the sensors in an alarm system can be bidirectional to allow power management of the RF power (a sensor close to the central unit needs less transmission power) and to increase battery life. • Smoke detector: Power management through feedback with a bidirectional link is possible. • People identification: An authentication sequence can be established between a system controlling the access to a door, a computer, or any other secured equipment and a badge.

4 MC33696 Presentation Because MC33596 includes the receiver part of MC33696, all comments about MC33696 apply to MC33596 except those concerning the transmitter.

4.1 Main Features MC33696 is a highly integrated RF transceiver designed for low-voltage applications using half duplex communication in the UHF ISM bands. It includes a programmable PLL for multichannel applications, an RSSI circuit that provides analog and digital results, and a strobe oscillator that periodically wakes up the receiver. A data manager checks the content of incoming message to reduce CPU load and system consumption. Receiver: • Frequency: 304 MHz, 315 MHz, 433 MHz, 868 MHz, and 915 MHz bands • Sensitivity: −106 dBm to −76 dBm typ in four steps at 4.8 kbps • Modulation: OOK and FSK • Data rate: up to 19.2 kbps with data manager • Data manager with clock recovery for manchester coded signals • RSSI range: 72 dB digital and 42 dB analog • Receiver bandwidth: 380 kHz • Current consumption: 9.2 mA typ

Designing with MC33596/MC33696, Rev. 1 4 Freescale Semiconductor

Transmitter: • Frequency: 315 to 915 MHz • Output power: +7 dBm to -18 dBm in 4 steps at 434 MHz • Modulation: OOK and FSK • Data rate: up to 19.2 kbps • FSK frequency deviation: programmable • Current consumption: 12.5 mA typ Other: • Package: LQFP32 and LQFN32 • Temperature range: −40 to +85°C • Supply voltage: 2.1 V-3.6 V and 5 V

4.2 Architecture MC33696 has a built-in integrated fractional PLL that generates the RF signal for transmission, as well as the local oscillator for the super heterodyne receiver. The tuning range of the PLL enables the receiver and transmitter to be tuned to any frequency ±3% from the central frequency defined by the crystal. This gives about ±12 MHz at 433 MHz with a tuning step of 6 kHz. During transmission, the OOK modulation is generated by switching the RF amplifier (also called the power amplifier) on and off. The FSK modulation is generated by switching the divider ratio of the PLL thanks to the small frequency step provided by the fractional divider. During transmission, the output power is software-adjustable so various regulations or application requirements can be fulfilled. The receiver is a low IF super heterodyne receiver with an image rejection mixer to relax the front end filtering requirements. IF filters with a central frequency of 1.5 MHz and a 380 kHz bandwidth are completely integrated. OOK and FSK are possible.

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 5

RFIN RFRF AmplifierAmplifier MixerMixer IFIF FilterFilter IFIF AmplifierAmplifier

RF AGC RFRF AGCAGC LogLog AmplifierAmplifier IF AGC

RFOUT RFRF AmplifierAmplifier RF+IFRF+IF RSSIRSSI

TX OOK RSSI FSK/OOKFSK/OOK FractionalFractional PLL PLL value demodulatordemodulator Frequency settings SPI to LogicLogic DataData FilterFilter MCU controlcontrol Run/Sleep RX Data DataData control DataData slicerslicer ManagerManager StrobeStrobe OscillatorOscillator

Figure 2. MC33696 Architecture Two AGC loops regulate the level of the received signal internally. The first loop regulates the level at the output of the mixer to avoid saturation in the active IF filter; it begins this action for RFIN level at about -60 dBm. The second loop regulates the level at the output of the IF amplifier to avoid saturation in this stage. The OOK demodulator is a peak detector. For FSK operation, the IF amplification is set to maximum to provide a square wave to the FSK demodulator. The FSK demodulator is a frequency-to-voltage converter that uses a low pass filter followed by the OOK demodulator. Data filters are switched to optimize the signal-to-noise ratio for various data rates. A data slicer converts the analog signal to digital. It compares the signal at the output of the data filter to a reference level that can be fixed or adaptive. When fixed reference level is chosen (useful only in OOK), the slicer reacts very rapidly to incoming signals. Adaptive reference level is generated by averaging the signal. This takes time (this time is programmable), but leads to better sensitivity as less offset error becomes possible. Adaptive reference is mandatory for FSK because the absolute level at the output of the demodulator is unknown. This level depends on the absolute frequency of transmitter and receiver. An integrated data manager can be selected to avoid the complex task of decoding data with the MCU. This data manager is a powerful logic block, able to recover a clock from a Manchester coded signal and then decode the frame. It can recognize a specific programmable ID in the frame and send on the SPI port the bits that follow. The frame is available on the SPI port with data on the falling edge of the clock that simplifies data reception by the MCU. A strobe oscillator that wakes up the receiver at a programmable rate automatically is also available. This reduces power consumption because it allows the MCU to sleep as long as the data manager receives no valid data. All these features are software configurable to fulfill any application specific requirement.

Designing with MC33596/MC33696, Rev. 1 6 Freescale Semiconductor

4.3 Typical Application The RF module is structured around MC33696. For 3 V operation, VDD should be applied to VCCINOUT and VCCIN. An internal regulator for analog sections provides a filtered power supply on VCC2OUT. A separated regulator provides the power supply for digital sections on VCCDIG2. For 5 V operation, an internal regulator connected between VCCIN and VCCINOUT is available. MC33696 is powered with VDD applied to VCCIN.

C3 RSSIOUT 1nF STROBE

C7 VCC2

SWITCH VCC 3V

C8 32 31 30 29 28 27 26 25 GND NC GND VCCIN 1 GNDIO 24 VCC2IN

SWITCH STROBE SEB C20 VCC2 RSSIOUT SEB VCC 2 GNDSUBD 23 SCLK C28 VCC2RF SCLK 3 22 RFIN MOSI MOSI C6 4 21 MISO VCC2 GNDLNA U6 MISO L10 5 20 CONFB J1 VCC2VCO MC33696 CONFB SMA vert C22 6 19 DATACLK L7 GNDPA1 DATACLK 7 18 RFOUT RSSIC RSSIC C36 8 17 C39 C40 GNDPA2 GNDDIG XTALIN XTALOUT VCCINOUT VCC2OUT VCCDIG VCCDIG2 RBGAP GND 9 10 11 12 13 14 15 16

VCC

C24 VCC2 X1 R13

C29 C31

C35 C30

Figure 3. Typical Application Schematic Diagram RFOUT is the transmitter’s output and RFIN is the receiver’s input. When MC33x96 is in transmit mode, the receiver input RFIN is in high impedance. When it is in receive mode, the transmitter output RFOUT is in high impedance. As a result, you can connect them together without affecting RF performance. This also allows you to design a simple matching network where the receiver and transmitter have the same nominal impedance. L10 is necessary to bias RFOUT, as it is equivalent to an open collector output. C40, L7, and C39 realize the impedance matching to the 50 Ohms output. X1, C35, and C24 are the external components for the crystal oscillator. The strobe oscillator uses C3, an external capacitor. When using the strobe oscillator, the strobe pin should be in high impedance. If the strobe pin is tied to VDD, MC33696 is running. If the strobe pin is tied to GND, MC33696 is sleeping. It is possible to configure MC33696 and receive data using the SPI port (SCLK, MOSI, MISO and CONFB). SEB allows you to use the same SPI for various components by deselecting the unused SPI ports. Other signals are also available. DATACLK provides a clock with a frequency that is a division of the frequency of the crystal oscillator. SWITCH can control an external switch to connect a transmitter or

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 7

receiver to the matching network. RSSIC controls the state of the RSSI circuit, allowing sampling of the incoming signal RF signal. RSSIOUT is an analog output that provides a voltage that increases with input power. This schematic is used for the evaluation version of MC33696 RF Module. This simple design is cost effective and requires little power. However, it does have the following drawbacks: • Adding a SAW filter to increase EMC performances of the receiver is not recommended because RFIN and RFOUT are connected. SAW in the receiver path causes attenuation on the transmitter path as its impedance is not high when in transmit mode. • Adding an LNA for the receiver to increase sensitivity or a PA for the transmitter to increase output power is also difficult. The reference design version of MC33696 RF module should overcome those drawbacks.

5 MC33696 RF Module: Reference Design Version

5.1 Target of this Design For high performance applications requiring long range transmission with a high level of EMC performance, you may need additional filtering and amplification. Transmission output power can be increased by an additional power amplifier. EMC performance can be improved using a SAW filter that removes all high level out-of-band interferences causing intermodulation distortion or compression. An LNA is then necessary to compensate SAW filter attenuation and to prevent sensitivity loss. After you do this, you cannot connect the receiver and transmitter path together because they cause attenuation. You must use a switch to disconnect the unused path.

SAWSAW LNALNA RFIN

Switch To antenna PinPin diodediode control SWITCH MC33696MC33696 switchswitch

RFOUT PAPA Figure 4. RF Module Architecture MC33696 can provide the signal to control the state of the switch.

Designing with MC33596/MC33696, Rev. 1 8 Freescale Semiconductor

5.2 Reference Design Version of the MC33696 RF Module

5.2.1 PIN Diode Switch The pin diode switch connects the transmitter or the receiver path to the antenna. This switch’s specifications include: • Minimum insertion loss for transmit and receive path • High isolation between transmit and receive path • Minimum current consumption when transmitting • No current consumption when receiving • Low harmonic distortion for the transmit path • Low intermodulation distortion for the receive path • Fast switching time

The pin diode switch uses the properties of the λ/4 (lambda/4) line with a characteristic impedance of Zo:

Zo = Zin× Zout λ ⁄ 4 Eqn. 5-1 or

Zo2 Zin = ------λ ⁄ 4- Eqn. 5-2 Zout The λ/4 line is an impedance inverter when: • High impedance input when output is short circuited to ground • Low impedance input when output is open circuit • Zo impedance input when output is connected to Zo

RX Z=infinite lambda/4

RX Z=Zo lambda/4

Figure 5. λ/4 Line Impedance Inversion The practical design uses that property. D1 is used as a switch; it is forward biased or not according to the voltage presented on T/R pin.

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 9

T /R IN/OUT C25

L8 D2 TX C10 RX lambda/4

D1

Figure 6. Switch Using Pin Diodes

If T/R is high, a current flows through L8, D2, the λ/4 line, and D1. Like any pin diode, D1 has a minimum resistance. The impedance presented on the IN/OUT connection is maximum and the receive part is isolated from the IN/OUT connection. D2 is forward-biased and the transmitter part is connected to IN/OUT.

If T/R is low, no current flows and D1 is high impedance. The impedance presented to the λ/4 line is then defined by the receiver impedance. If this impedance is equal to Zo, the λ/4 line reflects Zo impedance to IN/OUT and is matched. The receiver is then connected to IN/OUT without loss. Because D2 is not biased, it is high impedance and the transmitter path is disconnected from IN/OUT. The final design uses a slightly different schematic. In fact, the module is supposed to work on various frequencies. Because the λ/4 line is a printed line on the PCB, you cannot use it for the RF module. Replace the λ/4 line with its equivalent schematic.

L Zo

C C lambda/4

Figure 7. Discrete Component Equivalent To λ/4 Line The two circuits are equivalent for the same frequency if:

Zo== ZL ZC Eqn. 5-3 with

Z = ------1 - Eqn. 5-4 C 2πFC and Z = 2πFL L Eqn. 5-5

For a given Zout impedance presented at the output, the λ/4 line reflects at its input a Zin input impedance according to the following relationship: Zo = Z × Z λ / 4 in out Eqn. 5-6 or 2 Zoλ / 4 Zin = Zout Eqn. 5-7

Designing with MC33596/MC33696, Rev. 1 10 Freescale Semiconductor

By changing L and C, you can optimize Zo and Zin to minimize the loss due to the connection of the receiver path when MC33696 is transmitting. Diodes used for D1 and D2 are HSMP-3890 from Agilent. They have low impedance even if biased with low current. They also offer very low harmonic distortion for transmitter and do not degrade the overall intermodulation distortion for the receiver.

As D1 can have an ON impedance of about 8Ω when forward biased, it is necessary to have a high Zo value to obtain a high Zin for proper insulation when transmitting.

The initial design choice for the characteristic impedance of the λ/4 line was 50Ω Zo impedance. Then, by short circuiting C14 (Zout=0), Zin impedance can be evaluated because it is also dependant on the Q factor of the various components (or losses). The final choice for Zo is about 300Ω. An additional matching network between C10 and the SAW filter used is required. Exact impedance for the λ/4 line is not critical.

VCC C25 1nF IN/OUT R6 1.5k

L8 L3 C9 C10 TX 100nH 47nH 6.8pF 1nF RX

D2 D1 HSMP-3890 C13 C14 HSMP-3890 1.2pF 1.2pF T /R . C21 4.7nF Q2 BSS138 R9 1M

Figure 8. Practical Implementation of the λ/4 Switch

C9 compensates the inductive part of D1 and associated components that kill the high Zin wanted. By tuning C9, you can have a high pure resistive Zin at the input port. If T/R equals 1, the switch is in transmit mode: • Q2 is ON and bypass C21 • D2 is forward bias and connect TX to the IN/OUT port • D1 is biased with R6 and presents a low Zout impedance to the λ/4 line output • The λ/4 line presents a high impedance to the IN/OUT port • RX path is then disconnected If T/R equals 0, the switch is in receive mode: • Q2 is OFF • D2 is not biased and TX is isolated from the IN/OUT port • D1 is not biased and presents an high impedance to the RX port • RX is connected to the IN/OUT port through the λ/4 line

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 11

The performances of the switch (with matching network to 50 Ω on all ports) are: • current consumption: 1 mA for 3 V in TX mode • TX attenuation: −0.8 dB • RX attenuation: −1dB • Isolation TX-RX: 24 dB

5.2.2 Low Noise Amplifier The low noise amplifier (LNA) should compensate for the losses of the SAW filter. It should improve overall performance and not degrade high level behavior of the receiver. Specifications for the LNA include: • Low noise figure • +10 dB power gain • 1 mA current consumption • High IP3 • Current consumption that can be switched to 0 mA when not receiving • SOT23 package, low cost Some of those specifications are in opposition. High IP3 and high power gain may require a high current. Some compromises must be made. The LNA’s design should be optimal for a given current consumption. The BFT25A represents a compromise for this application. It is used in a common emitter configuration. Biasing is defined by R1 and R8. L1 is a part of output matching network. R7 and C4 can guarantee feedback for unconditional stability. The schematic diagram includes a MOS FET transistor to switch the LNA to ON/OFF.

ENABLELNA C1 1nF

R1

C2 1.8k 1nF

L1 R7 C4 tbd C5 nc nc 1nF OUT

R8 15k

C17 IN 1nF

Q1 Q3 BFT25 BSS138

SWITCH C100 10nF

R11 1M

Figure 9. LNA Schematic S-Parameters are available for Vce=1 V and Ic=1 mA. This is the bias currently in use.

Designing with MC33596/MC33696, Rev. 1 12 Freescale Semiconductor

5.2.2.1 Design Using S-Parameters You can design an LNA using S-Parameters. If the LNA is unconditionally stable, you can define the maximum power gain and the terminal impedances to obtain stability and amplification. If the device chosen is not unconditionally stable at any frequency, a feedback can be applied to modify the LNA S-Parameters. For the study of this LNA, an Excel sheet has been created to evaluate over a wide frequency band: • The stability criteria (to know if a device is unconditionally stable or not) • The maximum available gain • The conjugate match impedances (impedance to present to have maximum gain) • The impedance to present for a given gain • The location and radius of the stability circles (location on the Smith chart of the impedances to present to have stability) • The location and radius of the NF circles (location on the Smith chart of the impedances to present to have a given noise factor) • The resulting S-parameters for a device with an RLC feedback This Excel sheet gives the computations using the transistor S-Parameters:

⎡S11 S12 ⎤ S = ⎢ ⎥ ⎣S21 S22 ⎦ Figure 10. S-Parameters Matrix

5.2.2.1.1 Stability Rollet stability factor (K) computation shows a device is unconditionally stable or not:

1+ Ds 2 − S 2 − S 2 K = 11 22 Eqn. 5-8 2× S21 × S12

with Ds = S × S − S × S 11 22 12 21 Eqn. 5-9 If K is greater than 1, the device is unconditionally stable. It is stable for any combination of source and load impedances. If K is less than 1, the transistor is conditionally stable for some combinations of source and load impedances. In this case, choose another transistor for your application, another bias point, or compute the source and load impedances that can be used in a stable configuration.

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 13

5.2.2.1.2 Maximum Available Gain (MAG) The MAG is the maximum available gain that can be obtained from a device if its input and output reflection coefficients fulfill some conditions (See Section 5.2.2.1.3, “Simultaneous Conjugate Match”).

Eqn. 5-10

S 21 MAGdB =10×log +10×log K + (signof (B1)× K ² −1) S12

with:

B1 =1+ S11 ² − S 22 ² − Ds ² Eqn. 5-11 Ds = S × S − S × S 11 22 12 21 Eqn. 5-12 K is the Rollet Stability Factor NOTE The MAG is defined only for unconditional stable transistors because K has to be greater than 1.

5.2.2.1.3 Simultaneous Conjugate Match The MAG is obtained by applying the impedances representing the conjugate matching that matches input and output to the device ports. The output load coefficient is defined by: Module:

Eqn. 5-13

B2 − (signof (B2)× B2² − 4× C 2 ² ) ΓL = 2× C 2

Argument: ∠Γ = −∠C L 2 Eqn. 5-14 with

B2 =1+ S 22 ² − S11 ² − Ds ² Eqn. 5-15 Ds = S × S − S × S 11 22 12 21 Eqn. 5-16 * C 2 = S 22 − Ds S11 ( ) Eqn. 5-17

Designing with MC33596/MC33696, Rev. 1 14 Freescale Semiconductor

The input load coefficient is defined by:

Eqn. 5-18 * ⎡ S12 × S21 ×ΓL ⎤ ΓS = ⎢S11 + ⎥ ⎣ 1− ()ΓL × S22 ⎦

5.2.2.1.4 Practical Design The Excel paper sheet has been used to compute the input and output matching network for a given gain. The results have been simulated with a Smith chart program. You can also evaluate the bandwidth of the various matching networks and the sensitivity of the various components on the results.

Figure 11. Simulated Results Computation and simulation shows the LNA should have an RLC feedback to have unconditional stability (1.2 K+4.7 nF).

A prototype matched to input and output to 50 Ω was then built and measured on a network analyzer.

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 15

ENABLELNA C1 1nF

R1

C2 1.8k 1nF

L1 R7 C4 tbd C5 J2 1.2k 4.7nF 1nF L2

R8 15k C11 C12 J1 L5 C17 1nF

Q1 C18 C19 BFT25

Figure 12. LNA Prototype This prototype showed the following performances: • 9.9 dB gain (for 11.57 dB by simulation) • 1 mA current consumption • NF not measured Later, the LNA on the final PCB presented different characteristics as tracks and ground connections of emitter changes the LNA S-parameters. As a result, RLC feedback was no longer needed.

5.2.3 Power Amplifier The power amplifier (PA) should increase the output power of the transmitter with minimum current consumption and distortion. We can define some specifications for the PA: • +5dB to +10 dB gain • +10 dBm output power • Less than 15 mA current consumption • Low distortion • Current consumption may be switched to 0 mA when not transmitting • SOT23 package, low cost The BFR520 is indicated for this kind of application. To minimize distortion, a feedback network is used.

Designing with MC33596/MC33696, Rev. 1 16 Freescale Semiconductor

VCC ENABLEPA C26 C27

L6 L9 C33 R14 OUT C34 R15

C37 C38 L11 IN Q4 BFR520 C41 C42

Figure 13. PA Prototype The design of a PA cannot be used with low-level parameters like S-Parameters. You may need to use hot S-Parameters (S-Parameter characterization using high level signals) or deal with an intensive RF simulation or lab test. One prototype that provides +8.8 dBm for 15 mA power consumption and reasonable distortion exists. But because the latest version of MC33696 silicon provides about +7 dBm at low frequency, demand for an external PA is too low to justify the additional current consumption. Even with some provisions for the PA on the , it is not equipped with components.

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 17

5.2.4 Schematic Diagram of MC33696/MC33596 RF Module The schematics presented here show only the 433.92 MHz versions. For information on other frequencies, see Section 11, “Bill of Material.”

5.2.4.1 MC33696 Reference Design at 433.92MHz Figure 5-13 shows the version developed in this application note. MC33696 is surrounded by an LNA, a SAW filter, and a PIN diode Switch. This version is not available as an evaluation tool.

18 J1-18 RSSIOUT 27 J1-27 STROBE

ENABLELNA C1 C3 VCC 1nF 1nF

R5 TP1 C7 0R VCCIO VCC 100pF VCC2 R1 1 J1-1 VCC C2 1.8k SWITCH 1nF C8 100nF 3 J1-3 GND

L1 32 31 30 29 28 27 26 25 100nH

C20 NC 15 J1-15 TX DATA R6 100nF VCC2 GND VCCIN GNDIO

1.5k C5 L2 1 VCC2IN 24 25 STROBE SWITCH J1-25 SEB 1nF 47nH RSSIOUT SEB F1 2 GNDSUBD 23 21 J1-21 SCLK L3 C9 C10 C102 RF1172B R8 VCC2RF SCLK 47nH 6.8pF 1nF 8.2pF 4 15k C6 3 22 17 J1-17 MOSI 5 3 C11 C12 1nF RFIN MOSI 3.3pF 2.2pF 4 21 19 J1-19 MISO C13 C14 C15 6 2 C101 C17 VCC2 GNDLNA U4 MI SO 1.2pF 1.2pF 2.7pF L101 1.8pF 1nF 5 20 31 J1-31 CONFB 22nH 7 1 VCC2VCO MC 33696 CONFB C22 6 19 13 J1-13 DATACLK D1 Q1 100pF GNDPA1 DATACLK

HSMP-3890 8 L100 BFT25 7 18 29 J1-29 RSSIC 27nH RFOUT RSSIC 8 17 SWITCH R10 GNDPA2 GNDDIG C21 0 4.7nF Q2 XTALIN XTALOUT VCCINOUT VCC2OUT VCCDIG VCCDIG2 RBGAP GND ENABLEPA BSS138 R9 33 J1-33 ENABLEPA

nc 9 10 11 12 13 14 15 16 ENABLELNA 35 J1-35 ENABLELNA VCC

C24 1nF VCC2 23 J1-23 /SS X1 24.19066MHz R13 R12 VCC C25 470k 1% 10k 1nF

C35 6.8pF C29 C30 J2 D2 100nF C31 100nF SMA v ert C32 L7 HSMP-3890 L8 L9 100nF 47pF 22nH 100nH 27nH

C37 R17 R102 C39 C40 8.2pF 0 0 6.8pF 4.7pF

Figure 14. MC33696 Reference Design Schematic Diagram

Designing with MC33596/MC33696, Rev. 1 18 Freescale Semiconductor

5.2.4.2 MC33596 Reference Design at 433.92MHz Figure 15 shows MC33596 surrounded by an LNA and a SAW filter. This version is not available as an evaluation tool.

18 J1-18 RSSIOUT 27 J1-27 STROBE

C3 VCC 1nF ENABLELNA C1 R5 TP1 1nF C7 0R VCCIO VCC 100pF VCC2 1 J1-1 VCC SWITCH R1 C8 C2 1.8k 100nF 3 J1-3 GND 1nF 32 31 30 29 28 27 26 25

NC 15 J1-15 TX DATA L1 C20 GND VCCIN GNDIO

100nH 100nF VCC2 1 VCC2IN 24 25 RSSIOUT SWITCH STROBE SEB J1-25 SEB C5 L2 2 GNDSUBD 23 21 J1-21 SCLK 1nF 47nH VCC2RF SCLK J2 F1 R8 3 22 17 J1-17 MOSI SMA v ert C32 L7 R2 R101 RF1172B 15k C6 RFIN MOSI 100pF 22nH 0 0 4 1nF 4 21 19 J1-19 MI SO 5 3 C11 C12 VCC2 GNDLNA U5 MISO 3.3pF 2.2pF 5 20 31 J1-31 CONFB 6 2 C101 C17 VCC2VCO MC33596 CONFB C39 1.8pF 1nF C22 6 19 13 J1-13 DATACLK 12pF 7 1 100pF GND DATACLK 7 18 29 J1-29 RSSIC Q1 NC RSSIC

8 L100 BFT25 Q3 8 17 27nH BSS138 GND GNDDIG

SWITCH C100 XTALIN XTALOUT VCCINOUT VCC2OUT VCCDIG VCCDIG2 RBGAP GND ENABLEPA 10nF 33 J1-33 ENABLEPA

9 10 11 12 13 14 15 16 ENABLELNA R11 35 J1-35 ENABLELNA nc VCC

C24 1nF VCC2 23 J1-23 /SS X1 24.19066MHz R13 R12 470k 1% 10k

C35 6.8pF C29 C30 100nF C31 100nF 100nF Figure 15. MC33596 Reference Design Schematic Diagram

5.2.4.3 MC33696 Evaluation Version at 433.92MHz This version of the RF Module shown in Figure 16 is the simplest one. It has been developed to allow lab evaluation of MC33696. Only 50Ω matching networks are added to MC33696. This version is available at various frequencies for evaluation. 18 J1-18 RSSIOUT 27 J1-27 STROBE

C3 VCC 1nF

R5 TP1 C7 0R VCCIO VCC 100pF VCC2 1 J1-1 VCC SWITCH C8 100nF 3 J1-3 GND 32 31 30 29 28 27 26 25

NC 15 J1-15 TX DATA GND VCCIN GNDIO

C20 1 VCC2IN 24 25

SWITCH STROBE J1-25 SEB 100nF VCC2 RSSIOUT SEB 2 GNDSUBD 23 21 VCC2RF SCLK J1-21 SCLK C28 VCC 3 22 17 J1-17 MOSI 1nF RFIN MOSI 4 21 19 J1-19 MISO VCC2 GNDLNA U4 MISO 5 20 31 J1-31 CONFB J2 L10 C103 VCC2VCO MC33696 CONFB SMA not connected C32 L7 100nH 100pF C22 6 19 13 J1-13 DATACLK 120pF 15nH 100pF GNDPA1 DATACLK 7 18 29 RFOUT RSSIC J1-29 RSSIC R16 R17 C36 8 17 C39 0 0 1nF GNDPA2 GNDDIG 5.6pF

XTALIN XTALOUT VCCINOUT VCC2OUT VCCDIG VCCDIG2 RBGAP GND ENABLEPA 33 J1-33 ENABLEPA

9 10 11 12 13 14 15 16 ENABLELNA 35 J1-35 ENABLELNA VCC

C24 1nF VCC2 23 J1-23 /SS X1 R13 R12 24.19066MHz 470k 1% 10k

C35 6.8pF C29 C30 100nF C31 100nF 100nF Figure 16. MC33696 Reference Design Schematic Diagram

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 19

5.2.4.4 Schematic Diagram Common to MC33696/MC33596 RF Modules Versions The schematic shown in Figure 17 is used to allow the CAD generation of different versions of MC33696 RF Modules. It is possible to obtain various schematics by adding or removing components: • MC33696 Evaluation Version: — MC33696 —50Ω Matching network • MC33696 Reference Design Version: — MC33696 —LNA —SAW Filter — Power Amplifier (not developed) — Pin Diode Switch —50Ω Matching network

18 J1-18 RSSIOUT 27 J1-27 STROBE ENABLELNA C1 tbd

C3 VCC 1nF R1 R5 TP1 C2 tbd C7 0R VCCIO VCC tbd 100pF VCC2 1 J1-1 VCC SWITCH C8 L1 100nF 3 J1-3 GND R2 R3 R4 tbd 0 0 0 32 31 30 29 28 27 26 25

NC 15 J1-15 TX DATA R6 GND VCCIN tbd R7 C4 C5 L2 C6 C20 1 GNDIO 24 25 VCC2IN

SWITCH STROBE J1-25 SEB tbd tbd tbd tbd tbd 100nF VCC2 RSSIOUT SEB F1 2 GNDSUBD 23 21 J1-21 SCLK L3 C9 C10 L4 RF1172B VCC2RF SCLK tbd tbd tbd tbd 4 R8 3 22 17 J1-17 MOSI 5 3 tbd C11 C12 RFIN MOSI tbd tbd 4 21 19 J1-19 MISO C13 C14 C15 C16 6 2 L5 C17 VCC2 GNDLNA U2 MISO tbd tbd tbd tbd tbd tbd 5 20 31 J1-31 CONFB 7 1 VCC2VCO MC33696 CONFB C22 6 19 13 J1-13 DATACLK Q1 R100 100pF GNDPA1 DATACLK

D1 8 C18 C19 BFT25 Q3 0 7 18 29 J1-29 RSSIC HSMP-3890 tbd tbd BSS138 RFOUT RSSIC 8 17 SWITCH SWITCH GNDPA2 GNDDIG C21 SAW R10 tbd 0R Q2 FILTER XTALIN XTALOUT VC CIN OUT VCC2OUT VCCDIG VCCDIG2 RBGAP GND ENABLEPA BSS138 R9 R11 33 J1-33 ENABLEPA

tbd tbd 9 10 11 12 13 14 15 16 ENABLELNA 35 J1-35 ENABLELNA LOW NOISE VCC AMPLIFIER C24 1nF VCC2 23 J1-23 /SS R13 R12 VCC C25 C26 VCC 470k 1% 10k tbd tbd ENABLEPA C28 VCC C27 tbd X1 tbd C35 NX5032GA 8pF C29 C30 J2 L6 100nF 100nF SMA vert C32 L7 L8 L9 C33 tbd C34 R15 R14 C31 tbd tbd D2 tbd tbd tbd tbd 0 tbd L10 100nF tbd L11 C36 C37 C38 tbd tbd C39 C40 HSMP-3890 tbd tbd tbd tbd Q4 BFR520 C41 C42 50 OHMS tbd tbd MATCHING PIN DIODE POWER ECHO TX NETWORK SWITCH AMPLIFIER BIAS

R16 R17 0 0 Figure 17. Complete Schematic Diagram Used for CAD Design

Designing with MC33596/MC33696, Rev. 1 20 Freescale Semiconductor

6 Connector Pin Out All the logic level signals available on J1 are referred to as VDD and GND. Do not apply any signal higher than VDD or lower than GND to the module.

VCC 1 2 GND 3 4 5 6 7 8 9 10 11 12 DATACLK 13 14 TX DATA 15 16 MOSI 17 18 RSSIOUT MISO 19 20 SCLK 21 22 /SS 23 24 SEB 25 26 STROBE 27 28 RSSIC 29 30 CONFB 31 32 ENABLEPA 33 34 ENABLELNA 35 36 Figure 18. Connector Pin Out

Table 2.

Number Name Type Function

1 VDD Power supply 3 V for MC33696 and LNA. 3 GND Power supply To be connected to a large ground plane 13 DATACLK Output Clock for MCU timer 15 DATA Input Transmitter input 17 MOSI Input/Output Serial data for the SPI port 18 RSSIOUT Output Analog RSSI output 19 MISO Output Serial data for the SPI port 21 SCLK Input/Output Serial clock for the SPI port 25 SEB Input Serial Bus Enable. Connect to 1 to enable SPI bus 27 STROBE Input Strobe oscillator control 0: strobe oscillator is stopped and MC33696 sleeps 1: strobe oscillator is stopped and MC33696 runs high: strobe oscillator is running

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 21

Table 2.

Number Name Type Function

29 RSSIC Input RSSI control 0: RSSI sampled on falling edge 1: RSSI continuously updated 31 CONFB Input Configuration mode/normal mode control for the SPI port 33 ENABLEPA Input PA bias control 0: PA is OFF 1: PA is ON. Normal mode during transmission 35 ENEBLELNA Input LNA bias control 0: LNA is OFF. 1: LNA is ON. Normal mode during reception

7 First Step For Receiver Testing The following set-up allows measurement of the sensitivity of MC33696's receiver: • 433.92 MHz • 4800 bps • No data manager • OOK or FSK To test the receiver in other configurations, refer to the registers description in the MC33696 datasheet to modify the settings properly. For other frequencies, additional script files are provided in the CD attached to the MC33696 RF Module.

7.1 Test Set Up for OOK and FSK • Plug the RF module into the MCU board • Connect the MCU board to the PC with an RS232 cable • Connect an RF generator to the SMA connector — OOK configuration: – Frequency: 433.92 MHz – Modulation: pulse (or 100% AM square wave), 4.8 kHz – RF level: -70 dBm — FSK configuration: – Frequency: 433.92 MHz – Modulation: FSK ±50 kHz, 4.8 kHz – RF level: −70 dBm • Connect an oscilloscope probe on MOSI (pin 17 of connector) — 1 V/div, 20 µs/div

Designing with MC33596/MC33696, Rev. 1 22 Freescale Semiconductor

• Connect a voltmeter or a oscilloscope probe on RSSIOUT (pin 17 of connector) • Apply 9 V power supply to the MCU board

7.2 Registers and Pins Set up Use scripts to avoid manual setting (see files in RF modules kit CD ROM). Use the control software to set up registers and pins as given in the following sections.

7.2.1 RX OOK 433.92 MHz • STROBE 1 •SEB 0 • CONFIG1 50 • CONFIG2 cD • CONFIG3 00 • COMMAND 19 • F 07F5 • FT 7096F7 •ID 00 •HEADER 00 •DATA Z •PA 0 •LNA 1 • RSSIC 1

7.2.2 RX FSK 433.92 MHz • STROBE 1 •SEB 0 • CONFIG1 50 • CONFIG2 ED • CONFIG3 00 • COMMAND 19 • F 07F5 • FT 7096F7 •ID 00 •HEADER 00 •DATA Z •PA 0 •LNA 1

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 23

• RSSIC 1

7.2.3 Measurements The oscilloscope shows the demodulated signal. Decrease RF signal levels and control the quality of the demodulated signal to evaluate sensitivity. The voltmeter measures RSSI analog voltage. Change the RF signal level to check influence.

8 First Step for Transmitter Testing The following set up allows you to measure the output power and spectral purity of MC33696's transmitter: • 433.92 MHz • Continuous wave or modulated • OOK or FSK To test the transmitter in other configurations, refer to the registers description in MC33696 datasheet to modify settings properly. For other frequencies, additional script files are provided in CD attached to the MC33696 RF Module.

8.1 Test Set-Up • Plug the RF module onto the MCU board • Connect the MCU board to the PC with an RS232 cable • Connect a spectrum analyzer to the SMA connector – Center frequency: 433.92 MHz – Span: 1 MHz – Reference level: 15 dBm – RBW: auto or 10 kHz • Apply 9 V power supply to the MCU board

8.2 Registers and Pins Set Up Use scripts to avoid manual setting (see files in RF Modules kit CD ROM). Use the control software to set up registers and pins as given in the following sections.

Designing with MC33596/MC33696, Rev. 1 24 Freescale Semiconductor

8.2.1 TX OOK 433.92 MHz •CONFB 1 • STROBE 1 •SEB 0 • CONFIG1 50 • CONFIG2 CD • CONFIG3 00 • COMMAND 39 • F 07F5 • FT 7006F7 •DATA 1 •PA 1 •LNA 0 • RSSIC 0

8.2.2 TX FSK 433.92 MHz •CONFB 1 • STROBE 1 •SEB 0 • CONFIG1 50 • CONFIG2 ED • CONFIG3 00 • COMMAND 39 • F 07F5 • FT 7086F7 •DATA 1 •PA 1 •LNA 0 • RSSIC 0

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 25

8.3 Measurements The spectrum analyzer displays the RF spectrum and allows peak power measurement. To make measurements using modulated waves, use the following command: • TXSQUARE 208 This modulates the signal with a square wave at 4800 bps or 208 µs period. Stop modulation by striking the return key. To allow another transmission in CW mode: • MODE 1 •DATA 1

9 MC33696/MC33596 RF Module Performances

9.1 Performance Variables Table 3 shows measurements done with the conditions: • RX: OOK 4.8 kbps, sensitivity measured for BER = 10−3 • TX: continuous wave, peak power measurement Table 3. Measurements

Ref Frequency RX Sensitivity TX Power RX current TX current

MC33696MOD315EV 315 MHz −105 dBm +8dBm 8.8mA 12mA MC33696MOD434EV 433.92 MHz −104 dBm +7.5dBm 9mA 13mA MC33696MOD868EV 868.3 MHz −103 dBm +4dBm 9.2mA 13mA MC33696MOD916EV 916.5 MHz −103 dBm +3.5dBm 9mA 12.5mA MC33696MOD434 433.92 MHz −106 dBm +7 dBm 10.2 mA 13.5 mA MC33596MOD434 433.92 MHz −106 dBm na 10.2 mA na

Designing with MC33596/MC33696, Rev. 1 26 Freescale Semiconductor

10 PCB Design

10.1 Layout Be careful with the layout of the PCB by using a double-sided PCB. MC33696/MC33596: • Use a large ground plane on the opposite layer • Connect each ground pin to the ground plane using a separate via for each signal. Do not use a common via • Place each decoupling capacitor as close as possible (no more than 2-3 mm) to the corresponding VDD pin • VCCDIG2 decoupling capacitor (C30) should be placed directly between VCCDIG2 (pin 14) and GND (pin 16) • Crystal X1 and associated capacitors C24 and C36 should be close to U1. Avoid loops due to the component size and tracks. Avoid routing in this area. SAW filter: • Connect each ground return directly to the ground plane. Avoid common via to guarantee maximum out of band rejection • The associated matching network should have separate ground connections LNA: • The connection of the Q1 emitter should be very short to ground to minimize track inductance and maintain stability • Feedback components (R5, R6, C4) should be connected directly between base and collector • The C2 decoupling capacitor should be connected directly between L1 and ground Other: • Minimize any track routing RF signal • Use high frequency coils with high Q values for the frequency of operation (min 15). Any change of coil source should be validated • Avoid proximity of any input and output of a block to maintain stability (LNA) or maximum rejection (SAW filter) • If the ground plane has to be cut on the opposite layer to route on a signal, maintain the continuity with another ground plane on the opposite layer and a lot of via to have minimum parasitic inductance • If you can afford a multilayer PCB, use an internal layer for the ground plane. Route the power supply and digital signals on the last layer. RF components are placed on the first layer. NOTE Matching networks should be retuned if any change has been made to PCB (track width, length or place, PCB thickness, component value). Never use a matching network designed for another PCB.

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 27

Table 4. Bill of Materials MC33696MOD315EV MC33696MOD434EV MC33696MOD868EV MC33696MOD434 MC33596MOD434 reference WEB Module BOM versionBOM FrequencyEquipment V2.0 315 MHz Evaluation 433.92 MHz V2.0 Evaluation 868.3 MHz Evaluation V2.0 433.92 MHz Ref Design 433.92 V2.0 MHz Ref Design V1.0 0603 any0603 any0603 any0603 not equipped any not equipped not equipped not equipped not equipped not equipped 100 pF not equipped not equipped not equipped not equipped 1.8 100 pF pF 10 nF 8.2 pF 100 pF 1.8 pF not equipped 8.2 pF not equipped Reference PackageC1 Supplier C10 C100 (may 0603replace 0603R10) any any not equipped not equipped not equipped not equipped not equipped not equipped 1 nF 1 nF not equipped 1 nF C101 (may C101 (may replace L5) C102 (may replace L4) C103 (may replace R100) C11C12C13 0603C14 0603 anyC15 0603 anyC16 0603 anyC17 0603 anyC18 0603 anyC19 0603 not equipped anyC2 0603 not equipped any 0603 not equipped any not equipped not equipped 0603 any not equipped not equipped any not equipped not equipped not equipped not equipped not equipped not equipped not equipped not equipped not equipped not equipped not equipped not equipped 3.3 pF not equipped not equipped not equipped 2.2 pF not equipped not equipped 1.2 pF not equipped not equipped 1.2 pF not equipped not equipped 2.7 pF not equipped 3.3 pF not equipped 2.2 pF not equipped 1 not equipped not equipped nF not equipped not equipped not equipped not equipped not equipped 1 nF not equipped 1 nF 1 nF 11 Bill of Material

Designing with MC33596/MC33696, Rev. 1 28 Freescale Semiconductor

Table 4.of Materials Bill MC33696MOD315EV MC33696MOD434EV MC33696MOD868EV MC33696MOD434 MC33596MOD434 reference WEB Module Module WEB C20C21C22 0603C24 0603 anyC25 0603 anyC26 0603 anyC27 0603 anyC28 0603 anyC29 0603 anyC3 100 0603 nF not equipped anyC30 0603 anyC31 100 pF 0603 anyC32 0603 not equipped not 1 equipped nF anyC33 0603 not equipped any 100 nFC34 0603 not equipped any not equippedC35 0603 not equipped any 100 pFC36 0603 not equipped 1 any nFC37 0603 not equipped 1 1 any nF 100 nF nF not equipped 4.7C38 nF 0603 any 1 not equipped nFC39 0603 10 nF any 100 pF not equippedC4 0603 10 nF anyC40 not equipped 1 0603 nF 82 100 not equipped not pFequipped 1 any nF nFC41 not equipped 1 nF not equipped 0603 1 any nFC42 0603 100 pF not equipped 1 any nFC5 10 0603 nF 6.8 not equipped pF any not equipped not equipped C6 10 0603 nF not equipped not 1 equipped any nF 100 nF 120 pF 1 nF not equipped 1 0603 any nF not equipped 1 nF 0603 100 pF not equipped any 3.9 not equipped 10 1 pF nF nF not equipped 6.8 any pF not equipped not 10 equipped not not equippedequipped nF not equipped 27 pF not equipped 1 nF not equipped 100 1 nF nF not equipped not equipped not equipped not equipped not equipped 100 not equipped nF not equipped not equipped 1 5.6 nF pF 6.8 pF 100 not equipped nF not equipped 8.2 pF not equipped not equipped 47 pF not equipped not equipped 1 nF not equipped 1 not equipped nF not equipped not equipped 10 not equipped not equipped nF 0.47 6.8 pF pF not equipped 1 10 nF nF 4.7 pF not equipped not equipped not equipped 100 pF not equipped not equipped not equipped 6.8 not equipped pF not equipped 6.8 1 not equipped pF nF not equipped 1 nF 12 pF 1 nF 1 nF Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 29

-2.54 mm DIL 2x18-2.54 mm DIL 2x18-2.54 mm by ANT868by ANT434 replaced by ANT434 replaced by Table 4.of Materials Bill DIL 2x18-2.54 mm 2x18-2.54 DIL mm DIL 2x18 replaced by ANT315replaced by ANT434 replaced by replaced MC33696MOD315EV MC33696MOD434EV MC33696MOD868EV MC33696MOD434 MC33596MOD434 reference WEB Module Components RFMMIN not equipped not equippedequipped not RF1172B RF1172B 0603 TDK (MLG1608)0603 not equipped TDK (MLG1608) not equipped not equipped not equippedequipped not equipped not 27 nH 22 nH 27 nH equipped not 8 L1L10 L100 (may 0603replace C18) 0603 TDK (MLG1608) L101 (may TDK (MLG1608)replace C16) not equippedL11 100 nHL2L3 not equipped 0603L4 0603 TDK (MLG1608)L5 0603equipped not TDK (MLG1608)L6 100 nH not equipped 0603 TDK (MLG1608)L7 0603 not equipped TDK (MLG1608)L8 100 0603 nH not equipped TDK (MLG1608)L9 not equipped 0603 not equipped TDK (MLG1608)Q1 47 nH 0603 not equipped not equipped TDK (MLG1608) 0603 not equipped not equippedequipped not TDK (MLG1608) SOT23 100 not equipped nH TDK (MLG1608)equipped not not Philips equipped 47 not equipped nH not equippedequipped not equipped not not equipped not equippedequipped not not equipped equipped not 47 nH not equippedequipped not equipped not 47 nHequipped not not equipped not equipped 15equipped not nHequipped not equipped not equipped not equipped not not equipped 47 nH equipped not equipped not equipped not 100 nH 47 nHequipped not 27 nHequipped not BFT25 22 nHequipped not BFT25 22 nH J2 SMA Johnson J1 DIL2x18 8mm length Pin C7C8C9 0603D1 0603 anyD2 0603 anyF1 SOT23 any Agilent SOT23 Agilent SM8558- 100 pF 100 not equipped nF not equipped not equipped not equipped not equipped 100 pF not equipped 100 nFequipped not equipped not equipped not 100 pF HSMP-3890 100 nF 6.8 HSMP-3890 pFequipped not 100 pFequipped not equipped not 100 nF 100 pF 100 nF Designing with MC33596/MC33696, Rev. 1 30 Freescale Semiconductor

ippedipped BSS138 equipped not not equipped BSS138 33696MOD868EV MC33696MOD434 MC33596MOD434 Table 4. Bill of Materials pped not equipped not equ pped not equipped not equ MC33696MOD315EV MC33696MOD434EV MC reference WEB Module 0603 any0603 any not equipped not equipped not equipped not equipped not equipped not equipped not equipped 0R 0R not equipped Q2 SOT23 Fairchild not equi Q3Q4R1 SOT23R11 Fairchild SOT23R10 Philips 0603R100 0603 any R101 (may 0603 anyreplace L4) 0603 not equi any R102 (may anyreplace not equippedC36) R12 not equippedR13 not equipped not equippedR14 0603 not equippedR15 0603 not equipped any not equipped not equippedR16 0603 not equipped anyR17 0603 not equipped anyR2 not equipped not equipped not equipped 0603 any not equippedR3 0603 any not equippedR4 0603 any not equipped not equipped R5 not equipped 1.8 10 0603 k k any 470R6 k 1% not equipped 0603 not equipped anyR7 0R not equipped 0603 not equipped any 0603 any not equipped 0603 not equipped 0R 470 any k 1% 1.8 k not equipped 10 0R k not equipped any not equipped not equipped not equipped not equipped not equipped 470 k 1% not equipped not equipped not equipped not equipped 0R 0R not equipped 10 k not equipped not equipped 0R not equipped 470 k 1% not equipped not equipped not equipped not equipped not equipped not equipped not equipped not equipped 10 0R k not equipped 470 0R k 1% not equipped 0R not equipped not equipped 0R not equipped not equipped 1.5 not equipped k 10 k 0R 0R not equipped not equipped not equipped not equipped 0R 0R

Designing with MC33596/MC33696, Rev. 1 Freescale Semiconductor 31

6MOD868EV MC33696MOD434 MC33596MOD434 Table 4. Bill of Materials MC33696MOD315EV MC33696MOD434EV MC3369 reference WEB Module FreescaleNDK MC33696 17.5814 MHz MC33696 24.19066 MHz MC33696 24.16139 MHz 24.19066 MHz MC33696 24.19066 MHz MC33596 5x5 GA R8R9U1 0603 0603X1 any LQFP32 any NX5032 not equipped not equipped not equipped not equipped not equipped not equipped not equipped 15 k not equipped 15 k

Designing with MC33596/MC33696, Rev. 1 32 Freescale Semiconductor

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Document Number: AN3457 Rev. 1 04/2007