sensors Article Hybrid Pipeline Hardware Architecture Based on Error Detection and Correction for AES Ignacio Algredo-Badillo 1,† , Kelsey A. Ramírez-Gutiérrez 1,† , Luis Alberto Morales-Rosales 2,* , Daniel Pacheco Bautista 3,† and Claudia Feregrino-Uribe 4,† 1 CONACYT-Instituto Nacional de Astrofísica, Óptica y Electrónica, Puebla 72840, Mexico;
[email protected] (I.A.-B.);
[email protected] (K.A.R.-G.) 2 Faculty of Civil Engineering, CONACYT-Universidad Michoacana de San Nicolás de Hidalgo, Morelia 58000, Mexico 3 Departamento de Ingeniería en Computación, Universidad del Istmo, Campus Tehuantepec, Oaxaca 70760, Mexico;
[email protected] 4 Instituto Nacional de Astrofísica, Óptica y Electrónica, Puebla 72840, Mexico;
[email protected] * Correspondence:
[email protected] † These authors contributed equally to this work. Abstract: Currently, cryptographic algorithms are widely applied to communications systems to guarantee data security. For instance, in an emerging automotive environment where connectivity is a core part of autonomous and connected cars, it is essential to guarantee secure communications both inside and outside the vehicle. The AES algorithm has been widely applied to protect communications in onboard networks and outside the vehicle. Hardware implementations use techniques such as iterative, parallel, unrolled, and pipeline architectures. Nevertheless, the use of AES does not Citation: Algredo-Badillo, I.; guarantee secure communication, because previous works have proved that implementations of secret Ramírez-Gutiérrez, K.A.; key cryptosystems, such as AES, in hardware are sensitive to differential fault analysis. Moreover, Morales-Rosales, L.A.; Pacheco it has been demonstrated that even a single fault during encryption or decryption could cause Bautista, D.; Feregrino-Uribe, C.