UNIVERSITY OF CINCINNATI

Date:______

I, ______, hereby submit this work as part of the requirements for the degree of: in:

It is entitled:

This work and its defense approved by:

Chair: ______

Coherent Porous Silicon Technology for Micro Loop Heat Pipes and

A dissertation submitted to the

Division of Research and Advanced Studies of the University of Cincinnati

in partial fulfillment of the requirement for the degree of

Doctor of Philosophy (Ph.D.)

In the Department of Electrical and Computer Engineering & Computer Science

2006

By

Srinivas Parimi

M.S., University of Cincinnati, Cincinnati OH, 2003 B.Tech., Nagarjuna University, AP India, 1999

Committee Chair: Thurman H. Henderson Co-Chair: Frank M. Gerner

To my parents…

ii Abstract

In this work coherent porous silicon (CPS) is used as a base technology to

develop micro Loop Heat Pipes (LHP) and multi-turn micro chromatograph. The issues

with silicon passivation in a photon pumped electrochemical cell are discussed and

innovative solutions are presented. The challenges faced in micropatterning CPS, such as

stress development around the boundaries, material selection, electrolyte selection and

process development are described.

The micro LHP developed in this lab provides a planar surface for

microelectronic chip cooling. Several generations of these devices were built with

improvements in design and optimization of heat transfer. Recently 60W/cm2 of heat flux was removed using our current micro LHP. Many steady state models were developed in this work to understand the heat delivery and to optimize the same in a micro LHP.

Microfabrication of individual components and packaging issues involved are described.

The automation of the micro LHP test setup, as well as the test results are also shown.

Using the patterned CPS wick and the new top-cap configuration, 20 W/cm2 of heat flux was transferred from the evaporator the condenser of the micro LHP, however the author believes that a near order of magnitude improvement is yet possible.

A micro chromatograph was earlier developed in this lab using micro channels in

(110) silicon. In the present modeling studies, replacing the micro channels with a CPS wick, utilizing the same above technology, showed (by modeling studies) drastic improvement in the efficiency of separation of species in a chromatographic device. By utilizing the pore walls of the CPS wick as a separating surface; all three spatial dimensions can be utilized. This enhanced the packing density and increased the number

iii of plates per unit length of the chromatograph. The multi-turn CPS chromatograph utilizes some unique packaging techniques, namely damascene process. The challenges faced in packaging to seal the device, supply with electrodes for detection and providing input and output ports are discussed. A thorough model was developed to analyze and compare the efficiency of this device with the previous device developed in this lab using micro channels.

iv

v Acknowledgements

I wish to express my sincere gratitude to many people whose support and patience

helped me to complete this work.

First and foremost, I would like to thank my advisor and mentor, Dr. H. Thurman

Henderson, who has been my inspiration. He gave me precious guidance and advice all

through my stay at UC. He has broadened my horizon in many different ways. His

patience enormously helped me to settle down and successfully complete this work.

Without his support and enthusiasm, I would have never been able to complete this

dissertation.

I would also like to acknowledge Dr. Frank Gerner, for helping me to understand the fundamentals of micro scale heat transfer and Dr. Neville Pinto made the understanding of chemical separations and chromatography easier for me.

I would also like to express my gratitude to Jeff Simkins and Ron Flenniken.

These two have been the most helpful persons at the MEMS center.

There are many colleagues and friends who either directly or indirectly helped in completing my dissertation. Praveen Medis and Ahmed Shuja need to be specially mentioned as wonderful colleagues to work with and also good friends.

I would also take this opportunity to thank my parents and my sister who helped me in many ways. I also thank, Yamini for her warm friendship and enormous patience to keep me focused. In numerous occasions, they have provided me with enough encouragement, which I desperately needed to continue.

vi I would also thank NASA Glenn research center, Ohio super computing, NSF,

NASA TEES program and UGS (University Grants Scholarship) for providing the necessary funding.

vii Table of Contents

Abstract...... iii Acknowledgements...... vi Table of Contents...... viii List of Figures...... xii List of Tables ...... xix Chapter 1...... 1 Micropatterning Coherent Porous Silicon ...... 1 1.1 Introduction...... 1 1.2 Review of literature...... 2 1.3 Formation of CPS ...... 3 1.4 Chemistry of CPS etching...... 9 1.5 CPS at the University of Cincinnati...... 11 1.6 CPS etch setup ...... 14 1.6.1 Etch catcher modification ...... 16 1.6.2 Flow, level and temperature control ...... 18 1.7 Microfabrication of CPS...... 25 1.8 Micropatterning of CPS ...... 27 1.8.1 Two pieces rig...... 28 1.8.2 Four pieces rig...... 29 1.8.3 Micropatterning of HF and UV masks...... 31 1.9 Materials investigated for HF passivation ...... 32 1.9.1 Silicon nitride...... 33 1.9.2 Low stress silicon nitride film...... 34 1.9.3 Polysilicon...... 36 1.9.4 Low stress Si3N4 + gold ...... 39 1.9.5 SU-8 ...... 40 1.9.6 Microwave plasma enhanced CVD (MW-PECVD) diamond...... 40 1.9.7 Low-stress Si3N4 + highly p-type doped polysilicon ...... 41 1.10 References...... 42 Chapter 2...... 44 Introduction to Loop Heat Pipes (LHP)...... 44 2.1 Background...... 44 2.2 Electronic device package with cooling system ...... 45 2.2.1 Thermal interface materials ...... 46 2.3 Trends in microelectronic cooling technologies...... 47 2.3.1 Heat sinks...... 47 2.3.2 Liquid cooling...... 49 2.3.3 Two phase cooling ...... 52 2.4 Micro loop heat pipes using coherent porous silicon (CPS) as a primary wick ..... 55 2.5 Summary of earlier modeling effort at UC...... 62 2.6 Generations of LHPs developed at UC...... 68 2.6.1 The 0th generation µ-LHP ...... 68 2.6.2 The 1st generation µ-LHP ...... 71

viii 2.6.3 The 2nd generation µ-LHP...... 74 2.6.4 The 3rd generation µ-LHP...... 76 2.6.5 The 4th generation µ-LHP ...... 77 2.7 References...... 81 Chapter 3...... 84 Modeling & Fabrication of Top-Cap of the LHP Evaporator...... 84 3.1 Motivation...... 84 3.2 Components of LHP ...... 84 3.3 Components of an evaporator package...... 85 3.4 Top-cap ...... 86 3.4.1 Functionality of top-cap and design considerations...... 86 3.5 Top-cap bonded around the wick design ...... 91 3.5.1 3-D FEM model with no thermal conduction pathways...... 92 3.5.2 Model constraints...... 93 3.5.3 Model plots and results ...... 94 3.6 Top-cap with conduction pads on the wick ...... 95 3.7 Top-cap designs ...... 98 3.7.1 Trapezoidal slot (rails) top-cap ...... 99 3.7.2 Rectangular slot top-cap ...... 100 3.7.3 Square column top-cap ...... 101 3.7.4 Trapezoidal column (mesas) top-cap...... 103 3.7.5 Cone Column top-cap ...... 104 3.8 ANSYS thermal model with patterned heater ...... 104 3.9 ANSYS thermal model with blanket heater...... 108 3.10 Model with Evaporation at the non-contact regions of the CPS wick...... 109 3.11 Quartz wool as the primary wick model...... 112 3.12 Distribution of heat into convection and evaporation...... 120 3.13 Effect of the size of the compensation chamber ...... 127 3.14 Effect of heat spreaders...... 129 3.15 Effect of top-cap & evaporating surface dimensions...... 131 3.16 Predictions for higher input power ...... 133 3.17 NASA Project: gravity-fed compensation chamber model ...... 135 3.18 Flow modeling of pressure drop in a trapezoidal rail design...... 139 3.19 Fabrication of top-cap...... 143 3.20 Comparison of KOH and EDP etching for top-cap ...... 148 3.21 Convex corner etching ...... 149 3.22 References...... 150 Chapter 4...... 151 Packaging, Automation and Testing of LHP ...... 151 4.1 Components of 5th generation evaporator package...... 151 4.1.1 Top-cap ...... 151 4.1.2 Patterned CPS wick...... 153 4.1.3 Compensation chamber...... 154 4.2 Packaging the evaporator...... 155 4.2.1 Bonding top-cap to patterned CPS...... 155 4.2.2 Bonding top-cap & CPS package to the compensation chamber ...... 157

ix 4.3 Condenser ...... 158 4.4 Packaging of evaporator and condenser ...... 158 4.5 Evacuation/Filling station ...... 160 4.6 LHP Measurement Automation ...... 161 4.6.1 Equipment used...... 161 4.6.2 Features included in the program...... 163 4.6.2.1 Noise filtering ...... 163 4.6.2.2 Averaging...... 163 4.6.2.3 Data logging...... 163 4.6.2.4 Power increment/decrement...... 164 4.6.2.5 File name File description...... 165 4.6.2.6 Comments ...... 165 4.7 LHP Test Results ...... 166 4.7.1 Dry vs. wet tests...... 166 4.7.2 Calorimetric calculations ...... 168 4.7.3 Non-condensable gas ...... 170 4.7.4 Effect of condenser ...... 171 4.7.5 Operating range of 5th generation LHP...... 172 4.7.6 Limitations of the present device...... 172 4.8 Integrating top-cap and CPS wick ...... 173 4.9 References...... 175 Chapter 5...... 176 Introduction to Chromatography & Previous Work ...... 176 5.1 Lab-on-a-chip...... 176 5.2 Chromatography ...... 177 5.2.1 Theory of chromatography ...... 178 5.2.1.1 Retention...... 178 5.2.1.2 Plate theory ...... 178 5.2.2 Column chromatography ...... 179 5.2.3 Gas-liquid chromatography ...... 179 5.2.4 Ion exchange chromatography...... 181 5.2.5 High performance liquid chromatography (HPLC)...... 182 5.2.3 Literature review...... 183 5.2.3.1 Chromatography ...... 183 5.2.3.2 Micro columns ...... 183 5.2.3.3 Capillary electrophoresis ...... 185 5.3 Micro open parallel plate separator (µ-OPPS)...... 186 5.3.1 (110) silicon etching ...... 186 5.3.2 µ-OPPS device...... 189 5.3.3 Surface activation of the side walls ...... 192 5.3.4 Testing and results [5.23]...... 194 5.4 References...... 196 Chapter 6...... 199 Multi-turn micro chromatograph on a chip...... 199 6.1 Limitations of µ-OPPS device ...... 199 6.2 Multi-turn micro chromatograph ...... 199

x 6.3 Fabrication of multi-turn micro chromatograph ...... 200 6.3.1 Material selection for top and bottom caps...... 201 6.3.2 Providing electrodes at each turn...... 201 6.4 CFD modeling of pressure and velocity ...... 207 6.5 Calculation of plate height...... 210 6.6 Modeling open tubular columns ...... 213 6.6.1 Finite difference explicit (forward) scheme...... 217 6.7 Model results...... 220 6.7.1 Number of plates and plate heights...... 220 6.7.2 Curve fitting...... 225 6.7.3 Resolution ...... 227 6.8 References...... 229 Chapter 7...... 230 Conclusions and Future Work ...... 230 7.1 Coherent porous silicon ...... 230 7.2 Micro LHP ...... 231 7.3 Multi-turn micro chromatograph ...... 232 7.4 Future work...... 233 7.5 References...... 234 Appendix A: Level Control Design Logic...... 235 Appendix B: Oxidation Procedure Sheet...... 238 Appendix C: Reactive Ion Etching (RIE) Procedure Sheet...... 240 Appendix D: RCA Cleaning ...... 241 Appendix E: KOH Etch Rates ...... 242 Appendix F: Open Tube Liquid Chromatograph Matlab Program...... 243 Appendix G: Material Suppliers and Contact Information...... 247

xi List of Figures

Fig. 1. 1: SEM image of a CPS micromachined using photon pumped electro chemical etching process. From [1.1]...... 1 Fig. 1. 2: a) MPS showing non-coherent pores. b) CPS showing micrometer sized pores in a coherent fashion...... 2 Fig. 1. 3: A schematic of a typical photo electro chemical cell...... 4 Fig. 1. 4: Light when incident on a silicon wafer creates electron-hole pairs. The holes drift to the electric field concentrators to form silicon dioxide. HF subsequently etching this oxide...... 4 Fig. 1. 5: Typical I-V curve for an illuminated n-type Si...... 5 Fig. 1. 6: Electropolishing mode of the CPS etching...... 6 Fig. 1. 7: I-V curve. Pore cross-sectional shapes depend on the bias and the current. From [1.1]...... 8 Fig. 1. 8: Lexan etch catcher [1.19]...... 16 Fig. 1. 9: a) Glass etch catcher with circulating water. b) Schematic of etch catcher. Dimensions in cms...... 17 Fig. 1. 10: Longer pores attract more holes due to higher electric field...... 19 Fig. 1. 11: Uniform pore growth leads to uniform electric flux lines. From Hoelke [1.1]19 Fig. 1. 12: Irregular length of pores...... 20 Fig. 1. 13: Schematic of a CPS etch setup with level, flow and temperature control...... 23 Fig. 1. 14: Flow control system...... 23 Fig. 1. 15: SEM image of a broken CPS sample etched with cycling of HF at 40oC. Pore diameter 5 µm, pore pitch 10 µm, length of pores 280 µm...... 24 Fig. 1. 16: Orthogonal array & Hexagonal array...... 25 Fig. 1. 17: Lexan plate micromachined with 2 holes with O rings to selectively mask HF, CPS wick etched with such a system and bottom electrode with holes to selectively pass UV light...... 29 Fig. 1. 18: Silicon wafer with Si3N4. Four square windows of pores initiation etch pits are made...... 30 Fig. 1. 19: Gold films evaporated for UV light masking. Windows were opened in them to allow UV at selected regions...... 32 Fig. 1. 20: Stress field developing around the boundaries of the patterned CPS wick causing accelerated etching. a) schematic b) SEM image of a CPS wick having accerelated etching at the boundary. From [1.20]...... 34 Fig. 1. 21: Meso pores formed at pin holes of silicon nitride causing the film to delaminate...... 34 Fig. 1. 22: CPS patterned wafer with low stress silicon nitride as a masking film. Over- etching near the boundary can be observed. A drastic reduction of boundary etching can be seen due to low stress in the film...... 35 Fig. 1. 23: a) Cross section of a CPS sample etched using low stress silicon nitride. b) zoomed in image showing the tapering of pores along the width...... 36 Fig. 1. 24: Cartoon compares the etch pit initiation technique depending on weather SiN or PolySi is used as the passivation film...... 38 Fig. 1. 25: A reticulated microstructure which resulted when the etch pit initiation was done with plasma etching...... 38

xii Fig. 1. 26: A CPS sample which after lapping shows a micro array of pores separated by bonding pads...... 39 Fig. 1. 27: CPS pores with almost defect free boundaries. Little skewing of pores can be attributed to finite amount of stress present in low stress silicon nitride...... 42

Fig. 2. 1: Heat flux for various computer processors with time from [2.1]...... 45 Fig. 2. 2: Thermal interface materials and their typical thermal resistances. From [2.1]. 47 Fig. 2. 3: Heat sink, thermal interface material and microelectronic chip package...... 47 Fig. 2. 4: A fan and a heat sink assembly on top a micro-processor...... 49 Fig. 2. 5: Schematic of Apple G5 desktop liquid cooling system. 1. G5 processor at point of contact to the heatsink. 2.G5 processor card from IBM 3. Heatsink (also referred to as a 'waterblock') 4. Cooling fluid output from the radiator to the pump 5. Liquid cooling system pump 6. Pump power cable (usually connected to the main logic board, but repositioned in the above diagram) 7. Cooling fluid radiator input from the G5 processor 8. Radiant grille 9. Airflow direction. From [2.3]...... 51 Fig. 2. 6: A CPU liquid cooler with a pump and an external fan. From [2.4]...... 51 Fig. 2. 7: Cutaway section of a heat pipe showing the evaporator and condenser section. From [2.7]...... 53 Fig. 2. 8: Schematic of the working of a heat pipe. The wicking material using capillary pressures to pump liquid from the condenser to the evaporator...... 53 Fig. 2. 9: Left: CPL with an external liquid reservoir. Right: LHP with liquid reservoir with the evaporator section [from 2.8]...... 54 Fig. 2. 10: Representation of a cylindrical LHP. From [2.8]...... 58 Fig. 2. 11: Schematic of the basic LHP. From [2.20]...... 59 Fig. 2. 12: Schematic of a LHP with CPS as the primary wick. Top-cap and bottom liquid reservoir are also shown. From [2.20] ...... 60 Fig. 2. 13: Schematic of the Loop Heat Pipe acting against gravity. From [2.20]...... 62 Fig. 2. 14: Schematic of LHP for global model developed by Hamden. From [2.9]...... 63 Fig. 2. 15: Schematic of 0th generation µ-LHP...... 68 Fig. 2. 16: Terminal Board Assembly for Loop Heat Pipe Experiments...... 69 Fig. 2. 17: Schematic of the mask used for the fabrication of the top evaporator plate and the top cap after fabrication...... 69 Fig. 2. 18: Schematic of the pores covered by the hot plate ...... 71 Fig. 2. 19: Graph showing how different packing densities affect absorption. Also a line mimicking capillary force is added. The data for the absorption test was fit to a 2nd degree polynomial and showed a very good match. From [2.27]...... 73 Fig. 2. 20: Permeability test of the secondary wick. Graph shows linear relationship between the pressure drop and flow rate. From [2.27]...... 74 Fig. 2. 21: Schematic of 2nd generation LHP...... 74 Fig. 2. 22: Picture of 2nd generation LHP ...... 75 Fig. 2. 23:Temperature at T1 next to heater on top-cap...... 76 Fig. 2. 24: Different views of a the 3rd generation LHP. Right top show the front view of the evaporator package with attached S/S tubes, heater and thermocouples...... 77 Fig. 2. 25: Variation of the top cap temperature vs. power...... 77

xiii Fig. 2. 26: Photograph and a schematic of the Pyrex® bottom plate, the larger cavity, V1, will functioned as the compensation chamber and the secondary wick will be placed in the smaller cavity,V2...... 78 Fig. 2. 27: Schematic of the copper condenser. Both fins attached inner vapor line and outer cooling water flow channel can be seen...... 79 Fig. 2. 28: Partially completed evaporator package. Centrally located vapor tube and the electrical connection can be seen...... 79 Fig. 2. 29: Photographs of the 4th generation system. Left; the complete system. Top right; front view of the mounted evaporator package and bottom right; the condenser... 81 Fig. 2. 30: Filling station for the 4th generation LHP device...... 81

Fig. 3. 1: Basic loop heat pipe (From [3.1])...... 85 Fig. 3. 2: Schematic of a top-cap covering pores, which can inactivate pores under the foot...... 87 Fig. 3. 3: SEM image of an interconnected coherent porous silicon...... 87 Fig. 3. 4: Poor lateral conduction can shut LHP operation...... 88 Fig. 3. 5: Poor lateral conduction can shut LHP operation creating vapor on the backside (From [3.1])...... 89 Fig. 3. 6: Secondary wick placed to stop wick dry-out in the primary wick (From [3.1])...... 90 Fig. 3. 7: Heat conduction path with top-cap bonded around the primary wick [From 3.2]...... 91 Fig. 3. 8: Temperature profile (K) of a 2-D model of thermal conduction with top-cap bonded around the 1cm x 1cm wick [From 3.2]...... 92 Fig. 3. 9: Top isometric views of the modeled top-cap...... 93 Fig. 3. 10: Bottom isometric views of the modeled top-cap...... 93 Fig. 3. 11: Evaporator package with heater, top-cap (with two vapor ports), simulated CPS wick as a silicon block...... 93 Fig. 3. 12: Temperature profile of the evaporator package (in degrees Celsius)...... 95 Fig. 3. 13: Heat flux profile (in W/m2). Top view of the evaporator package...... 96 Fig. 3. 14: Heat flux profile (in W/m2). Front view of the evaporator package...... 97 Fig. 3. 15: Heat conduction using the top-cap with conduction pads. Some of the pores are covered by the thermal conducting pads (from [3.1])...... 97 Fig. 3. 16: Top-cap bonded to a patterned CPS wick. Pores are absent under the conduction pad feet...... 97 Fig. 3. 17: Patterned CPS wick to allow thermal conduction pathways...... 98 Fig. 3. 18: Trapezoidal slot top-cap design (From [3.1])...... 99 Fig. 3. 19: Cad design of top-cap with trapezoidal rails and two vapor plenums with two vapor ports...... 100 Fig. 3. 20: Rectangular slot top-cap design (from [3.1])...... 101 Fig. 3. 21: Square column top-cap design (from [3.1])...... 102 Fig. 3. 22: a) Schematic of a unit cell patterned & etched using CPS etching technique b) Schematic of the structure after etching using silicon etching (anisotropic/isotropic)... 102 Fig. 3. 23: SEM image of a silicon sample, which was patterned and etched using CPS etching. The image was taken in between the post isolation etching process...... 103

xiv Fig. 3. 24: Schematic of trapezoidal columns (mesas) formed from (100) silicon using anisotropic etching techniques (from [3.1])...... 103 Fig. 3. 25: Schematic of cone columns top cap design (from [3.1])...... 104 Fig. 3. 26: Top-cap temperature vs. no. of rails included in the top-cap...... 106 Fig. 3. 27: Temperature distribution of the top-cap with 32 rails...... 107 Fig. 3. 28: Heat flux profile with 32 rails (in W/m2). Top view of the evaporator package...... 107 Fig. 3. 29: Heat flux profile with 32 rails (in W/m2). Front view of the evaporator package...... 108 Fig. 3. 30: Top-cap temperature distribution with blanket heat flux of 25 W/cm2...... 109 Fig. 3. 31: Dimensions of the top-cap and CPS wick...... 110 Fig. 3. 32: Temperature distribution (oC) on the top-cap with evaporation simulated on top of the CPS wick...... 111 Fig. 3. 33: Thermal flux (W/m2) across the cross-section of the rails...... 111 Fig. 3. 34: Proof of heat transport to the top of the CPS wick. The bending of the heat flux lines at the top of the CPS wick gives the direction of heat transfer...... 112 Fig. 3. 35: Compensation chamber (purple) with quartz wool (light green) are shown. The foot print of the top-cap is also visible...... 113 Fig. 3. 36: Top-cap temperature profile using quartz wool as the primary wicking material...... 115 Fig. 3. 37: Evaporator package heat flux lines (W/m2)...... 115 Fig. 3. 38: Temperature profile of the evaporator package using the 45oC backside constraint...... 116 Fig. 3. 39: Temperature profile of the evaporator package along the cross section perpendicular to the rails direction...... 117 Fig. 3. 40: Heat flux (W/m2) lines of the evaporator package after the 45oC constraint on the backside of the compensation chamber...... 117 Fig. 3. 41: Heat flux lines bending from the thermal conduction pathway to reach the evaporating surface of quart wool...... 119 Fig. 3. 42: Heat flux (W/m2) lines are bending to incorporate the convection of the package...... 119 Fig. 3. 43: Temperature distribution in oC on evaporator package for simulated dry test at 4.73 W...... 122 Fig. 3. 44: The experimental setup of the quartz wool as the primary wick LHP working without evacuation (from [3.3])...... 123 Fig. 3. 45: Distribution of input power into evaporation and convection in the evaporator package...... 125 Fig. 3. 46: Maximum temperature on the top-cap versus power that went into evaporation...... 126 Fig. 3. 47: Minimum package temperatures versus convective power...... 127 Fig. 3. 48: Temperature profile of the top-cap with no thermal spreader. A 20oC variation can be observed...... 130 Fig. 3. 49: Maximum top-cap temperature vs. thickness of the copper thermal spreader for 100 W of input power...... 131 Fig. 3. 50: a) Compensation chamber drilled with circular drill bit. Imprint of top-cap shows that the area of evaporating surface inside the hole is not completely matching the

xv top-cap b) Square hole drilled using UIG has exact matching of the evaporating surfaces to the top-cap...... 132 Fig. 3. 51: New top-cap with 10 thermal conduction pathways with 160 µm rail width...... 133 Fig. 3. 52: Glass compensation chamber, (a) cross section, (b) viewed from back side (From [3.3])...... 136 Fig. 3. 53: Rendering of the compensation chamber to the exact dimensions for modeling...... 137 Fig. 3. 54: Temperature profile of the evaporator package using gravity fed compensation chamber...... 138 Fig. 3. 55: Heat flux (W/m2) distribution of the evaporator package using gravity fed compensation chamber...... 138 Fig. 3. 56: Schematic of the top-cap with 32 rails. The yellow region was considered for modeling...... 140 Fig. 3. 57: Velocity profile in a single rail...... 141 Fig. 3. 58: Pressure drop in a single rail...... 141 Fig. 3. 59: Velocity profile of the top-cap with 16 half rails...... 142 Fig. 3. 60: Pressure contour of the top-cap with 16 half rails...... 142 Fig. 3. 61: Growth of silicon dioxide on silicon...... 144 Fig. 3. 62: Liftoff process with and without chlorobenzene. Cross-linking of metal lines is possible, when chlorobenzene dip is not used. With chlorobenzene dip metal lines have no cross-linkage enabling a clean liftoff...... 147 Fig. 3. 63: a) Top-cap with heater pattern in a spiral shape, two bond pads with holes drilled in them for vapor exit, a RTD (thin metal line with two bond pads) can be seen. b) 32 rails top-cap fabricated using silicon nitride as a masking layer. The depth of the vapor plenum is 150 µm...... 148 Fig. 3. 64: a) Smooth surfaces etched with EDP. b) Rough surfaces in silicon after KOH etching...... 149 Fig. 3. 65: SEM image at the end of the thermal conducting pathways. Undercutting of the convex corners left a smooth turning profile for the vapor from the channels to the plenum...... 150

Fig. 4. 1: a) Four silicon top-caps on a 2” wafer with heaters, RTDs and bond pads (top side). b) Four silicon top-caps with rails and vapor plenums (bottom side)...... 153 Fig. 4. 2: Patterned CPS wick shown here. The pores are cross-permeated...... 154 Fig. 4. 3: Compensation chamber with two diameter holes...... 155 Fig. 4. 4: Packaged evaporator package with top-cap/CPS bonded to the compensation chamber. Soldered electrical connections can be seen to the heater and the RTD. Two vapor transport lines are also seen...... 157 Fig. 4. 5: Smaller condenser designed to allow calorimetric calculations of the heat transfer. a) Schematic of the condenser. b) Photograph of a condenser. [4.2] ...... 158 Fig. 4. 6: Schematic of 5th generation LHP...... 159 Fig. 4. 7: Photograph a 5th generation LHP...... 159 Fig. 4. 8: A LHP filling station with LHP on the right can be seen. A roughing pump is employed to evacuate the loop. A D.I. water feed is used and a glass burette is used to meter the fill quantity. From [4.3] ...... 161

xvi Fig. 4. 9: Signals before and after passing through the low pass butterworth filter...... 164 Fig. 4. 10: Sample logged data...... 164 Fig. 4. 11: Sample of comments...... 165 Fig. 4. 12: Top-cap temperatures vs. input power of dry and wet loop tests...... 168 Fig. 4. 13: Thermocouple reading of the LHP vs. input power applied to the heater..... 170 Fig. 4. 14: A 16.5% porous CPS wick...... 173 Fig. 4. 15: Schematic of an interpenetrating coherent porous silicon wick (ICPS)...... 174 Fig. 4. 16: SEM images of ICPS micro fabricated using CPS etching process...... 175

Fig. 5. 1: A schematic of a gas chromatograph with injection and detection...... 180 Fig. 5. 2: (110) silicon wafer with a vertical slot etched using anisotropic etching. A-A’ and B-B’ cross sections show two vertical (111) planes and two (111) planes at an angle of 35.26o with (110) silicon plane...... 187 Fig. 5. 3: Typical anisotropic etching geometry in (110) wafers, resulting from slow etching (111) planes and the (110) bottom. Note the possibility of etching long, deep channels with vertical sidewalls along two different directions. From [5.29]...... 188 Fig. 5. 4: Illustration of {133} shoulders forming at the (110) bottom. From [5.29]. .... 188 Fig. 5. 5: Schematic representation of micro-channels. From [5.30] ...... 190 Fig. 5. 6: Cross-sectional view of the complete device. From [5.30]...... 191 Fig. 5. 7: Schematic representation of the detectors. From [5.23]...... 191 Fig. 5. 8: Fabrication steps involved in the realization of the micro-channels, conductivity detectors and reservoirs. From [5.23]...... 192 Fig. 5. 9: Chemistry of the surface activation process. From [5.24]...... 194 Fig. 5. 10: Continuous activation cycle procedure. After [5.24]...... 194 Fig. 5. 11: Typical anion exchange chromatogram for micro-device. From [5.30]...... 195 Fig. 5. 12: Effect of KNO3 concentration. From [5.30]...... 196

Fig. 6. 1: Cross section of a multi-turn micro chromatograph flow path. The flow direction is shown in arrows. The CPS pore diameters are typically around 5 µm and length of the pores around 300 µm...... 200 Fig. 6. 2: Cutaway cross section of a multi-turn chromatograph with hemispherical turning spaces in glass top and bottom caps...... 202 Fig. 6. 3: Process sequence of a dual-damascene process to provide electrodes in the turns of a multi-turn micro chromatograph...... 204 Fig. 6. 4: Bottom view of electrode configuration on the top cap. Here, CPS pores and bottom cap& its electrode are shown for illustrative purposes (dotted lines). A voltage is applied between a set of electrode, and current is monitored...... 204 Fig. 6. 5: Bottom view of the top cap of the multi-turn micro chromatograph. All dimensions are in micrometers...... 205 Fig. 6. 6:Top view of the CPS of the multi-turn micro chromatograph. All dimensions are in micrometers...... 205 Fig. 6. 7: Top view of the bottom cap of the multi-turn micro chromatograph. All dimensions are in micrometers...... 206 Fig. 6. 8: Front view of the assembled package of the multi-turn micro chromatograph. All dimensions are in micrometers...... 206

xvii Fig. 6. 9: Schematic of a unit cell. This consists of half the turning volume in both the top cap and the bottom cap and an array of CPS pores...... 208 Fig. 6. 10: Log-log plot of pressure drop(Pa) in a unit cell vs. volumetric flow rate in ml/min...... 208 Fig. 6. 11: Contours of static absolute pressure in Pa of a two unit cell...... 209 Fig. 6. 12: Velocity vectors in m/sec of a two unit cell...... 210 Fig. 6. 13: Plot of plate height in meters of the µ-OPPS device developed earlier at UC...... 212 Fig. 6. 14: Plot of plate height in meters of the multi-turn micro chromatograph using CPS structure...... 212 Fig. 6. 15: OTLC column showing various directions in cylindrical coordinates...... 214 Fig. 6. 16: FWHM calculated from a peak of a specie concentration...... 221 Fig. 6. 17: Chromatograph showing detection of KCl at 100, 200, 300, 400 and 500 µm...... 222 Fig. 6. 18: Chromatograph showing detection of KBr at 100, 200, 350, 400 and 500 µm...... 223 Fig. 6. 19: Chromatograph showing detection of K2SO4 at 100, 200, 300, 400 and 500 µm...... 223 Fig. 6. 20: Chromatograph showing detection of KCl , KBr and K2SO4 at 100 µm...... 224 Fig. 6. 21: Chromatograph showing detection of KCl , KBr and K2SO4 at 500 µm...... 224 Fig. 6. 22: Plot of elution times in milliseconds with the detector position in micrometers...... 225 Fig. 6. 23: Plot of ratio of peak concentration with initial concentration with the detector position in micrometers...... 226 Fig. 6. 24: Plot of number of plates with the detector position in micrometers...... 227 Fig. 6. 25: Resolution of two peaks is calculated by how far the peaks are and how broad they are. After [6.4]...... 228 Fig. 6. 26: Resolution of the 3 pairs of ions with respect to detector position...... 228

xviii List of Tables

TABLE 3. 1: RESULTS FROM SIMULATED MODEL OF THE DRY TEST...... 121 TABLE 3. 2: RESULTS FROM SIMULATED MODELS OF THE WET TESTS...... 123 TABLE 3. 3: EXPERIMENTAL DATA OF A CLOSED LHP (FROM [3.3])...... 124 TABLE 3. 4: EFFECT OF COMPENSATION CHAMBER SIZE ...... 128 TABLE 3. 5: MAXIMUM TOP-CAP TEMPERATURES FOR VARIOUS THICKNESS OF CU HEAT SPREADERS...... 130 TABLE 3. 6: SUMMARY OF DATA OF THE MODELS ...... 134 TABLE 3. 7:PROJECTIONS FOR HIGHER INPUT POWER TO THE LHP...... 134 TABLE 3. 8: DIMENSIONS OF THE COMPENSATION CHAMBER (FROM [3.3]) ...... 136 TABLE 3. 9: VOLUME OF THE COMPENSATION CHAMBER (FROM [3.3])...... 136

TABLE 4. 1: DISTRIBUTION OF INPUT POWER INTO HEAT TRANSFER TO CONDENSER AND TO AMBIENT ...... 169

TABLE 6. 1: PRESSURE DROPS IN ONE UNIT WITH WATER AS THE MOBILE PHASE...... 207 TABLE 6. 2: PRESSURE DROPS IN ONE UNIT WITH METHANOL AS THE MOBILE PHASE...... 207 TABLE 6. 3: SAMPLE DATA OF PLATE HEIGHT IN METERS FOR µ-OPPS DEVICE (S.I. UNITS)...... 212 TABLE 6. 4: SAMPLE DATA OF PLATE HEIGHT IN METERS FOR MULTI-TURN MICRO CHROMATOGRAPH (S.I. UNITS)...... 213 TABLE 6. 5...... 215 TABLE 6. 6: PLATE HEIGHT AND NUMBER OF PLATES CALCULATIONS FOR KCl...... 221 TABLE 6. 7:PLATE HEIGHT AND NUMBER OF PLATES CALCULATIONS FOR KBr...... 221 TABLE 6. 8: PLATE HEIGHT AND NUMBER OF PLATES CALCULATIONS FOR K2SO4 ...... 221

xix Chapter 1 Micropatterning Coherent Porous Silicon

1.1 Introduction

Coherent Porous Silicon (CPS) also known as Macro Porous Silicon (MPS) is a silicon structure with micrometer sized holes micromachined up to the lengths of the silicon thickness. Photon pumped electro chemical etching process is used to micromachine CPS. Figure 1.1 shows a Scanning Electron Microscopy (SEM) picture of a CPS. Coherent porous silicon has uniform sized holes through out the wafer. The coherent nature of the pores and each pore’s high aspect ratios (width to depth ratio) enables multitude of applications for such a device. This technology can also be used as a direct replacement for Deep Reactive Ion Etching (DRIE) or Bosch process commercially used in industry to make high aspect ratio microstructures.

Fig. 1. 1: SEM image of a CPS micromachined using photon pumped electro chemical etching process. From [1.1].

1 1.2 Review of literature

Electrochemical formation of porous silicon in Hydro Fluoric (HF) acid solutions was discovered in 1956 [1.9]. The interest in its research was quite recent after the discovery of porous silicon’s photoluminescence in 1990 [1.10]. Lehmann group in

Germany pioneered the work on MPS [1.2-1.5]. In 1990, Lehmann and Foll [1.6] discovered regular arrays of pores in silicon can be etched. These pores of high aspect

ratios were obtained using n-type doped silicon in HF acid etching system. There research concentrated on micro porous silicon or simply porous silicon and meso porous silicon for optical applications [1.7]. Using MPS, new capacitor technology [1.11] and photonic crystals [1.12] were achieved. In 1994, Propst and Kohl [1.8] etched macroporous silicon in p-type doped silicon using HF containing organic electrolyte

(water-free acetonitril). The distinction between micro, meso and macro porous silicon is established by the size of the pores. Micro pores have typical diameters less than 2 nm, meso pores between 2 to 50 nm and any size beyond meso pores are considered as macro pores. The basic distinction between MPS and CPS is that the macropores in CPS are coherent in nature. Refer Fig. 1.2 to see the distinction between MPS and CPS.

a) b)

Fig. 1. 2: a) MPS showing non-coherent pores. b) CPS showing micrometer sized pores in a coherent fashion.

2 1.3 Formation of CPS

Photon-pumped etching is performed in an electrochemical etch setup with

aqueous or organic HF solution. The substrate (Si) in the electrochemical cell is anodically biased. Along with CPS, electropolishing and nanoporous silicon result from the same etch setup [1.13].

Acidic etching mainly depends on the reduction of the etched species (Eq. (1.1)).

The holes required for the etching process is supplied either by the intrinsic hole concentration in the wafer (for p-type Si) or by external illumination of the wafer (for n- type Si). The holes created reach the etching interface and form silicon dioxide, which is subsequently etched by HF. This mechanism is also called anodization of silicon. The current research concentrates on n-type wafers. Both inorganic and organic electrolytes are used. A schematic of photo-electrochemical setup is shown in Fig. 1.3. Here the n- type silicon is positively biased with respect to the HF electrolyte. Electron-hole pairs are created on the backside of the silicon wafer by shining light. The holes created in the bulk of the wafer drift to the anisotropically etched field concentrators on the top of the surface. Anodic oxidation of the field concentrator and subsequent etching in HF enables high aspect ratio pores in silicon (Fig. 1.4).

A− + h+ → A (1.1)

3

Fig. 1. 3: A schematic of a typical photo electro chemical cell.

HF ACID -

N N++

Fig. 1. 4: Light when incident on a silicon wafer creates electron-hole pairs. The holes drift to the electric field concentrators to form silicon dioxide. HF subsequently etching this oxide.

A typical current vs. voltage (I - V) plot across n-type Silicon (Si) curve in a photo-electrochemical cell is illustrated in Fig. 1.5.

4 El ectr opol i shi ng

Coher ent por es Nanopor es

Voltage

Fig. 1. 5: Typical I-V curve for an illuminated n-type Si.

The above curve can be divided into three different regions [1.13]. These regions differ in the quantity of holes that are supplied to the etching interface.

i) Nanoporous Si formation region: At very low bias, the holes generated at the wafer surface do not have enough drift to reach the etching interface. Hence, the etching interface is limited by the supply of holes. In highly doped samples, concentration of high electric fields tends to Zener breakdowns at the pore tips leading to electron hole pair

(EHP) formation. This results in random etching of the tips at the breakdown sites. The

resultant pores have a diameter in the order of nanometers and are called nanopores or

mesopores. Nanoporous Si is a fast etching sacrificial material used in MEMS

processing. Its conductivity varies by more than a couple of orders of magnitude. Its

photoluminescence behavior attracted the research community in the past decade.

Research is still underway to understand the physics of such behavior. Quantum effects,

charge surface traps are some of the reasons proposed.

ii) CPS formation region: The region between nanoporous Si formation and

electropolishing is the region for CPS formation. For CPS formation, there should be

5 equilibrium between the holes and the reactants reaching the etching interface. Flow of fresh etchant helps in the process of stabilization of the electrochemical cell. Defects in the wafer can result in the disturbance of such equilibrium.

iii) Electropolishing region: In this region due to high drift voltages, the etching interfaces are supplied with more than the sufficient number of holes required for CPS formation. The etching is then limited by transport of reactants, resulting in smoothening of the hillocks. This phenomenon of polishing in an electrochemical cell is termed as electropolishing. Oscillatory behavior of the current is also observed at very high voltages. This leads to the formation of burst through pores. These are very small pores

(nano meters range) and form due to the electrical breakdown of the material, which results in EHP pairs. Figure 1.6 illustrates electropolishing of silicon.

Fig. 1. 6: Electropolishing mode of the CPS etching.

Due to electric field being concentrated at the tip of the pores, limited numbers of

holes reach the pore walls. This reduces the chance of increase in pore diameters with

time. The formation of nanoporous Si was also observed on the pore walls. The high

6 resistivity of nanoporous Si limits the electric field concentration at the pore walls and helps in the passivation of the same. A critical current density (Jps) is defined as the current density required for the cell to be in the transition mode from nanoporous Si

formation to the electropolishing. General consensus is that at this critical current density

the cell will maintain equilibrium between the holes reaching the pore tips and the

reactants reaching the etching interface. CPS etching works best when a steady state

condition is reached in the etching process.

Lehmann [1.13] demonstrated that the pore diameter is a function of the ratio of

the current density and the critical current density (Eq. (1.2)).

J d = p (1.2) J ps where,

d - diameter of the pore

p - pitch between pores

J - current density

Jps - critical current density

As voltage is increased in the I-V curve, the current is also forced to increase. For stable CPS formation, the critical current density should be constant. Hence, the process increases the area of etching to enable this. Therefore, larger diameter pores are formed at

higher values of current densities. Different pore cross-sectional shapes can be obtained

with variation in the applied bias (Fig. 1.7). Lehmann [1.4] gave an empirical limitation

of pore diameters (Eq. (1.3)). In this work, the maximum diameters of the CPS wick

never exceeded the diameters predicted by this equation for a given wafer resistivity.

7 d = ρ (1.3) where,

d - pore diameter in micrometers

ρ - resistivity of the Si wafer in Ω-cm

Fig. 1. 7: I-V curve. Pore cross-sectional shapes depend on the bias and the current. From [1.1].

The law of mass action (Eq. (1.4)) can explain the dependence of pore diameter on the wafer resistivity. N-type wafers of higher resistivity have lower concentration of majority carriers (electrons) compared to lower resistivity wafers. Equation (1.4) suggests that the lower the number of electrons, the higher the number of holes in a Si wafer.

Therefore, in a higher resistivity n-type silicon wafer, the presence of higher concentration of holes leads to larger diameters [1.14].

2 ni = np (1.4)

where,

ni - intrinsic carrier concentration

n - electron concentration

p - hole concentration

8 Faraday’s law for the dissolution rate of Si gives the growth rate ν of the pores, with the dissolution valence (number of charge carriers consumed for the dissolution of one Si atom, or the reciprocal current efficiency) η, the elementary charge (e) and the atomic density of silicon Nsi (Eq. (1.5)). Lehmann [1.13] found, empirically, that the values of η to lie between 2 and 4.

J ν = ps (1.5) η(−e)N si

1.4 Chemistry of CPS etching

Any successful model for the mechanism of silicon anodization has to account for

1) variation of effective dissolution valence of silicon atoms 2) hydrogen surface termination and evolution 3) participation of minority and majority bands 4) formation

and dissolution of SiO2 5) the effect of doping, electric potential, electrolyte composition and illumination. One of the popular models, Turner-Memming [1.17-1.18] is describe here.

The reactions involving the anodization of silicon in aqueous solutions, depends whether or not fluoride ions are present. In solutions of low HF concentrations the surface is considered to be terminated by hydroxyl groups and anodic reaction proceeds with the formation of Si(OH)4 and SiO2 (Eq. 1.6 & 1.7).

− Si + 4OH + λh− > Si(OH )4 + (4 − λ)e (1.6)

Si(OH )4 − > SiO2 + H 2O (1.7)

Where, λ is the number of holes involved in the reaction depending on the orientation of silicon. SiO2 is not soluble in water and therefore its formation in the

9 absence of HF in the solution leads to the passivation of the surface. In the presence of

HF the oxide dissolves to form fluoride complex (Eq. 1.8).

SiO2 + 6HF → H 2 SiF6 + 2H 2O (1.8)

The overall reaction valence is 4, which accounts for the reactions occurring in the

electropolishing region in HF solutions. To account for the effective dissolution valence

of 2 at potentials below the passivation potential, it was proposed that silicon reacts

directly with HF (Eq. 1.9).

− Si + 2F + λh → SiF2 + (2 − λ)e (1.9)

In this reaction scheme the surface is considered to be terminated by fluoride.

When an electric field is applied across the interface, holes move toward the surface. One

hole is trapped at the surface, weakening the Si-Si bond. A certain thermal activation is

required so that the SiF2 group swings away from the corresponding Si atom at which the

hole is trapped. This process is the rate-determining step and can work only if holes are

present and the hole has to be trapped for sufficiently long time. The product of this

reaction, silicon difluoride is not stable and tends to change into the stable tetravalent

form by further reacting with HF (Eq. 1.10).

SiF2 + 4HF → H 2 SiF6 + H 2 (1.10)

This reaction results in H2 evolution and is responsible for the effective

dissolution valence of 2. This model lacks the details to account for phenomena such as

surface termination by hydrogen, current multiplication and variation of effective

dissolution valence.

10 1.5 CPS at the University of Cincinnati

Alexander Hoelke [1.1] first implemented a rudimentatary etch rig setup at the

University of Cincinnati (UC). Later, Brent VanDyke [1.15] was instrumental in providing initial automation of the process. Previously, CPS etching process used a computer data acquisition card, which supplied the voltage to the etching rig. The current limitations (10 mA) of this card prevented etching at higher currents. This has significantly hampered the fabrication of CPS samples. This approach was not at all reproducible because approximately only 10 percent of the wafers etched had coherent pores. Efforts were consumed to externally power the etching rig with a power supply, to provide the desired current. This was a manual control approach. The operator would painstakingly maneuver the etching voltage to get the desired current throughout the etching process. The etch rates were significantly low and the whole process of etching could take more than 24 manual hours. To automate the application of voltage across the rig, a new Hewlett-Packard triple output power supply was integrated into the etching system. A new National Instrument’s GPIB (General Purpose Interface Bus) controller card was also interfaced to automate the power supply’s voltage output. This power supply has a current limit of 5 A for 6 V terminal and has a 1 A limit for +25 V and –25

V terminals [1.16].

The current density was calculated by the equation given by Lehmann [1.13] (Eq.

(1.11)).

−Ea 3/ 2 kT J ps = Cc e (1.11) where,

c- Concentration of HF in wt %

11 Ea- Activation Energy (324 meV)

T- Temperature in Kelvin

k- Boltzmann constant

C- Empirical constant (3300 Acm-2wt%-3/2)

Fill factor is defined as the ratio of the area of the pores to the total area of the wafer [1.1].

A F.F = p (1.12) At

where,

F.F.- Fill Factor

Ap- Area of the pores

At- Area of the total wafer

For a circular (square) pore, the ratio of Ap to At is the ratio of the square of the pore diameter (side) to the pore pitch (Eq. 1.13). Here the pores are assumed to be present all over the Si wafer.

2 ⎛ d ⎞ F.F. = ⎜ ⎟ (1.13) ⎝ p ⎠

where,

d- diameter of the pore (patterned)

p-pore pitch distance (patterned)

Current is calculated by the product of the area of the pores to the Jps.

I= JpsAp (1.14)

From Eqs. (1.12) and (1.14),

I=JpsAtF.F. (1.15)

12 A constant voltage of 2.5 V was applied across the rig. The current calculated by

Eq. (1.15) was then maintained by varying the lamp intensity. The etching procedure that was previously followed has many drawbacks. Lehmann’s critical current density at which coherent pores initiate is only depended on the concentration of the HF solution and the temperature of the solution. The wafer resistivity is not taken into account, which is a significant parameter. In his work he has attributed that the system is sensitive to the resistivity of the wafer and the pore pitch [1.13] but has never accounted that in his equation. Lehmann also pointed out that, as the etching process continues the concentration of HF reduces with time but he did not account for this change in his Jps equation.

The wafers were previously patterned with SiO2. The current calculated above is based on the assumption that current only flows through the pores and not through the pore walls of the wafer (HF has higher conductivity than Si). There will be leakage current, if the surface is not passivated properly. SiO2 is a good insulator and few angstroms of oxide grows at room temperature but it gets etched rapidly in HF and thus limits the use of oxide as a passivating layer. Silicon nitride (Si3N4) was suggested as an alternative. Si3N4 grown epitaxially with LPCVD (Low-pressure Chemical Vapor

Deposition) process worked better than sputtered silicon nitride w.r.t. etch rates in HF.

The LPCVD silicon nitride layer has finite etch rates in weak solutions of HF. Silicon nitride provided the passivation required for the etching process. The introduction of oxidizing agent (H2O2) into the electrolyte has significantly increased the etch rates.

13 1.6 CPS etch setup

The design of a CPS etching station is similar to that of electrochemical etch-stop

rigs. One major difference is that the wafer is uniformly illuminated from the backside.

This cell can also be used for electroplating. The Si wafer is anodically biased with

respect to the electrolyte. The holes created at the bottom of the wafer are attracted by the cathode and hence travel to the pore tips. At these pore tips; they are consumed in the oxidation reaction. The pore grows as HF etches off the oxide. The holes follow the electric field lines. HF being a better conductor than Si, the electric field lines concentrate more at the pore tips.

The horizontal position of the Si wafer in the etch rig has one advantage. The hydrogen bubbles that form due to surface reactions at the pore tips, can detach easily using gravity. The presence of hydrogen bubbles in the pores can impede the reactants reaching the pore tips and therefore can stop pores to grow any further. A surfactant

(Triton X) is used in the electrolyte to lower the surface tension to avoid hydrogen passivation. The etch rig was fabricated using Teflon. The O-rings (Viton in our case) for this experiment should be chemically inert against HF. Nylon screws are used to clamp the wafer to the rig.

An Oriel light source with tungsten-halogen lamp was used for illumination of the silicon wafer. National Instrument’s data acquisition card and General Purpose Interface

Bus (GPIB) card are used in conjunction with a computer to log data and control instruments. The data acquisition card controls and logs voltage applied to the etching cell, current in the cell, reference voltage at silicon interface, lamp intensity level, HF

14 levels, temperature of the electrolyte. The GPIB card controls lamp intensity level, HF level in the rig, voltage applied and the flow of the etchant into the rig.

The band gap of Si is 1.12 eV. This is the minimum energy that is required to create an electron-hole pair (EHP). The wavelength corresponds to the range of frequencies above near-IR. Mid-IR and far-IR do not have enough energy to create EHPs in Si (neglecting the recombination level created by the dopant). IR can heat up the wafer and thermal gradients can produce undesirable results. Hence, filters are employed to remove undesired IR.

The Oriel light source has a KG-5 filter. This filters IR out of the radiation reaching the wafer. The filter cracked due to excessive heating and thermal expansion. A water column filter replaced the KG-5 filter due to its low maintenance. This enormously reduced the heating of the substrate. The irradiation curves showed drastic decrease in IR radiation. The water filter in the present design acts as a high-pass filter. The maximum power the present Oriel lamp source can supply is 250 W. Experimental data indicated that the present system might be in a hole limiting process, when the etching was performed at higher temperatures of etchants [1.16]. A new Xenon lamp source was recommended, which can produce higher power and thereby larger light intensities in the

UV region.

In this etch setup, the optics is physically present under the etching rig. When the

Si etches through, the etchant might ruin the optics. Considerable care has been taken to

catch the leaking etchant. One of the designs evaluated is to have the wafer vertically

mounted and the optics on one side. This would ensure the leaking etchant won’t reach

the optics. One major disadvantage with such a system is that it prevents hydrogen

15 bubbles (a product from the reactions) from using gravity to escape. This would cause hydrogen passivation of pores and the pore ceases to grow.

1.6.1 Etch catcher modification

Recent necessity to etch CPS wicks all the way through to make CPS capillaries, produced some challenges in preserving the optics, when HF leaks. Since, the design of the etching station was such that the optics lie below the etching rig, it would be necessary to catch the etchant, ones it comes through.

A Lexan plate with an optical window was designed and fabricated to go under the etching rig [1.19]. The optical window was glued using an epoxy to a soda-lime glass to allow UV light to pass through, required for CPS etching process. A small outlet was provided for the etchant to drain off. Refer figure 2.5.

Fig. 1. 8: Lexan etch catcher [1.19].

This setup failed for several reasons. The epoxy was etched away by HF and the

etchant leaked into the optical system. The most important observation was that the

etchant vapor was attacking the mirrors rapidly. Since, HF eats glass, the soda lime glass

was hazy after couple of etch runs. The process of replacing the glass was a destructive

process. This etch catcher needed a lot of maintenance and was not fool proof.

16 A second approach was undertaken, were the whole of the etching rig was immersed in water, in a Pyrex glass beaker, with an optical window. An optically flat quartz disc was glued using silicone rubber sealant (HF resistant). This design needs constant water circulation, which would help in diluting the etchant coming out of the rig.

This would give the quartz window a higher lifetime, after which it has to be replaced.

The replacing of the quartz window is very simple. Silicone rubber melts at an elevated temperature and the quartz disc will come apart. After thorough cleaning another disc can be glued on. This etch catching design was found to be very convenient and effective

(Fig. 1.9). A more robust etch catcher was later designed replacing the Pyrex glass with polyethylene. It had the same inlet and outlet ports for water circulation. Instead of gluing the quartz window, a seal was established using an O-ring and a cap screwed to the bottom. Quartz was chosen as the optical window due to its excellent UV transmission properties.

7.0”

1.0”

1”

3.54”

3” 0.75” 0.5” a) b)

Fig. 1. 9: a) Glass etch catcher with circulating water. b) Schematic of etch catcher. Dimensions in cms.

17 1.6.2 Flow, level and temperature control

The concentration of HF can vary as the etching process proceeds. Both oxidation

and reduction reactions are taking place in the electrochemical cell. The formation of

oxide (SiO2) by the holes created by illumination and the subsequent reduction by HF

simultaneously takes place. Lehmann reported a decrease in HF concentration with

increasing etching [1.13]. He measured a parabolic decrease in the etch rate over time,

indicating the influence of diffusion limited regime of HF in the pore. Interestingly,

despite his findings, Lehmann never reported on correcting the etching current for the

decreasing solution concentration.

The diffusion-limited regime can be avoided if the etching process is quick

enough and if a reservoir of HF is maintained, with reservoir volume of 5 to 6 times the

volume of the etching rig, to replenish HF. The concentration of HF can be fairly kept

constant. Hence, the flow of fresh HF into the electrochemical cell becomes vital.

Pores compete with each other to attract holes created by illumination. In any

pore, if HF concentration becomes weak, then the rate of SiO2 dissolution becomes slow.

The growth of this pore will be slower than the other pores. Shorter pores have lower electric field concentrated at their tips, thereby attracting fewer holes. This would eventually passivate a pore from further growth. Subsequent etching and oxidation increases the relative pore length difference, favoring the longer pore. Please refer to Fig.

1.10. Uniform pore growth results in uniform electric flux lines for all the pores, giving equal probability of attracting more holes. Please refer to Fig. 1.11. It is extremely important to have uniform pore growth (or etch rate) for higher porosity CPS structures.

18 HF (Top Electrode)

Longest Pore

Electric field

Silicon (Bottom Electrode) Holes

Fig. 1. 10: Longer pores attract more holes due to higher electric field.

Si

Fig. 1. 11: Uniform pore growth leads to uniform electric flux lines. From Hoelke [1.1]

Contrastingly, Lehmann [1.13] speculated that the formation of CPS is a self-

adjusting process. If a pore grows longer, then the value of current density at the tip (Jtip) increases. This is due to the reduction in the distance between the HF (top electrode) and bottom electrode. This will attract more holes leading to more oxidation of the tip.

19 According to him, longer pores will be passivated until the trailing pores get etched equally long as the longer pore.

The figure below illustrates that pores of unequal lengths can be grown. Sufficient evidence was present to show that longer pores can dominate the etching process (Fig.

1.12).

Fig. 1. 12: Irregular length of pores.

Arrhenius Equation determines the relationship between the rate a reaction proceeds and its temperature. At higher temperatures, the probability that two molecules will collide is higher. This higher collision rate results in a higher kinetic energy, which has an effect on the activation energy of the reaction. The activation energy is the amount of energy required to ensure that a reaction happens.

The effect of temperature on reaction rates is given by the Arrhenius equation (Eq. 1.16):

−Ea k = Ae R*T (1.16)

where,

k - rate coefficient

A - constant

20 Ea - activation energy

R - universal gas constant (8.314 x 10-3 kJ mol-1K-1)

T - temperature (in degrees Kelvin)

Increasing the temperature of HF would result in faster etching rates. Previously, an average etch rate of about 0.15 µm/min was obtained with room temperature etchant.

These wafers were etched in 2.5 wt% HF with etch pits. Introduction of an oxidizer

(H2O2) in the electrolyte produced etch rates more than 1 µm/min for Si3N4 patterned wafers [1.16]. This was a considerable increase in etch rate. Cycling of heated HF produced very high etch rates (1.8 µm/min) and would also produce uniform pores

lengths.

HF level controlling is implemented to keep the top electrode always immersed in

HF, while HF is being circulated in and out of the etching rig. The other reason for

implementing this control is to make sure HF does not overflow from the top of the

etching rig. Digital logic combined with analog control was introduced to maintain the

level of HF. The issues of both safety of the operator and the operation of etching system

have to be addressed to implement such a system.

The etching rig is made of Teflon, a material that is a bad conductor of heat. HF is

a very corrosive liquid and hence any conventional method, such as resistive heating,

inductive heating will cause high investment costs and also will produce less efficient

heating methods. A cheaper and effective method was to use polyethylene reservoir to

store HF and to heat the bottle and HF using resistive heating belts. A variac was used as

a temperature controller. This heated HF is flowed into the etching rig. A peristaltic pump

was used to pump HF from the reservoir to the etching rig. The design suggested here

21 provides two flow paths for the HF. One path is to the etch rig and back to the reservoir, while the other is directly back to the reservoir from the peristaltic pump. Two level controllers (A and B) control the level of HF in the etching rig, by sending proper actuation signals to the electrically actuated pinch valves (C and D). The peristaltic pump setting controls flow into the etching rig. Peristaltic pump has a motor with three wings, which squeezes the tube to push the liquid ahead. Flow rates out of the pump are controlled by the speed of the motor (controlled by the setting) and the inner diameter of the tube. Flow-out is gravity fed to the reservoir. To have more control on flow-out, a manual operated graduated pinch valve is placed in the path of the flow-out. The design implements the HF level to fluctuate between level A and B. The top electrode, which is negatively biased, is below level A and B. Hence, it is always in contact with the electrolyte (HF). The bottom electrode in this case is the silicon wafer. It is very important to have a stable cell for photon-pumped etching. Hence the flow rates should be considerably low. Peristaltic pump (in our case) could only pinch 1 cm OD tubes.

Refer to appendix A for more on the design of the controllers. Figure 1.13 and 1.14 show the schematic and picture of the flow, temperature and level controlled CPS etch setup.

22

Fig. 1. 13: Schematic of a CPS etch setup with level, flow and temperature control.

Fig. 1. 14: Flow control system.

23 In order to implement temperature/flow/level control, new programs in LabVIEW had to be written. The features of this program are flow control, level control, temperature logging, I-V curve plotting, rough and fine control of current with the voltage, an option for current compensation, I-V curve data and etch data logging and etching at different lamp levels. A SEM image of the CPS etched using the above controls is shown in Fig. 1.15.

Fig. 1. 15: SEM image of a broken CPS sample etched with cycling of HF at 40oC. Pore diameter 5 µm, pore pitch 10 µm, length of pores 280 µm.

24 1.7 Microfabrication of CPS

An array of anisotropically etched “V-groves” can predetermine the pore

initiation. The electric field is concentrated initially at these groves and the pores begin etching at these tip locations. Anisotropic etching of photo lithographically defined windows results in inverted pyramids. The important parameters involved with photolithography are pore size (d), pore pitch (p) and the array type (orthogonal array or hexagonal array). Please refer to figure 1.16. Hexagonal array gives a higher packing fraction or fill factor (F.F.) for the same pore pitch and size.

p p

p p

Fig. 1. 16: Orthogonal array & Hexagonal array.

For a square patterned pore with side d, the fill factor can be calculated using Eqs.

(1.17) and (1.18), for orthogonal and hexagonal stacking, respectively. For a circular pore with diameter d, then Eqs. (1.19) and (1.20) are used to calculate the F.F. for orthogonal and hexagonal stacking, respectively. The pore initiation process is confined by the limits of the photolithography.

2 ⎛ d ⎞ F.F. = ⎜ ⎟ (1.17) ⎝ p ⎠

2 2 ⎛ d ⎞ F.F. = ⎜ ⎟ (1.18) 3 ⎝ p ⎠

25 2 Π ⎛ d ⎞ F.F. = ⎜ ⎟ (1.19) 4 ⎝ p ⎠

2 Π ⎛ d ⎞ F.F. = ⎜ ⎟ (1.20) 2 3 ⎝ p ⎠

Fabrication of CPS has three stages, namely pre-processing of CPS, CPS etching and post-processing of CPS. The steps involved in pre-processing of CPS are listed below.

1. Resistivity measurements on both front and backside of a silicon wafer are

performed with a four-point probe on (100) n-type Si wafer. Sufficient care has to

be taken to remove the native oxide, which can hamper the results of resistivity

measurements. A BOE dip is generally performed before the measurements

(Appendix B). Resistivity has a critical influence on the pore diameter. Hence,

sufficient care has to be taken for accurate measurements.

2. Wafer thickness measurements are performed using a micrometer.

3. RCA cleaning procedure is performed (Appendix B).

4. Thermal silicon dioxide around 1 µm is grown.

5. Silicon dioxide thickness measurements are performed using ellipsometer.

6. The silicon dioxide on the front side was protected using photoresist or wax.

7. The oxide on the backside was etched off either in BOE or diluted HF.

8. RCA clean is performed.

9. N+ diffusion is done using solid sources in a diffusion furnace. The N+ diffused

region acts as an ohmic contact and also makes the electric field more uniform.

The N/N+ on the backside junction builds built-in field which pushes the holes

26 towards the pore tips and reduces recombination at the semiconductor surface.

The silicon dioxide on the front side prevents any N+ diffusion on the front side

of the wafer.

10. The masking silicon dioxide on the front is etched off in diluted HF. RCA Clean

is performed.

11. Thermal silicon dioxide to protect the backside in the anisotropic KOH etching is

grown (around 0.5 µm).

12. Photolithography is performed to open up the windows for KOH etching. The

lithographic mask has square windows with side a and pitch p all over the wafer.

This would create CPS pores all over the wafer.

13. Silicon dioxide is etched off in the windows using BOE.

14. Anisotropic KOH etching is performed to open the initial etch pits.

15. Silicon dioxide is etched off in diluted HF. The wafer with N+ ohmic contact

region on the backside and anisotropically etched V grooves on the front side is

ready for CPS etching.

The operating manual of CPS etching is described in appendix C. After the CPS etching the wafer undergoes post-processing. The procedures for post-processing are application dependent. Micro needles application involves growing thin films in the pores and etching silicon selectively to form thin film needles. To make CPS wicking capillaries, lapping and polishing techniques are used.

1.8 Micropatterning of CPS

Selectively growing CPS structures on a wafer has several advantages. For

packaging purposes, it is extremely difficult to handle a CPS wafer with pores grown on

27 the whole wafer. The CPS wafers were extremely fragile and breakage was a common phenomenon while post processing of CPS or while packaging the same. The other issue with growing pores all over the wafer is hermetically sealing a device with CPS pores. A major problem encountered was bonding a CPS wafer to a top-cap of an evaporator package for Loop Heat Pipe (LHP) application [1.16]. The current required to etch a wafer with pores all over is substantially high and the control of the same was difficult. In the LHP, the application needed a CPS sample of 1cmx1cm. Substantial effort was placed to mask the wafer in the CPS etch setup to achieve CPS pores in 1 sq.cm area.

1.8.1 Two pieces rig

To achieve pores only at a selected region of the wafer, HF acid has to be masked

and also the UV light that is shining on the backside of the wafer has to be masked too. A

physical masking system was employed using machined Lexan plates, O rings and

machined bottom electrode. Windows in Lexan plates are provided such that HF only

etches the selected region of the wafer. Windows in bottom electrode allow UV light

incident on the same selected region of the wafer. O rings are provided to seal the etching

rig from leaking. The alignment of the HF mask and UV mask is critical. Alignment pegs

are placed to make sure the same region on the wafer selectively gets both HF and UV

light. The wafer in this case has anisotropically etched pits all over the wafer. Physical

masking determined the growth of CPS pores.

28

Fig. 1. 17: Lexan plate micromachined with 2 holes with O rings to selectively mask HF, CPS wick etched with such a system and bottom electrode with holes to selectively pass UV light.

1.8.2 Four pieces rig

The disadvantage of using two pieces rig was that the wafer has to be broken into two halves and each individual half has to be etched separately. Any design changes involves machining the Lexan masking plate and the bottom electrode all over again. The

LHP project needed 1sq. cm square CPS pores. In two pieces rig, circular holes were machined due to the fact that machining square holes in Lexan was difficult.

A second approach was undertaken, where four 1 sq. cm CPS samples can be etched on silicon wafer in one etch run. Masking of HF with Lexan was eliminated in this approach. A bottom electrode plate with four machined square holes was drilled for selectivity of UV light. The masking of HF was undertaken using silicon nitride (Si3N4) thin film deposited using Low Pressure Chemical Vapor Deposition (LPCVD) furnace.

This film has very high electrical resistance and also has a very low etch rate in 5 wt%

HF solutions (around 1.5 nm/min). A new photolithography mask was made, such that it has pore initiation pattern in only four individual square cm areas (Fig. 1.18). The pre- processing steps from 1 to 10 previous described remain the same. The following steps are described below for incorporating Si3N4 as a HF masking layer. The alignment of the

29 windows lithographically etched to the square holes machined on the bottom electrode is a critical issue. The pin-holes in LPCVD Si3N4 thin film can cause current to leak through them.

1-10) Follow steps 1-10 of two-pieces rig pre-processing

11) LPCVD Si3N4 to protect the backside in the anisotropic KOH etching is deposited

(around 0.5 µm, gives HF passivation for 333 minutes).

12) Photolithography is performed to open up the windows for KOH etching. The

lithographic mask has square windows with side a and pitch p all over the wafer. This

would create CPS pores in only four pre-selected regions.

13) Silicon nitride is etched off in the windows using Reactive Ion Etching RIE.

14) Anisotropic KOH etching is performed to open the initial etch pits.

15) Silicon nitride on the back side is etched off using RIE. The wafer with N+ ohmic

contact region on the backside and anisotropically etched V grooves on the front side,

Si3N4 as a HF mask is ready for CPS etching.

Fig. 1. 18: Silicon wafer with Si3N4. Four square windows of pores initiation etch pits are made.

30 1.8.3 Micropatterning of HF and UV masks

The disadvantages of using four pieces rig is that it can be used to selectively etch

CPS pores in micrometer range. Machining the bottom electrode was feasible, as long the

windows are in the centimeter range. As these dimensions shrink to the micrometer

range, machining and alignment cause serious errors in growing CPS. Similar to Si3N4

as a mask for HF on the front side, a thin film UV mask was investigated. The first

material that was investigated was Aluminum. Aluminum is easy to evaporate, etch and

photolithographically micromachine. A thin 500 nm aluminum thin film was sufficient to

block UV light reaching the backside of the wafer. A separate mask with alignment

features was made to create windows in the aluminum, to allow UV light to penetrate at selected regions. The only problem found with Aluminum as UV blocking film was that it etches in HF acid. Any HF that leaks from the etch rig can potentially etch the aluminum film. After encountering such problems, a switch was made to evaporating

gold films. A thin 50 nm chromium film was used as an adhesion layer and 200 nm of

gold film was used as a UV masking layer (Fig. 1.19). The gold films were resistant to

HF even after small leaks were detected after the wafer got etched through. Chromium

gets etched in HF, so any substantial leaks will undercut gold by etching chromium.

Efforts to evaporate gold films without the chromium adhesion layer failed.

31

Fig. 1. 19: Gold films evaporated for UV light masking. Windows were opened in them to allow UV at selected regions.

The process steps for Si3N4 as a HF resistant film and Au as a UV masking film are listed below

1-20) Follow steps 1-20 of four-pieces rig pre-processing

21) Liftoff photolithography on the backside is performed using alignment marks on the mask and the front side of the wafer (Infra-Red aligning)

22) Evaporate 50 nm Cr and 200 nm Au.

23) Liftoff metal using Acetone. Perform solvent clean. The wafer is ready to be etched in CPS etching station.

1.9 Materials investigated for HF passivation

The ideal thin film for HF passivation would have infinite chemical etch

resistance in HF. The other properties are good electrical insulator, easy to deposit, stress- free, pin-hole free and low cost. Several materials were investigated including silicon nitride, gold, poly-Si, SU-8 and diamond films.

32 1.9.1 Silicon nitride Silicon Nitride is a commonly used film in MEMS processing for the passivation

during chemical etching. This film is grown in a LPCVD (Low Pressure Chemical Vapor

Deposition) horizontal reactor. The film is deposited at a temperature of 770oC and a chamber pressure of 300mtorr monitored by a Baratron valve. The two precursor gases

NH3 (ammonia) and SiCl2H2 DCS (dichloro silane) are flowed at a 4 : 1 ratio which is monitored with mass flow controllers. This classic recipe results in a stoichiometric film

(i.e. Si3N4) that is under a tensile stress on the order of 1GPa, which is of course also dependant on film thickness. The maximum thickness that can be grown without the structure actually causing massive slip in the silicon crystal was found to be slightly below 0.5µm for a 300µm thick Si wafer. The film itself is more dense than silicon dioxide as the Si-N bond posses a higher bond energy than the Si-O bond. This film has been found to have a etch rate in 5wt% HF of approximately 15-20A/min which is quite a bit of a reduction compared to silicon dioxide around 1000A/min.

The common problems encountered with stoichiometric silicon nitride film were high stress, large amount of pin holes present. The high stress at the boundaries of the features are causing rapid etching in CPS etch setup. The stress field, which concentrates at the boundaries, is relaxing by rapid etching (Fig. 1.20). The pin holes in the film are leaking current into the substrate and the equilibrium of the etch setup is disturbed. The formation of meso pores was also observed at these pin holes, which later undercuts the silicon nitride film to lift it off completely from the surface (Fig. 1.21).

33 (a.) (b.)

Fig. 1. 20: Stress field developing around the boundaries of the patterned CPS wick causing accelerated etching. a) schematic b) SEM image of a CPS wick having accerelated etching at the boundary. From [1.20].

Fig. 1. 21: Meso pores formed at pin holes of silicon nitride causing the film to delaminate.

1.9.2 Low stress silicon nitride film It was concluded that a low stress nitride film would be able to reduce the defects that were occurring. The film characteristics necessary during electrochemical etching were more clearly defined. The film needed to be clear of pinholes, have a low residual stress, be electrically insulating, and have a lower etch rate than stoichiometric silicon nitride. The low stress SixNy recipe was to increase the temperature of the LPCVD

o furnace to 835 C and switch the ratios of the mass flow rates of NH3 to SiH2Cl2 to 1: 3.

Figure 1.22 shows a picture of CPS wick etched with low-stress silicon nitride. The boundaries are clearly visible, the finite amount of stress present in the film caused some

34 etching around the boundaries. A cross section of a CPS sample etched using low stress silicon nitride can be seen in Fig. 1.23. <110>

<100>

(a.) 20um

(c.)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 1516 17 18 19 20

(b.)

Fig. 1. 22: CPS patterned wafer with low stress silicon nitride as a masking film. Over-etching near the boundary can be observed. A drastic reduction of boundary etching can be seen due to low stress in the film.

35 (b.)

(a.)

Fig. 1. 23: a) Cross section of a CPS sample etched using low stress silicon nitride. b) zoomed in image showing the tapering of pores along the width.

1.9.3 Polysilicon The properties of polysilicon make it an interesting choice for a passivation film during CPS etching. The film is relatively easy to deposit by LPCVD, since only one

precursor, Silane, is needed. The residual stress in polysilicon can be engineered to be

very low. Also the CTE of polysilicon is very close to that of silicon. Polysilicon also

does not etch in HF solution at all. Despite the multiple advantageous, the patterning of

polysilicon and etch pit initiation is different than silicon nitride.

A poly silicon film deposition by LPCVD is straight forward. If an amorphous

film is required then the deposition temperature should not exceed 590C. In the current

work a film of 0.20-0.25µm was deposited on the silicon wafers. Once deposition occurs the film is annealed at 1000oC for 15-30minutes to remove any residual stress in the film.

The ability to post-anneal after initial deposition and remove residual stress makes this film particularly attractive.

36 Polysilicon films are commonly used a sacrificial layers in the fabrication of

MEMS devices. This is mainly because polysilicon etches quite rapidly in alkali etchants such as KOH and TMAH. Due to the susceptibility of polysilicon, etch pit initiation cannot be performed with alkali etchants. This makes it necessary to find an alternative method to etch initiation pits in the silicon while still preserving the polysilicon layer.

Traditionally when wafers are processed for CPS etching the wafers are patterned by spinning on photo resist (S1818) and exposing the resist though a Cr Mask. The nitride film is then etched away in a RIE. The wafer is then placed in KOH to etch pyramidal etch pits into the silicon as shown in Fig. 1.24. With polysilicon, a 150A thick aluminum film was deposited by E-Beam evaporation and then the photo resist is spun on the substrate. The aluminum film allows for longer etches in the SF6 plasma. The patterning of metal films down to 5µm squares was found to be nontrivial issue, but luckily it was found that the 150A thick aluminum actually etches in the photo resist developer. The developer is actually a dilute HCl solution. Initially gold was attempted as the plasma mask but it was found etching 5µm arrays was limited by diffusion of the etchant in and out of the features. Once the pattern was established in the photo resist and aluminum the sample was etched in SF6 plasma for 20-30 minutes. The profile of the “etch pit” is significantly different than what is achieved by anisotropic etching. When formed in the plasma the etch pit more isotropic than the ones made in KOH. When the etch pit is examined closely it is found to be jagged at the base as shown in Fig. 1.24. The fluorine radicals and physical ablation of the surface cause the resulting rough surface.

37

Fig. 1. 24: Cartoon compares the etch pit initiation technique depending on weather SiN or PolySi is used as the passivation film.

The microstructures that resulted after the CPS etching is shown in Fig. 1.25 &

Fig. 1.26. The pores which resulted are submicron in size and growing in multiple directions. The finding is a direct result of each valley in the etch pit acting to initiate a pore.

Fig. 1. 25: A reticulated microstructure which resulted when the etch pit initiation was done with plasma etching.

38

Fig. 1. 26: A CPS sample which after lapping shows a micro array of pores separated by bonding pads.

1.9.4 Low stress Si3N4 + gold Si3N4 has finite etch rate in HF acid. Growing thick films of low stress LPCVD silicon nitride was found to build significant stresses around the boundaries of the pores.

A new method to use Si3N4 as an electrical insulator and gold as a chemical passivation layer was adopted. Gold was deposited on top a thin low stress silicon nitride film. The combination would both chemically and electrically insulate the wafer. Many problems were encountered using this approach. It was very difficult to micromachine gold windows of 5 µm. The problem was the gold etchant (KI+I2+H2O) was having difficulty in diffusing into the film to etch. After marginal success to etch gold, etching the adhesion layer (Cr) was not achieved. Ultrasonic agitation was employed with little success. A new mask was designed such that gold is protecting the field of Si3N4 where

39 no pores are growing. This would eliminate the problems of doing lithography of gold at the pore level and also of the pin holes in LPCVD Si3N4 causing meso pores in the fields. The problem with such a setup showed up late in the CPS etching process. The adhesion layer Cr got etched and lifted off gold. This exposed the Si3N4 and subsequently HF etched it. An alternative to this was implemented with no Cr adhesion layer with limited success as gold was lifting off in anisotropic etchant, while forming etch pits.

1.9.5 SU-8

Commonly SU-8 is used as negative photoresist in lithographic processes. Hydro

fluoric acids do not etch polymers. An experiment was conducted to spin SU-8 and

photolithographically etch pores in this polymer. The wafer was then etched in CPS etch

setup. One observation was that SU-8 absorbs moisture from aqueous based HF

electrolyte and its adhesion to the silicon substrate fails. To use SU-8 as a masking layer,

aqueous free electrolytes have to be used.

1.9.6 Microwave plasma enhanced CVD (MW-PECVD) diamond

A MW-PECVD diamond film was grown using an output frequency of 2.45 GHz

and a microwave plasma power of 1 kW. The gas ratio of methane to hydrogen was

100:1 and the total gas pressure was 30 torr. The deposition rate was around 1 µm/h. A film of 0.1 µm was deposited. An annealing step was performed in an oxygen free environment at 800oC to remove residual stress. Sufficient care has to be taken to make sure no oxygen is present as it reacts with diamond film to form carbon dioxide. A thin aluminum film of 15 nm was deposited on top the diamond film. A photo lithography to

40 form etch pits was performed. The developer, which contains HCl, etched windows in Al in the development stage. The diamond films were etched in RIE using oxygen plasma.

Etch pits were initiated using anisotropic etchant (KOH). Diamond films have almost zero etch rate in HF and are very good electrical insulators. The CPS etching process was stable using diamond as the passivation layer. Due to limited availability and access to diamond films, an alternative approach was necessary to grow CPS pores.

1.9.7 Low-stress Si3N4 + highly p-type doped polysilicon

The most successful approach of growing ultra low stress passivation film was

achieved using the combination of thin film of low stress Si3N4 and highly doped

polysilicon. The previous approach of using polysilicon failed due to the fact that

inverted pyramidal structures were not possible. Anisotropic etchants etch polysilicon as

well as silicon. Here, the property of anisotropic etchants slow etching of very highly p-

type doped silicon is utilized. If silicon is doped above 5x1019 /cm3 with p-type dopants the etch rate of anisotropic etchants falls by two orders of magnitude. This would enable silicon to etch, while doped polysilicon is passivated. Since, highly doped polysilicon is an electrical conductor, an insulating layer was required underneath for electrical passivation. A thin layer of low stress silicon nitride would provide the required electrical passivation. Since, HF does not etch polysilicon, the Si3N4 underneath is protected in

CPS etching. Refer to Fig. 1.27 for an SEM of a CPS structure etched with the above

passivation scheme.

41

Fig. 1. 27: CPS pores with almost defect free boundaries. Little skewing of pores can be attributed to finite amount of stress present in low stress silicon nitride.

1.10 References [1.1] A. Holke, “Development of silicon chemical wet etching toward the realization of an integrated thermal-electronic package”, Ph.D. Dissertation, University Of Cincinnati, 1998. [1.2] V. Lehmann, “The physics of macropore formation in low doped n-type silicon”, Journal of the Electrochemical Society, vol.140, no.10 Oct. 1993, p 2836-43. [1.3] V. Lehmann, “The physics of macroporous silicon formation”, Thin Solid Films, vol.255, no.1-2 15 Jan. 1995, p 1-4. [1.4] V. Lehmann, U. Gruening, “The limits of macropore array fabrication”, Thin Solid Films, vol.297, no.1-2 1 April 1997, p 13-17. [1.5] V. Lehmann, S. Ronnebeck, “The physics of macropore formation in low-doped p- type silicon”, Journal of the Electrochemical Society, vol.146, no.8 Aug. 1999, p 2968- 75. [1.6] V. Lehmann, H. Foll, “Formation mechanism and properties of electrochemically etched trenches in n-type silicon”, Journal of the Electrochemical Society, vol.137, no.2 Feb. 1990, p 653-9. [1.7] U. Goesele, V. Lehmann, “Light-emitting porous silicon”, Materials Chemistry and Physics, vol.40, no.4 May 1995, p 253-9. [1.8] E.K. Propst, P.A. Kohl, “The electrochemical oxidation of silicon and formation of porous silicon in acetonitrile”, Journal of the Electrochemical Society, vol.141, no.4 April 1994, p 1006-13.

42 [1.9] A. Uhlir, Jr., “Electrolytic Shaping of Germanium and Silicon”, Bell System Tech. J., vol. 35, 1956, p 333-347. Reprinted as Bell System Monograph 2611. [1.10] L.T. Canham, “Silicon quantum wire array fabrication by electrochemical and chemical dissolution of wafers”, Applied Physics Letters, vol.57, no.10 3 Sept. 1990, p 1046-50. [1.11] V. Lehmann, W. Honlein, H. Reisinger, A. Spitzer, H. Wendt, J. Willer, “A new capacitor technology based on porous silicon”, Solid State Technology, vol.38, no.11 Nov. 1995, p 99-100, 102. [1.12] V. Lehmann, U. Gruning, A. Birner, “Photonic crystals based on macroporous silicon”, Epitaxy and Applications of Si-Based Heterostructures. Symposium, San Francisco, CA, USA. 13-17 April 1998. [1.13] V. Lehmann, “The physics of macropore formation in low doped n-type silicon”, Journal of Electrochemical Society, Vol. 140, No. 10, October 1993, pp. 2836-43. [1.14] H.T. Henderson, Private Communications, 2002. [1.15] B. VanDyke, “Development of Coherent Porous Silicon for use in biological and optical applications”, M. S. Thesis, University of Cincinnati, 2000. [1.16] S. Parimi, “Parametric Exploration of Automated Fabrication and Anodic Bonding of CPS for LHP Applications” M.S. Thesis, University of Cincinnati, Cincinnati OH, 2002. [1.17] D.R. Turner, “Electropolishing silicon in hydrofluoric acid solutions”, Journal of the Electrochemical Society, vol. 105 (7), 1958, p 402-408. [1.18] R. Memming G. Schwandt, “Anodic dissolution of silicon in hydrofluoric acid solutions”, Surface Science, vol. 4 (2), 1966, p 109. [1.19] A. Shuja, “Development of a micro loop heat pipe, a novel mems system based on the cps technology” M.S. Thesis, University of Cincinnati, Cincinnati, 2003. [1.20] P. Medis, S. Parimi, A.Shuja, J. Suh, P. Ponugoti, K. Ogirala, “Proof of Concept LHP”, Final Report 2005, NASA Contract # NNC04CB44C, University of Cincinnati.

43 Chapter 2 Introduction to Loop Heat Pipes (LHP)

2.1 Background

According to Gordon E. Moore, cofounder of Intel Corporation, every two years

the number of transistors on a chip doubles. This poses many challenging issues, not only

in miniaturization of the transistor dimensions but also in cooling the chips due to the

excess heat produced. The semiconductor industry has long ago moved from BJTs

(Bipolar Junction Transistors) to CMOS (Complementary Metal Oxide Semiconductors)

for making commercial chips. The introduction of CMOS has realized less heat

producing transistors when compared to BJTs. Lately, due to densification of the CMOS

transistors on a chip, the excess waste heat loads are back to where they were when BJTs

were replaced in the early 1990s (refer Fig. 2.1).

An electrical conductor (electrical resistivity ρ) with a cross-sectional area (A)

and carrying a current (I) for a distance (L) will dissipate power (P) in the form of heat.

This power can be calculated by Eq. (2.1).

I 2 ρL P = (2.1) A

Many semiconductor manufacturers specify the maximum heat load and heat flux of a device for thermal management issues. Heat flux (q”) is calculated by dividing the heat load (Q) by the cross sectional area of the chip (Achip) as seen in Eq. (2.2).

Q q"= (2.2) Achip

44

Fig. 2. 1: Heat flux for various computer processors with time from [2.1].

Semiconductor industries are facing a growing challenge to cool their increasingly

powerful chips. Intel has cancelled its 4 GHz Pentium 4 processor and Apple Computers

have now very expensive liquid cooling systems in their new G5 desktop computers.

2.2 Electronic device package with cooling system

Integrated circuits are fabricated using planar microfabrication technologies. The

microelectronic devices have planar surfaces for cooling. Aluminum or copper plates are

commonly mounted as heat spreaders on the top of the processor. Any cooling device

that interfaces with the chip has to make a very good thermal contact for maximum waste heat removal efficiency. Thermal resistance is a measure of how well the cooling system

45 is able to transfer waste heat away from the chip. Its units are m2 oC/W. The lower the

thermal resistance, the better the efficiency of waste heat removal of a cooling device.

A typical microelectronic chip and cooling system package has several thermal

resistances either in series or parallel. Equations (2.3) and (2.4) are used to calculate the

total thermal resistance in series and parallel, respectively.

Rtotal−series = R1 + R2 + ... + Rn (2.3)

1 1 1 1 = + + ... + (2.4) Rtotal− parallel R1 R2 Rn

2.2.1 Thermal interface materials

A thermal interface material is used between an electronic chip and a cooling

device to increase the thermal contact by reducing the thermal contact resistance. If this resistance is high, it can create large temperature difference across the interface material.

One other potential problem with these materials is a lack of uniformity. If the material is

not making contact uniformly with the chip and the cooling device, then hot spots on the

device can cause failure. Figure 2.2 illustrates different types of materials used as thermal

interfaces and their typical thermal resistances. Figure 2.3 shows a schematic of a typical

package of electronic chip and cooling device.

46

Fig. 2. 2: Thermal interface materials and their typical thermal resistances. From [2.1]

Fig. 2. 3: Heat sink, thermal interface material and microelectronic chip package.

2.3 Trends in microelectronic cooling technologies

2.3.1 Heat sinks

In many applications, natural convection or forced convection is the preferred method of cooling electronic chips. Surrounding air is used as a cooling agent due to its

47 abundance and it offers low-cost maintenance systems. Natural convection is calculated

by the Eq. (2.5) given below, expressed as Newton’s law of cooling.

Q = hA(Ts − T∞ ) (2.5)

where,

Q = heat transferred from surface to the surrounding fluid (W)

A = area of the surface (m2)

Ts = temperature of the surface (K)

T∞ = temperature of the surrounding fluid (K)

h = convective heat transfer coefficient (W/m2K)

The value of h is a complicated function of geometry, fluid flow and the fluid

properties. Microelectronics have small surface areas and require high loads of heat to be

removed. One way of maintaining low chip temperatures by removing high amounts of

heat, is by flowing the surrounding fluid at a very fast velocity and/or making the

temperature of the fluid as low as possible. This method of cooling is expensive and is a

high maintenance procedure.

A simpler way of taking large heat loads off a chip is by increasing the surface of

the chip. This is the concept used by the heat sink companies to design their products.

Heat sinks have several advantages, they are passive (require no external power) and

more surface area can be easily incorporated using the third dimension (height). Please

refer to Fig. 2.3.

Heat sinks are used to cool micro-processors and many electronic chips in both

natural and forced convective systems. Fans are typically used to circulate air in and out

48 of a heat sink. A typical micro-processor and cooling system assembly has a heat sink and a fan attached to it as shown in Fig. 2.4.

Fig. 2. 4: A fan and a heat sink assembly on top a micro-processor.

Heat sink and fan assemblies are large and are not at all useful when the trend of microelectronic industry is moving towards thinner and smaller gadgets. Laptops cannot accommodate these components, although in desktops heat sink- fan assemblies are still widely used. One other disadvantage of this type of cooling is the convective heat transfer coefficient one can achieve with air at room temperature as the cooling fluid. The average convective heat transfer coefficient of forced air convection is typically in the range of 10-200 W/m2K. The demand for cooling more heat is evident from the shrinking of the electronics and increased heat load. Air has low density, low thermal conductivity and low specific heat resulting in low heat load carrying capacity.

2.3.2 Liquid cooling

International Business Machines (IBM) introduced its first water cooled electronic product in 1964. For the next 30 years, water cooling was the mainstay for

49 mainframe computers. In the mid nineties a shift from BJT to CMOS devices produced power dissipation levels which were an order of magnitude less. This made air cooling possible for electronic thermal management. Due to high density of transistors packed into the chips these days, the power dissipation levels are back to the levels of the mid nineties. Air cooled systems are unable to adapt themselves to suit the requirement for ever increasing demand to cool. In 2005, IBM announced that it is introducing water cooled heat exchangers to cool their server racks [2.2].

In a liquid cooled system, an external pump is used to circulate chilled liquid to and from the electronic component. A filtration system can be used to keep the quality of the liquid high for longer life. The dimensions of the tubes carrying the liquid and their insulation levels are application-specific and also depend on the pump capacity, liquid initial temperature, velocity etc. This type of liquid cooling is an open ended system, where fresh water from the feed is used.

A second type of liquid cooling device is close ended systems or simply closed systems. Here, the loop in which the liquid is circulating is closed. This helps to make compact cooling devices; with very low maintenance (contamination is almost eliminated). Liquid cooling devices are penetrating into markets but are yet not used in mainstream electronic cooling. Apple introduced its new G5 desktop with two 2.5 GHz

G5 processors, with a liquid cooling system (Fig. 2.5). These cooling systems are also sold as components, which can be attached to devices in a desktop (Fig. 2.6).

50

Fig. 2. 5: Schematic of Apple G5 desktop liquid cooling system. 1. G5 processor at point of contact to the heatsink. 2.G5 processor card from IBM 3. Heatsink (also referred to as a 'waterblock') 4. Cooling fluid output from the radiator to the pump 5. Liquid cooling system pump 6. Pump power cable (usually connected to the main logic board, but repositioned in the above diagram) 7. Cooling fluid radiator input from the G5 processor 8. Radiant grille 9. Airflow direction. From [2.3].

Fig. 2. 6: A CPU liquid cooler with a pump and an external fan. From [2.4].

51 2.3.3 Two phase cooling

George Grover of the Los Alamos Research Laboratory, the inventor of heat pipes made the following entry into his notebook on July 24, 1963 and thus began the research on heat pipes. Later that year he published his results using water and sodium as his working fluid [2.5]. The first patent on heat pipes was however issued in 1945 to Gaugler

[2.6].

“Heat transfer via capillary movement of fluids. The "pumping" action of surface tension forces may be sufficient to move liquids from a cold temperature zone to a high temperature zone (with subsequent return in vapor form using as the driving force, the difference in vapor pressure at the two temperatures) to be of interest in transferring heat from the hot to the cold zone. Such a closed system, requiring no external pumps, may be of particular interest in space reactors in moving heat from the reactor core to a radiating system. In the absence of gravity, the forces must only be such as to overcome the capillary and the drag of the returning vapor through its channels.” [2.7]

Heat pipes have thermal conductivity characteristics exceeding any metal available due to isothermal boiling and condensing cycle. Conductivity is calculated by dividing input heat flux by temperature difference between the heat input end and the heat exit end. As the temperature of evaporation and condensation are almost the same in a heat pipe, the temperature difference tends towards zero, resulting in very high thermal conductivity values. They also have very low pressure drops between the evaporator and the condenser. Absence of moving parts makes them reliable and gives them long life. A heat pipe typically is a cylindrical tube with a uniform mesh (wick) placed inside it. The heat supplied at the evaporator end evaporates the working fluid and the vapor travels to

52 the condenser. This vapor loses its latent heat and changes its phase to liquid form.

Capillary forces in the wicking material return this liquid back to the evaporator for further evaporation (Fig. 2.7 & Fig. 2.8). Cylindrical holes are drilled in metal blocks containing the microelectronics and these heat pipes are placed inside these holes.

Fig. 2. 7: Cutaway section of a heat pipe showing the evaporator and condenser section. From [2.7].

Fig. 2. 8: Schematic of the working of a heat pipe. The wicking material using capillary pressures to pump liquid from the condenser to the evaporator.

53 Many variations of heat pipes have been researched and resulted in different configurations, namely Loop Heat Pipes (LHP), Capillary Pumped Loops (CPL). The main difference between a heat pipe from LHP or CPL is that the vapor phases are separated with sharp interfaces between them. A separate vapor and liquid lines are incorporated in LHPs and CPLs. This type of configuration has several advantages over a heat pipe. Many startup problems associated with heat pipes are eliminated, as the phases are separated. The design flexibility and reliability are higher in a LHP or CPL. The difference between a LHP and CPL is that the liquid reservoir of a CPL is placed externally, while in a LHP it is attached to the evaporator section. Having an external reservoir in a CPL helps to miniaturize the evaporator section that cools the microelectronic chips. Compared to CPLs, LHPs have simpler operation and therefore are more popular with systems which can afford some reservoir space in the evaporator section. The work presented in this dissertation concentrates on LHPs and its design, fabrication and testing.

Vapor Line Reservoir Vapor Line Condenser Condenser Evaporator Pump Evaporator Pump Liquid Line Liquid Line

Reservoir Line Reservoir Fig. 2. 9: Left: CPL with an external liquid reservoir. Right: LHP with liquid reservoir with the evaporator section [from 2.8].

54 2.4 Micro loop heat pipes using coherent porous silicon (CPS) as a primary wick

The pioneering work of micro LHPs using CPS as a primary wick was done in this lab. This section provides sufficient detail for a reader to explain the basic concept of a planar CPS (coherent porous silicon)-LHP (loop heat pipe). Enhancing electronic cooling systems for computer processors aboard space shuttles, satellites, space solar power stations, and even portable computers is a very important industry need. Different methods have been utilized to provide better cooling techniques. One of the recent approaches involves cooling by integrating loop heat pipe into the same package as the electronic components. The LHP utilizes the interfacial force to direct the flow and the thermodynamic force to pump the liquid from the evaporator to the condenser. NASA is interested in such devices where no pump is needed and the system is self-circulating, i.e. the system uses passive forces to circulate the flow. Having no pump in space application will reduce the launching cost and the maintenance cost. Scientists try to utilize the passive forces in the liquid such as thermodynamic effect, capillary effect, osmotic effect, viscosity effect, and expansion effect to create such self-circulating system.

The working fluid circulates through the LHP from the evaporator to the condenser due to the thermodynamic saturated pressure difference, which is developed due to the saturated temperature difference between the evaporator, and the condenser.

The interfacial forces inside the wick of an evaporator directs the developed vapor to flow from the condenser to the evaporator while the liquid is supplied back by small thermodynamic forces between the condenser and the compensation chamber. The wick of the evaporator can support such pressure difference due to the capillary pressure gradient that developed inside the evaporator. In this study a Coherent Porous Silicon

55 (CPS) wick is used, which provides different advantages over the commercial cylindrical evaporator; such as flat evaporator shape, variety of pore design shapes, and compact size evaporator. Also, since this CPS wick is etched in silicon, one can build an integrated cooling system within electronic panel or device. The optimum choice of the wick was introduced by Hamdan et al. [2.9].

Investigating the LHP performance includes many different parameters such as working fluid, optimum wick pore size, working temperature and pressure, evaporator wick properties and design. Chandratilleke et al. [2.10] investigated four different working fluids trying to develop a loop heat pipe that can work in a cryogenic temperature range of 4 to 77 K. They also showed that the loop heat pipe was able to transport at least 10 times the amount of heat as compared to a solid copper rod of the same size. A diameter optimization was presented by Hölke et al. [2.11] for a micro coherent porous silicon wick using water as the working fluid. They showed that an effective way to increase the loop heat pipe’s performance is by reducing the pressure drop in the evaporator.

The first patent related to a LHP was issued in the United State of America to

Maidanik et al. in 1985 [2.12]. It is observed that very few theoretical and experimental

LHP models are available in the literature. This is due to the complexity of phase change, the different phenomena related to LHP and the limited amount of data that has been published. Phase change occurs by different mechanisms depending upon many factors such as the temperature difference between the fluid and the hot surface, surface structure, gravity, and fluid pressure. These factors are discussed in different places in the literature [2.13] and will not be covered here. Many different phenomena related to the

56 LHP which have appeared in the experiments, still need more study and analysis. These phenomena are bubble formation in the compensation chamber, interface oscillation, and wick dry out.

It is important for LHP designer to know the difference between the capillary pumped loop (CPL) and the LHP. The differences between these two systems are discussed by Nikitkin and Cullimore [2.14]. The major design difference is the position of the compensation chamber. In a LHP, the compensation chamber is directly attached to the evaporator while in a CPL the compensation chamber is connected to the evaporator through a piping system. This design difference results in a LHP being more robust and simpler to start. The transient behavior of the CPL has been discussed by investigators such as LaClair and Mudawar [2.15]. A model of the steady state behavior of the LHP can be found in Kaya [2.16]. He presents a mathematical steady state model for LHP, and including an experimental validation.

Most of the previous studies investigate the cylindrical evaporator geometry while this work presents a flat evaporator. A flat evaporator is more convenient in electronic cooling than cylinder evaporators that are studied more frequently. A comprehensive model for the CPS wick is presented by the work done by Hamdan et al. [2.9]. Hamden proposed a steady state model for a LHP with flat evaporator design. A piecewise model is used to describe the whole loop including the five major elements in the LHP, which are wicked evaporator, compensation chamber, condenser, vapor line, and liquid line.

A simple heat pipe is a sealed device in which a working fluid circulates and constantly changes from liquid to gaseous phase and vice versa. The evaporated liquid flows from the evaporator to the condenser by the pressure drop created from the

57 evaporation and condensation process. In an ordinary heat pipe, such as in a large fiber heat pipe and as in earlier integrated heat pipes made at the University of Cincinnati, both phases exist in the same tube (Refer Fig. 2.7). Figure 2.10 shows typical cylindrical LHP evaporator package.

Compensation Primary wick Secondary wick chamber Evaporator Bayonet tube

Vapor Liquid line line Cavity Vapor grooves

Condenser

Fig. 2. 10: Representation of a cylindrical LHP. From [2.8]

The liquid is returned to the evaporator by the capillary pressure in the wick

(fabricated by CPS technology, developed at the University of Cincinnati, following the pioneering work in Germany by Lehmann [2.17-2.19]). The input heat energy is thus converted into the latent heat of phase transformation in the evaporator, moved in the gaseous phase to the condenser, and then converted back into heat energy by the condensation process as the vapor again becomes liquid and the liquid is again drawn back into the hydrophilic wick due to the capillary forces. The evaporation and the condensation process takes place at almost the same temperature. The limitation of this process is that the liquid must flow through the wick along the whole length of its path.

58 Thus the capillary pressure of the wick must overcome the loop pressure drop, including the internal pressure drop due to the flow in the wick. All earlier (non-micromachined)

LHPs previously developed have separate parts crudely made from a variety of materials for the evaporator, condenser, liquid and vapor lines. The problems of the conventional loop heat pipes, which often need a separate priming source, is eliminated by the porous silicon wick which has been locally pioneered for a variety of purposes. The porous wick is an array of incredibly small (micron-range) silicon dioxide capillaries micromachined through ordinary (100) electronic grade silicon wafers. A novel silicon micromachining process is used to fabricate these wicks, where the silicon dioxide pores, which are hydrophilic, keep the wick always wet. The working fluid (water in our case) is circulated from the condenser to the evaporator using separate liquid lines as shown in Fig.2.11.

Fig. 2. 11: Schematic of the basic LHP. From [2.20].

The integration of the LHP cooling system has three main layers. The top hot/evaporator plate, which is the heat source and contains a vapor chamber, the middle layer (a evaporator/wick) and the bottom reservoir. The top plate has, on one side, the required electronics or solar cell concentrator or any heat producing devices. The other side of the top plate has large arrays of micromachined mesas/rails for thermal contact to the wick while providing channels as an outlet for vapor as shown in Fig.2.12. The channels are necessary for the vapor flow inside the wafer and ultimately out into the

59 condenser. The fabrication of the top/hot plate is made possible by anisotropic etching in

a (100) silcion wafer.

“Top” or “Hot” silicon lt

Vapor outlet to

CPS Wick

Bottom Water return back from liquid loop to the bottom reservoir glass reservoir (can be made of

Fig. 2. 12: Schematic of a LHP with CPS as the primary wick. Top-cap and bottom liquid reservoir are also shown. From [2.20]

The most important part of the LHP is the evaporator/wick. This is the most

innovative part of the silicon integrated LHP and dictates the operation of the loop heat pipe. This silicon layer transfers the heat to the liquid-vapor interface and pumps the liquid by capillary forces. The evaporator needs a porous wick which is fabricated by the

Coherent Porous Silicon (CPS) technology developed at the University of Cincinnati’s

Center for Microelectronic Sensors and MEMS. The porous wick has through-pores over the planar surface and all these pores have oxide grown on all surfaces, which keep the evaporator always wet by the capillary/hydrophilic action. The cooling and heat dissipation can be adjusted by increasing the density of the pores as well as by reducing

60 or adjusting the radii of the pores. The bottom plate acts as a reservoir for liquid contact to the porous wick. The working fluid from the condenser reaches the evaporator through the bottom plate. The top-cap, evaporator and the bottom plate are bonded together.

Alternatively, the reservoir and the hot plate (if desired) may be made of borosilicate glass and anodically bonded to the silicon wick. Bonding of these three layers can be achieved either by anodic or eutectic bonding schemes. The working fluid (water in the present case) is circulated from the condenser to the evaporator using separate lines.

A major factor limiting the performance of the LHP is that the liquid must flow through the wick and along the whole length of its loop path.There are increasing flow losses as the wick is made thicker, especially if the pore size is small. Also the LHP will not start up if the wick is not in initial contact with the liquid. The liquid and the vapor flow paths are separated, which eliminates the shear forces between the flow and makes it possible to transport the heat. The LHP has been equipped with a liquid reservoir which keeps the wick always wet for guaranteed priming; however this may ultimately not be necessary in an optimized closed system.

The schematic in Fig. 2.13 indicates that the device is designed to work even in the “wick up” position as well as to pump liquid against gravity (which of course is not an issue in the micro gravity situation).

61

Fig. 2. 13: Schematic of the Loop Heat Pipe acting against gravity. From [2.20].

2.5 Summary of earlier modeling effort at UC

M. Hamden [2.9 & 2.21] performed theoretical steady state study to explore the effect of different parameters on the performance of a micro Loop Heat Pipe (LHP) that utilizes a Coherent Porous Silicon wick (CPS). The steady state LHP model is described by the conservation equations, thermodynamic relations, and capillary and nucleate boiling limits (Fig. 2.14). The loop heat pipe cycle is presented on a temperature-entropy diagram. A relationship is developed to predict the ratio of the heat of evaporation to the heat leaked to the compensation chamber. The work predicts the size of a LHP, the pumping distance, the maximum evaporator temperature, condenser temperature, sub- cooled temperature needed, and the maximum power that can be dissipated for a fixed source temperature. Promising theoretical heat flux, around 100 W/cm2, can be removed

utilizing a CPS wick with 5µm effective pore diameter and porosity of 50 percent or

higher.

62 This model however is not precise enough to predict, pressure drops and heat

distribution due to complex geometric configurations in the top-cap. The next chapter in

this dissertation discusses the heat distribution based upon geometric configurations of

the LHP evaporator package. Incorporation of nucleate boiling and evaporation rate

studies in micron sized porous systems also have to be taken into account.

Fig. 2. 14: Schematic of LHP for global model developed by Hamden. From [2.9].

Capillary pressure in a wick has to exceed the total pressure drop in the system for the LHP to operate (Eq. 2.6).

∆Ploop ≤ ∆Pcapillary (2.6)

∆Ploop - Cumulative pressure drop in top-cap, vapor line, condenser and liquid line

∆Pcapillary - Capillary pressure of the wicking material

The capillary pressure of a CPS pore is very predictable as it has uniform sized pores (Eq. 2.7).

2σ ∆Pcapillary = cosθ (2.7) rw

63 σ - surface tension of the working fluid rw – radius of the capillaries in the wicking material

θ - contact angle between the wicking material and the working fluid

The pressure drop in the loop can be estimated by adding the pressure drops in the vapor line, liquid line and fluid pressure drop in the wick (Eq. 2.8). It has to be noted that pressure drops in the top-cap of the evaporator package has been neglected in this model.

. . . 8µ m(l − l ) 8µ ml 8µ mL ∆P = l,c v + v,c v + l,c (2.8) loop πρ r 4 ρ + ρ Aερ r 2 l,c π ( v,c v,h )r 4 l,c 2

µ - dynamic viscosity

. m - mass flow rate l – length of the column

ρ - density r – radius of the tube

L- Thickness of the wick

ε - porsity of the wick

A- area of cross section of the wicking material

The distribution of heat into latent, sensible and heat leak into compensation chamber is governed by the following equations.

Heat dissipation rate for evaporation

Qh fg,h Qlatent = m& h fg ,h = (2.9) ⎛ Tv − Tcc ⎞ h fg + ⎜ ⎟C p ⎝ 1− e −aL ⎠

Heat dissipation rate to heat leak to compensation chamber

64 ⎛ Th − Tcc ⎞ Qleak = m& C p,l,c ⎜ ⎟ (2.10) ⎝ e aL −1 ⎠

Heat dissipation rate to heat the working fluid

Qsensible = m& C p,l,c ()Th − Tcc (2.11)

Total heat rate load

m& C p,l,c Qin = m& h fg,h + ()Th − Tcc (2.12) 1− e −aL

Where

m& C p,l,c a = keff A

Temperature of the compensation chamber equation

m& C p,l ,c L ⎛ Q − mh ⎞⎛ − ⎞ T = T − ⎜ & fg,c ⎟⎜1− e keff A ⎟ (2.13) cc h ⎜ mC ⎟⎜ ⎟ ⎝ & p,l,c ⎠⎝ ⎠

Mass flow rate

Q m& = (2.14) C p,v,c ()Th − Tc + h fg + C p,l,c ()Tc − T5

Temperature of condensed liquid

h A ⎛ h − h ⎞ T = T − T − T − T − T − ⎜ fg,c fg,h ⎟ (2.15) 5 c ()cc cc,sat ()h cc ⎜ ⎟ m& C p,l,c ⎝ C p,l,c ⎠

Temperature of vapor

⎛ ⎞ ⎜ ⎟ ⎛ v fg,cTc ⎞⎜ 8µl,cm()− v 8µv,cm v ⎟ T = T + ⎜ ⎟ & l l + & l (2.16) h cc,sat ⎜ ⎟⎜ 4 ρ + ρ ⎟ ⎝ hfg ,c ⎠ π ρl,c r ⎛ v,c v,h ⎞ 4 ⎜ π ⎜ ⎟r ⎟ ⎝ ⎝ 2 ⎠ ⎠

Quality of fluid in compensation chamber

65 ⎛ ρ + ρ ⎞ M − ρ V − ⎜ v,c v,h ⎟π r 2 − ρ π r 2 ()− − ρ V l,c cc ⎜ 2 ⎟ l v l,c l l v v,c e β = ⎝ ⎠ (2.17) ρv,cc Vcc − ρl,cVcc

Density of vapor in compensation chamber

T ⎡ ⎛ h ⎞ T − T ⎤ ρ = ρ c ⎢1+ ⎜ fg ,c ⎟ cc,sat c ⎥ (2.18) v,cc v,c T ⎜ v T ⎟ P cc,sat ⎣⎢ ⎝ fg,c c ⎠ c ⎦⎥

Density of vapor in the top-cap

T ⎡ ⎛ h ⎞ T −T ⎤ ρ = ρ c ⎢1+ ⎜ fg,c ⎟ h c ⎥ (2.19) v,h v,c T ⎜ v T ⎟ P h ⎣⎢ ⎝ fg,c c ⎠ c ⎦⎥

Praveen Arragattu [2.22] modeled pressure drops created by the vapor flow in the top-cap of the evaporator package. This when added to Eq. 2.8 would result in a loop pressure being equal to

. . . 8µ m(l − l ) 8µ ml 8µ mL ∆P = l,c v + v,c v + l,c + ∆P (2.20) loop πρ r 4 ρ + ρ Aερ r 2 top−cap l,c π ( v,c v,h )r 4 l,c 2

Arragattu’s work also compared multiple top-cap configurations to pick the optimal design, which would help in better heat conduction to the evaporating surface.

Thermal conduction pathways etched in anisotropic etchants in rail configuration was found to be delivering heat optimally with low temperature drops and pressure drops.

Ponugoti et al. [2.23] work involved in developing a transient state model for the

planar micro LHP evaporator package. It is analyzed for different values of ‘h’ ranging

2 2 from 0.45 W/m K to 4500 W/m K. The effect of h with varying input heat load levels was studied. At small h values, the time taken to reach steady state was sensitive to heat load input and at large h values it was insensitive.

66 Suh et al. [2.24-2.25] concentrated on the effects of bubbles in the compensation chamber. A CPS based wick with no secondary wick in the compensation chamber was found to reach nucleate boiling limit sooner than the one which has a secondary wick.

This was attributed to the thinness of the CPS wick and its isothermal nature when uniformly heated. Evaporation can initiate on both sides of the CPS wick. Gravitational orientations were found to be an important parameter in suppressing the vapor on the backside. Creating an extra vapor chamber on top of the liquid in the compensation chamber helped vapor to escape from the backside of the CPS wick, keeping the primary wick wet all the time.

Yang et al. [2.26] focuses on the investigation of the liquid-gas (or vapor) interface, which occurs in very small diameter pores. A mathematical model is built to formulate the movements of a liquid column trapped in a capillary pore. The Navier-

Stokes equations are applied to the liquid side with assumed no-slip conditions, while the

Young-Laplace equation is used to formulate the shape of the interface. This theoretical model calculates both velocity profiles in the liquid side and transient profiles of the interface itself; and of particular interest, it predicts the pressure difference, oscillation frequency and amplitude required to burst this interface. These predicted parameters are examined by the experiments with both oscillating Coherent Porous Silicon (CPS) wicks and porous plastic wicks.

67 2.6 Generations of LHPs developed at UC

2.6.1 The 0th generation µ-LHP

In this 0th generation µ-LHP, the top-cap (with thermal conduction pathways),

CPS wick and the bottom reservoir were epoxied together. A Kapton strip heater was also epoxied to the top-cap. Three thermocouples were used for monitoring the temperatures.

A commercially available differential pressure sensor was used to monitor the vapor pressure. A needle valve to tweak the vapor pressure and the mass flow rate was also used (Fig. 2.15). The actual demonstrator can be viewed in Fig. 2.16. The bottom reservoir was micro machined in borosilicate glass. A etch depth of 150 µm was achieved in a square cm area. A rail configuration was used on the top-cap for heat conduction.

This was bulk micro machined in silicon using anisotropic etchant (KOH). A schematic and the etched silicon are shown in Fig. 2.17. Two vapor collecting chambers were etched, to vent out the vapor. Vapor inlet and outlet ports were made by manually drilling.

Thermocouples (protruding into top Integrated and bottom of wick) resistive heater for varying input power

Water Pressure reservoir for Sensor varying head (including Needle open loop Valve testing)

Vapor lines can be connected to condenser or left open to do open loop measurements

Fig. 2. 15: Schematic of 0th generation µ-LHP.

68

Pressure Vapor outlet sensor for to the loop sensing vapor Etchedpressure copper clad Connecting wires for board heaters CPS wick Liquid inlet sandwich from the loop to 2 the bottom (1 cm ) glass reservoir Fig. 2. 16: Terminal Board Assembly for Loop Heat Pipe Experiments.

Mask for rectangular silicon studs or mesas for thermal contact to the wick 435µmX8000µm

Vapor side Vapor side grooves reservoirs 300µm X 10040µmX 8000µm 1500µm

Fig. 2. 17: Schematic of the mask used for the fabrication of the top evaporator plate and the top cap after fabrication.

Open loop measurements were performed at different liquid reservoir heights.

Here one should note that the active area of the porous wick is only about 6.25% of the total area due to the sparse distribution of the non-optimized pores. The power was

69

slowly increased from zero. High pressure build-up in the vapor side of the evaporator at

1.2 W of input power was observed. The power was then increased further and it was observed that the liquid-air/vapor interface was oscillating in the wick. The evidence of this oscillatory behavior can also be observed by monitoring the temperatures of the top and bottom of the wick with the installed thermocouple.

The water interface in the bottom reservoir would leave the wick surface and then due to possibly condensation in the wick, the vapor pressure would decrease and then the interface was pushed back into the wick. This is believed to be the reason for the oscillatory behavior in the thermocouple temperatures. When the power was further increased the water interface left the wick on the reservoir side.

One interesting observation was that the lower the head, the lower the power needed to dry out the wick. The reason for this could be the fact that, the pressure head created in the first experiment by the liquid reservoir was high and the bottom of the porous wick was almost always wetted and needed a considerable increase in the power to change the vapor pressure. The maximum power that the interface could withstand was around 1.3 W to 1.6 W.

The reasons for wick dry out are non-condensable gases in the liquid and very high thermal conductivity of silicon enabling nucleate boiling in the bottom chamber.

Since the wick is not patterned, some of the pores will be covered by the thermal conduction pathways (rails), this will trap air in the interface. When heat is supplied, these air bubbles trapped expand and push the liquid down into the bottom chamber, leading to nucleate boiling in the bottom chamber (refer Fig. 2.18). The present design has grooves, which cover almost 50% of the pore area, thus reducing the effective active

70 area. For this reason, the hot plate needed to be redesigned and fabricated such that very few pores are covered with the grooves. No closed loop testing was performed, as the condenser was not designed yet. Kapton heaters have a low higher limit of working temperature (150oC), these have to be replaced with patterned heaters. Epoxy introduces

lot of thermal conduction issues and would also pose a significant challenge in holding

high vacuums. Anodic/eutectic bonding techniques have to be developed to make

hermetic seals.

Heat In

Channels or Compressed grooves covering air and water the wick vapor (actually covers many wicks).

Fig. 2. 18: Schematic of the pores covered by the hot plate

2.6.2 The 1st generation µ-LHP

A new compensation chamber was included in this design replacing the bottom chamber.

A larger compensation chamber volume was desired after the studies of Hamden [2.21]

on pressure and temperatures in the µ-LHP. This also would make sure proper operation

in various startup conditions, allowing the wick not to dry out. It was easier to machine a

big compensation chamber in Lexan than in silicon or glass. Lexan is both clear and has

excellent thermal resistance. A Kapton heater was epoxied on the silicon top cap. The

silicon top-cap was micro machined to have a plenum and was attached to the CPS wick

using Vacseal. A new condenser was also designed for this process. No thermal tests

could be performed because of the cracking of the silicon top cap, due to mismatch in

71 thermal expansion coefficients between silicon and Lexan. To avoid nucleate boiling in the compensation chamber, a secondary wick is needed. The primary function of secondary wick is to wet the primary CPS wick. Quartz wool was chosen to have good wetting properties to be a secondary wick.

A common problem in microfluidic devices is the ability to handle two phases. In a micro channel when a gas is allowed to form with liquid surrounding it, high pressures are needed to remove the gas bubble. In earlier experiments with the CPS wick structure, observations were made that showed the presence of vapor on the liquid side of the wick.

This has been experimentally shown to occur in the start-up stage of the package, where the water in the reservoir is heated due to high heat conduction through the CPS wick and water channels. This causes vapor to form in the reservoir, which can impede the capillary action of the wick. In the earlier design there was no built in method to combat this transient effect of bubble formation and replenishing working fluid to the primary wick.

When the heat flux is high, the amount of vapor produced can be substantial. Due to the density difference between water and vapor (~1000 times), the vapor can fill the top chamber and begin to cause large pressure build up on the topside of the wick. If the pressure build up is greater than the capillary force of the pores in the CPS, the water will burst out of the wick. This phenomenon was observed in the start-up of the wick during previous experimental testing of the packaged device. The problem is compounded in a micro gravity situation, where it is difficult to predict the phases at the startup condition.

Classically the secondary wick in a LHP will consist of a reticulated structure similar to the primary wick. The main difference will be the larger size pores to allow for

72 a low-pressure drop and sufficient capillary force to bring the liquid back to wet the primary wick. Instead of the traditional secondary wick it was decided to use a network of glass fiber to act as a secondary wick.

The thermal conductivity of the quartz fiber (SiO2) is very low (~14 W/mK).

Unlike other fibers which have been utilized as a wicking material it does not absorb water, Instead the water simply wets the surface of the quartz, because it is strongly hydrophilic.

In Fig. 2.19 the absorption is shown to be maximum around 92% porosity.

Permeability tests of the secondary wick were also performed as shown in Fig. 2.20. The graph shows the linear relationship between the flow rate and the pressure drop.

y = -6.498x2 + 11.095x - 0.1401 Absorption Test R2 = 1 5

4

3 Capillary Force

2 0 0.4 0.8 1. 2 Grams of Quartz glass

90.51 % porosity 95.41 % porosity 92.00 % porosity Fig. 2. 19: Graph showing how different packing densities affect absorption. Also a line mimicking capillary force is added. The data for the absorption test was fit to a 2nd degree polynomial and showed a very good match. From [2.27].

73 Volumetric flow rate vs. pressure drop

5.E-07 4.E-07 4.E-07 4.E-07 3.E-07 3.E-07 2.E-07 2.E-07

2.E-07 y = 4.384E-11x + 9.564E-09 1. E - 0 7 R 2 = 9.892E-01 8.E-08 4.E-08 0.E+00 0 2000 4000 6000 8000 10000 12000 Pressure drop, Pa

Fig. 2. 20: Permeability test of the secondary wick. Graph shows linear relationship between the pressure drop and flow rate. From [2.27].

2.6.3 The 2nd generation µ-LHP To avoid the thermal mismatch between the top-cap and the compensation chamber, the top-cap was machined in Pyrex glass. The whole loop can be seen in schematic 2.21 and figure 2.22. A condenser was built but was never tested as it was leaking significantly to make any calorimetric measurements.

Fig. 2. 21: Schematic of 2nd generation LHP

74

Fig. 2. 22: Picture of 2nd generation LHP

The total volume of the LHP was calculated to be 1.73 ml. Water was metered

into the LHP with a filling station. The volume injected into the loop was measured

between 1.12 and 1.4ml. The loop should have between 65-80% liquid volume. Without

insulation around the evaporator package the heat lost to convection dominated the heat

transfer. This temperature difference between the top-cap and wick increased with

increasing power. The curve for the wet loop followed that of the dry loop indicating no

evaporation.

The loop was then insulated with quartz wool and the vapor line was insulated

with tube foam. The data shown in Fig. 2.23 represents the three runs in comparison with

the dry loop test. The temperature as read by a thermocouple (T1) placed near the Kapton

heater is plotted against input power to the heater. A 35-40oC temperature difference can be seen between the dry test and the wet test.

75 Test 3 Runs 1-3

16 0

14 0

12 0

10 0

T1-Dry T1-Wet Run1 80 T1-Wet Run 2 T1-Wet Run 3

60

40

20

0 00.511.522.533.54 Power(Watts)

Fig. 2. 23:Temperature at T1 next to heater on top-cap.

2.6.4 The 3rd generation µ-LHP The major shortcoming observed during the testing of the 2nd generation LHP was the out-gassing of the Lexan® used for the evaporator package. Thus it was decided to use a thick piece of borosilicate 7740 (Pyrex®) as of the back plate. A matching S/S back plate was machined so that, with a help of a gasket, it could be used to close the backside of the package. The rest of the components were made the same as that of the 2nd generation LHP. Here quartz wool is placed as a secondary wick in the compensation chamber. Figure 2.24 shows the picture of a 3rd generation LHP. Figure 2.25 shows dry & wet tests performed on the evacuated LHP.

76

Fig. 2. 24: Different views of a the 3rd generation LHP. Right top show the front view of the evaporator package with attached S/S tubes, heater and thermocouples.

Top Cap Temperature vs Power 150

140

130

120

110

100

90

80

70 Top Cap Temp (Deg C) (Deg Temp Cap Top 60

50

40 Dry Loop

30 Wet Loop

20 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 Applied Power (W)

Fig. 2. 25: Variation of the top cap temperature vs. power.

2.6.5 The 4th generation µ-LHP A new compensation chamber was designed to use gravity to feed the liquid back to the primary wick through the secondary wick. Two cylindrical holes were drilled in glass. The small cavity holds the secondary wicking material and is attached to the CPS

77 wick. The larger cavity has a vapor volume on top of the liquid level (Fig. 2.26). Any vapor formed on the backside of the CPS wick, will reach this vapor volume due to gravity, thereby providing working fluid to the primary wick. This approach delays nucleate boiling on the backside of the evaporator. A stainless steel backing plate was used to provide a seal to the compensation chamber on the backside. This backing plate also had ports to evacuate the device, inject working fluid and also had a liquid return line attached to it. A condenser which was capable to perform calorimetric calculations was built in this generation device. A dual core condenser was designed and developed.

The inner core carries the working fluid of the LHP, while the outer core carries the cooling water (Fig. 2.27). It was suggested to run these fluids in opposite directions for efficient heat transfer between them. Condenser testing showed a 25 W convection to the

2 surroundings with no insulation and an over all heat transfer (Ui) 9,9091W/m K. Instead of using Kapton heaters strips, a thin-film heater was photolithographically placed on the top-cap. This enhanced the capability of the heater to handle more than 100 W.

V1

V2

Fig. 2. 26: Photograph and a schematic of the Pyrex® bottom plate, the larger cavity, V1, will functioned as the compensation chamber and the secondary wick will be placed in the smaller cavity,V2.

78

Fig. 2. 27: Schematic of the copper condenser. Both fins attached inner vapor line and outer cooling water flow channel can be seen.

Vacseal® was used to bond the top-cap to the CPS wick and this sandwich was bonded to the Pyrex® compensation chamber. A stainless steel tube was attached to the top-cap using silver soldering technique (Fig. 2.28).

Fig. 2. 28: Partially completed evaporator package. Centrally located vapor tube and the electrical connection can be seen.

79 Quartz wool was then inserted in the smaller cavity and held in place by a stainless steel mesh. The stainless steel backing plate closed the compensation chamber with a gasket. Vapor and liquid transport lines are connected to the condenser using two quick disconnects. Multiple thermocouples are placed to read temperature at both the evaporator end and also the condenser end (Fig. 2.29). A pressure sensor was attached to read pressure in the vapor transport line. The system sensors were then connected to a data acquisition system for automatic monitoring and logging.

After a vacuum integrity check was performed by evacuating the loop and testing vacuum loss with time, dry and wet loop tests were performed. A 10-15oC of cooling was observed. Oscillating loop behavior was also observed, where the inlet temperature and the outlet temperature of the condenser, were fluctuating with time. The device had heat conduction around the periphery of the wick. This might have created high heat fluxes around the edges of the CPS wick. The pores would eventually burst through and cause nucleate boiling on the backside. Non-condensable gases in the working fluid can create high partial pressures and increase the evaporating temperature. The present filling station (Fig. 2.30) was accurate in metering the working fluid into the LHP, but needed modifications to remove non-condensable gases.

80

Fig. 2. 29: Photographs of the 4th generation system. Left; the complete system. Top right; front view of the mounted evaporator package and bottom right; the condenser.

Fig. 2. 30: Filling station for the 4th generation LHP device.

2.7 References [2.1] M.J. Ellsworth, Jr. and R.E. Simons, “High Powered Chip Cooling - Air and Beyond”, Electronics Cooling, Volume 11, Number 3, August 2005. [2.2] R. Schmidt, “Liquid cooling is back”, Electronics Cooling, Volume 11, Number 3, August 2005. [2.3] http://www.apple.com [2.4] http://www.thermaltake.com

81 [2.5] G.M. Grover, T. P. Cotter, and G. F. Erickson (1964). “Structures of very high thermal conductance”. Journal of Applied Physics 35 (6), 1963. [2.6] R.S. Gaugler, “Heat Transfer Device”, U.S. patent # 2,350,348. [2.7] http://www.lanl.gov/orgs/esa/epe/Heat_Pipe_Site/heatpipe4.shtml [2.8] T. Kaya, “Heat Pipe Technology for Thermal Control”, CMAP Workshop on Thermal Issues, Toronto, March 2003. [2.9] M. Hamdan, D. Cytrynowicz, P. Medis, A. Shuja, F. Gerner, H. Henderson, E. Golliher, K. Mellott, C. Moore, “Loop Heat Pipe (LHP) Development by Utilizing Coherent Porous Silicon (CPS) Wicks”, Proceedings of the 8th ITHERM Conference, May 29-June 2, pp. 457-465, 2002. [2.10] C. Chandratilleke, H. Hatakeyama, and H. Nakagome, “Development of Cryogenic Loop Heat Pipes”, Cryogenics, Vol. 38, No. 3, pp. 263-269, 1998. [2.11] A. Hölke, H.T. Henderson, F.M. Gerner, and M. Kazamierczak, “Analysis of Heat Transfer Capacity of a Micro-machined Loop Heat Pipe”, Asme Journal Of Heat Transfer, submitted for publication, 1999. [2.12] Y. Maidanik, S. Vershinin, V. Kholodov, and J. Dolggirev, “Heat Transfer Apparatus”, US patent 4515209, May 1985. [2.13] S. Kandlikar, Y. Fujita, Y. Iida, and R. Heist, “Nucleate Boiling”, Handbook of Phase Change: Boiling and Condensation, Editor Kandlikar S., Shoji M., and Dhir V., Ch. 4, pp 71-120, 1999. [2.14] M. Nikitkin, and B. Cullimore, “CPL and LHP Technologies: What are the Differences, What are the Similarities?”, SAE Paper 981587, 1998. [2.15] T. LaClair, and I. Mudawar, “Thermal Transients in Capillary Evaporator Prior to the Initiation of Boiling”, Vol. 43, pp 3937-3952, 2000. [2.16] T. Kaya, “Mathematical Modeling of Loop Heat Pipes and Experimental Validation”, J. of Thermophysics & Heat Transfer, Vol. 13, No. 3, pp 314-320, 1999. [2.17] V.Lehmann, “ The Physics of Macropore Formation in Low Doped n-Type Silicon”, Journal of Electrochemical Society Vol.140, October 1993 pp: 2836-43. [2.18] V.Lehmann, U. Grǘnimg, “The limits of Macropore Array Fabrication”, Thin Solid Films, Vol. 297 1997 pp: 13-17 [2.19] V.Lehmann, “ Porous Silicon – a New Material for MEMS”, Proceedings of IEEE Ninth Annual International Workshop on Micro Electro Mechanical Systems, 1996 pp: 1- 6. [2.20] A. Holke, “Development of Silicon Chemical Wet Etching toward the Realization of an Integrated Thermal-Electronic Package”, Ph.D. Dissertation, University Of Cincinnati, 1998. [2.21] Mohammed Hamdan, Frank M. Gerner and H. T. Henderson, "Steady State Model of a Loop Heat Pipe (LHP) with Coherent Porous Silicon (CPS) Wick in the Evaporator”, 19th Annual IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM), March 11-13, 2003, San Jose, California. [2.22] P. Arragattu, “Optimal Solutions for Pressure Loss Through the Top Cap of the Evaporator of a Micro Loop Heat Pipe”, M.S. Thesis, University of Cincinnati, Cincinnati, OH, 2005. [2.23] P. Ponugoti, F.M. Gerner, H.T. Henderson, “Study of Transient Behavior of the Evaporator of the Planar Micro Loop Heat Pipe”, Thermal and Fluids Analysis Workshop, (TFAWS), University of Central Florida, Florida. August 8-12 2005.

82 [2.24] J. Suh and F. M. Gerner, "Microscale Heat Pipes," Annual Review of Heat Transfer, Vol. 14, 2005, p. 313-333. [2.25] J. Suh and F. M. Gerner, "The Dynamic Characteristics of a Liquid-Gas Interface in Microscale Pores," International Mechanical Engineering Congress and Exposition, IMECE, November 15-21, 2003, Washington D.C. [2.26] Y. Yang, F.M. Gerner and H.T. Henderson "Mathematical and Experimental Study of Liquid-Gas Interface in Porous Wicks," International Mechanical Engineering Congress and Exposition, IMECE, November 17-22, 2002, New Orleans. [2.27] Y.Yang, F.M. Gerner and H.T. Henderson, "Dynamic Stability of the Liquid-Gas Interface in Micron-Sized Pores," ITHERM International Conference on Thermal Phenomena in Electronic Systems, May 29-June 1, 2002, San Diego, California, pp. 1046-1051. [2.28] A. Shuja, Ph.D. dissertation, University of Cincinnati, Cincinnati OH 2006.

83 Chapter 3 Modeling & Fabrication of Top-Cap of the LHP Evaporator

3.1 Motivation

Heat delivery to the wicking material is an important issue in heat pipes. Failure

to provide an efficient heat delivery method would lead to very high temperatures on the

microelectronic device to be cooled. This would cause the device to either function

inefficiently or would cause failure due to excessive heating. The function of a thermal management system is to maintain the device at its safe operating temperatures. This would require very effective heat removal strategies and efficient heat delivery to the evaporating surface. Several generations of µ-LHP’s were modeled, fabricated and tested at the University of Cincinnati. The maximum heat transfer was limited by the microelectronic chip temperatures on the top-cap of the evaporator. The area of the evaporating surface was maintained at 1 sq. cm. for comparison of various generations.

3.2 Components of LHP

In a LHP, the three main components are the evaporator, condenser and fluid

transport lines between them. Heat is conducted from the top-cap to the evaporation

surface on a wicking material, where the fluid absorbs energy (latent heat of

vaporization) and changes phase from liquid to vapor. This vapor is transported in a

vapor flow line into the condenser as shown in Fig. 3.1 utilizing the pressure created by

the expansion in volume of water from liquid phase to vapor phase. The capillary

pressure of the wicking material should exceed this expansion pressure to drive the vapor

84 through the vapor line into the condenser. Otherwise, the vapor will burst the capillaries and would accumulate in the compensation chamber, thus breaking the flow continuity similar to the opening of an electric circuit. This would be detrimental to the operation of the LHP. At the condenser, the vapor releases the energy it absorbed to change the phase back to liquid. To absorb the latent heat of vaporization and convert the vapor phase to liquid phase, the condenser has to be designed appropriately. This liquid is transported back to the evaporator package through the liquid return line.

Top-cap CPS Wick

Fig. 3. 1: Basic loop heat pipe (From [3.1]).

3.3 Components of an evaporator package

The evaporator package consists of three major components: top-cap, wick material and compensation chamber. The function of the top-cap is to seal the evaporating surface and also to deliver heat to the same, which is located on the top of the wicking material. The function of the wicking material is to hold the meniscus using capillary pressures and using secondary wicking material provide a continuous amount of

85 liquid for evaporation by wicking it from the compensation chamber, where the liquid is stored. The other function of the wicking material is to provide a surface meniscus to withstand the back pressure effects of the gas, when it changes from liquid to vapor phase. The wick material should withstand the pressure created in the top-cap by the vapor and hold the capillary meniscus of the liquid for further evaporation. In this chapter much emphasis is given to the design considerations of the top-cap.

3.4 Top-cap

3.4.1 Functionality of top-cap and design considerations

There have been considerable developments in microelectronic processing so that one has the luxury of designing complex geometries for better heat conduction to the wick material. The basic function of a top-cap is to provide heat to the wicking material.

The prototype developed at UC incorporates four LHP devices on a 2” diameter silicon wafer. The size of cooling area of 1 cm x 1 cm proved to be optimum for incorporating four devices on a standard wafer size. The LHP experiments are expected to be run in partial vacuum, therefore, the top-cap and wick have to be hermetically sealed. For very good thermal conduction or low thermal resistance between top-cap and the wick, a very good bonding scheme also has to be developed at the micrometer scale. One important consideration for a top-cap design is to minimize the amount of wick coverage by the feet of the top-cap. The porous material under the foot of the top-cap would be useless for evaporation as there is no escape path for the vapor (refer Fig. 3.2) (This is only in a wick material which is coherent and straight. At UC, wicking materials which are interconnected were also developed (refer to chapter 4). This enables the porous material

86 under the foot to be active, as they have an escape route through adjacent pores) (refer

Fig. 3.3).

Fig. 3. 2: Schematic of a top-cap covering pores, which can inactivate pores under the foot.

Fig. 3. 3: SEM image of an interconnected coherent porous silicon.

The simplified version of the top-cap is to have conduction pads from the top-cap

touching the space around the wick material. This makes sure that none of the porous

region is closed by the feet of the top-cap (Fig. 3.4). The major problem with such a

design is that the heat has to travel from the microelectronic chip (usually at the center of the top-cap) to the end of the top-cap and then to the center of the wick material. This

87 causes the pores near the conduction pad (around the edges of the wick) very active and the pores at the middle to be almost inactive. The pores that are very active near the conduction pad can cause wick dry-out (refer Fig. 3.5), nucleate boiling in the backside of the wick and can shut down the LHP operation. The pores that are not active do not contribute towards heat transport and would render the wicking material less efficient.

The problem with inefficient bonding schemes, which can cause high temperature difference between the top-cap and the CPS wick (Here, VacSeal was used as a bonding material and showed a 7oC temperature difference) (refer Fig. 3.4).

Bottom Glass Reservoir

Fig. 3. 4: Poor lateral conduction can shut LHP operation.

88

Fig. 3. 5: Poor lateral conduction can shut LHP operation creating vapor on the backside (From [3.1]).

The problem of wick dry-out and nucleate boiling has been countered by placing a secondary wicking material in the compensation chamber (refer Fig. 3.6). This causes more wicking action and a continuous feed of liquid to the primary wick. In our design, quartz wool fiber of around 9 µm diameter was used as a secondary wicking material in the compensation chamber. The porosity of the wool after placing in the compensation chamber was measured in excess of 90% [3.4].

89

Fig. 3. 6: Secondary wick placed to stop wick dry-out in the primary wick (From [3.1]).

The issue of the heater design, which simulates a microelectronic chip, is also considered with the top-cap design. Some of the previous generations used Kapton glue- on heaters on the top of the top-cap. The heater was coming apart at higher temperatures, as the glue was failing (approximately around 120oC). It was decided to have a patterned

thin-film metal heater. For design of the thin film heater please refer to Appendix B of

this dissertation.

The other important issues for consideration are the registration, number of vapor

ports, placement of the vapor ports, material design of the top-cap, scheme to bond

stainless steel/copper tubing to vapor ports. Several materials were investigated and

silicon was decided to be the best material for fabricating the top-cap. It can be easily

patterned using conventional microelectronics/MEMS processes.

In the following discussion, FEM modeling is undertaken to understand the heat

flow in a top-cap with no thermal conduction pathways. This was later compared with a

top-cap with thermal conduction pathways to provide proof of nucleate boiling and wick

90 dry out issues can be solved by incorporating top-caps with thermal conduction pathways. Optimization studies are undertaken to reduce the number of thermal conduction pathways without drastically increasing the top-cap temperature. The more the number of top-cap thermal conduction pathways, the higher the pressure buildup due to constriction in vapor channels. By reducing the number of thermal conduction pathways, more CPS pores can be incorporated in their place, increasing the evaporating surface. Different generation devices used different evaporator packages. Many of them are modeled and studied in detail to understand the effect of size and geometry of the evaporator package as a whole. Studies on heat spreaders are also described for a more uniform operation of the LHP device.

3.5 Top-cap bonded around the wick design

Several designs were considered for the top-cap. The first and the simplest of all designs is a top-cap with feet touching around the 1cm x 1cm wick material. At 4 W,

Arragattu [3.2] found in a 2-D model that there can be a 40oC difference from the hottest to the coldest point in the top-cap and wick assembly. This translates to a chip temperature of around 140oC, if the evaporation temperature is 100oC.

Fig. 3. 7: Heat conduction path with top-cap bonded around the primary wick [From 3.2].

91 3.5.1 3-D FEM model with no thermal conduction pathways A detailed 3D model was analyzed using ANSYS thermal simulation software.

The components were designed in NX-3 CAD utility software. The top-cap has been modeled as 17 mm x 17 mm x 1 mm silicon block with 10 mm x 10 mm in the center for evaporating surface. Two vapor reservoirs are modeled on two sides of the wick material

(10 mm x 2 mm). The vapor plenum in the top-cap is 150 micrometers. Two vapor ports of 1mm ID are also inserted in the middle of the vapor reservoirs. A 17 mm x 17 mm x 1 mm silicon block is simulated as a CPS wick on the bottom of the top-cap. A metal patterned heater was also designed to provide thermal source (refer Fig. 3.9-3.11).

Fig. 3. 8: Temperature profile (K) of a 2-D model of thermal conduction with top-cap bonded around the 1cm x 1cm wick [From 3.2].

92

Fig. 3. 9: Top isometric views of the modeled top-cap.

Fig. 3. 10: Bottom isometric views of the modeled top-cap.

Fig. 3. 11: Evaporator package with heater, top-cap (with two vapor ports), simulated CPS wick as a silicon block.

3.5.2 Model constraints The model boundary conditions are 25 W to the heater, 80oC (evaporation temperature) on the back of the simulated CPS. The evaporation was set at 80oC under

93 the assumption that the LHP would use water as the working fluid and the operating pressure of the LHP is around 6.7 psi. The LHPs generally are evacuated and run under partial vacuum. The heat was supplied as a constant heat flux to the heater area. The area of the heater is 0.2975 cm2; the heat flux corresponding for a 25 W heat input is 84

W/cm2. The 80oC simulates a constant evaporation temperature for the model and would act as a heat sink. The material of top-cap and the simulated CPS is silicon and the material for the heater is Ni. All outer surfaces are adiabatic expect the heat source

(heater) and the heat sink (back side of the simulated CPS wick). The thermal conductivity of silicon was taken as 148 W/m/K. This model does not take the natural convection of air into account. This is a steady state thermal model to see the temperature distribution in the top-cap and to see how thermal fluxes are distributed. The hydrodynamics of the vapor transport mechanisms out of the top-cap and the corresponding thermodynamics are not modeled due to the complexity of the problem.

By incorporating such transport mechanisms, the model can be made more realistic in predicting the operation of the LHP.

3.5.3 Model plots and results The model showed a 35.6oC difference from the hottest to the coolest part in the evaporator package (refer Fig. 3.12). It also showed high heat fluxes being delivered to the pores close to the bonded surface between the top-cap and the simulated CPS wick

(Fig. 3.13 & 3.14). The pores in the center of the wick received almost no heat flux making them inactive.

These model results and very low experimental power dissipation capabilities of previous generation LHP using the top-cap bonded around the periphery of the wick, lead

94 the research team to believe that the wick has a very small percentage of active pores.

The pores that are receiving huge thermal fluxes might cause nucleate boiling around the periphery of the bonding surface and can cause vapor formation in the compensation chamber. This can eventually lead to wick dry-out, in spite of having a secondary wicking material.

Fig. 3. 12: Temperature profile of the evaporator package (in degrees Celsius).

3.6 Top-cap with conduction pads on the wick

The above mentioned problems with a top-cap bonded around the 1 cm x 1 cm wick material lead us to design thermal conduction pads to the wick (refer Fig. 3.15).

This would enable more uniform heat spread on the pores and would ensure more pores

95 are active in evaporation. This would also involve that some of the pores would be covered by the thermal conduction pads (refer Fig. 3.2). A unique patterning technique was investigated to pattern the pores, such that they are absent under the conduction pad feet (refer to Fig. 3.16 & 3.17 & chapter 4 for more details).

Fig. 3. 13: Heat flux profile (in W/m2). Top view of the evaporator package.

96

Fig. 3. 14: Heat flux profile (in W/m2). Front view of the evaporator package.

Fig. 3. 15: Heat conduction using the top-cap with conduction pads. Some of the pores are covered by the thermal conducting pads (from [3.1]).

Fig. 3. 16: Top-cap bonded to a patterned CPS wick. Pores are absent under the conduction pad feet.

97 3.7 Top-cap designs

To design a top-cap with conduction feet, it was very important to make sure the fabrication of it should be possible using MEMS micro-fabrication techniques. The five possible designs considered for the top cap from the fabrication point of view are:

1) Trapezoidal slots

2) Rectangular slots

3) Square columns

4) Trapezoidal columns (mesas)

5) Cone columns

Fig. 3. 17: Patterned CPS wick to allow thermal conduction pathways.

98 The above five designs of top-cap can be classified into two broad categories

namely channels and columns (posts). The advantage with the channel design is its ease

of fabrication. The major disadvantage is that it needs two reservoirs for the vapor to be

transported out for an efficient design. Numerous packaging issues can arise from these

types of designs. The advantage with the column design is that the vapor can exit with

only one outlet port out of the evaporator package, making the packaging very easy and

giving lower pressure drops. The disadvantage with the columns is that it is not a proven

technology yet.

3.7.1 Trapezoidal slot (rails) top-cap This top cap design comes under the classification of a channel that requires two

vapor reservoirs on either side of the micro channel for the vapor exit. These conduction

pathways are trapezoidal in shape (as shown in Fig. 3.18 & 3.19) and fabricated on the

silicon <100> orientation.

Fig. 3. 18: Trapezoidal slot top-cap design (From [3.1]).

In this design, the vapor generated flows from the center of the channel to the

reservoirs provided at both ends. There is an additional pressure drop in the vapor due to these reservoirs. The angle between the (100) and (111) planes formed because of the

99 anisotropic etching of silicon in potassium hydroxide (KOH) or Ethylene Diamine

Pyrocatechol (EDP) is 54.740. Silicon dioxide or silicon nitride can be used as an etching

mask.

Fig. 3. 19: Cad design of top-cap with trapezoidal rails and two vapor plenums with two vapor ports.

3.7.2 Rectangular slot top-cap This top-cap model differs from the trapezoidal slot design by the orientation of

the conduction posts. Here the posts are rectangular arrays compared to trapezoidal arrays

of the previous design. Here (110) silicon is used and the angle between (110) and (111)

planes is 90o. This design also requires two vapor plenums on each side of the slot. This design requires the same anisotropic etching techniques used for the trapezoidal slot top- cap (please refer to section 6.3.1: (110) silicon etching for more details).

100

Fig. 3. 20: Rectangular slot top-cap design (from [3.1]).

3.7.3 Square column top-cap The biggest advantage of square columns is that it would enable cross permeation of vapor flow and would require only one vapor port (refer to Fig. 3.21). This design also covers minimum amount of pores for the conduction pad. The disadvantage is the difficulty of fabrication and also a smaller area of the conduction pad producing high temperature difference across the top-cap. The fabrication of square column top-cap would start from patterning CPS wick with posts. After the formation of the CPS pores to the desired length, square columns can be achieved by etching the CPS pores in silicon etching solutions. Refer to Fig. 3.22 & Fig. 3.23 for a schematic of the fabrication sequence and an etched silicon wick for square columns (for more information on patterning of CPS please refer to the chapter 5). In Fig. 3.23, the over etching of the post is due to the passivation scheme used. Silicon nitride is a very high stress film on silicon.

This causes stress fields and the CPS etching attacks these fields to lower them. Low stress silicon nitride films and other films have been investigated by A. Shuja and the author. Please refer to the dissertation of A. Shuja [3.4] and the CPS etching chapter in this dissertation for more information.

101

Fig. 3. 21: Square column top-cap design (from [3.1]).

a) b) Fig. 3. 22: a) Schematic of a unit cell patterned & etched using CPS etching technique b) Schematic of the structure after etching using silicon etching (anisotropic/isotropic)

102

Fig. 3. 23: SEM image of a silicon sample, which was patterned and etched using CPS etching. The image was taken in between the post isolation etching process.

3.7.4 Trapezoidal column (mesas) top-cap This design is a variation of the square column design. The fabrication of square

columns (refer Fig. 3.24) required CPS etching techniques, whereas a trapezoidal column

can be fabricated using anisotropic etching technique of silicon. A rectangular mask for

each pad has to be provided on the silicon surface.

Fig. 3. 24: Schematic of trapezoidal columns (mesas) formed from (100) silicon using anisotropic etching techniques (from [3.1]).

103 3.7.5 Cone Column top-cap One other variation possible is a cone column (refer Fig. 3.25). This can be achieved by using isotropic etching technique on (100) silicon. The mask has to be a circular pad made of silicon dioxide or silicon nitride.

Fig. 3. 25: Schematic of cone columns top cap design (from [3.1]).

3.8 ANSYS thermal model with patterned heater

Due to the availability of resources and time, it was decided to use trapezoidal rail top-cap design. The trapezoidal rail design has larger thermal conduction pad contact area compared to any column designs. This would ensure very low temperature drops across the top-cap and an efficient heat transfer from the heater to the evaporating surface. This design is the easiest of all designs to fabricate using MEMS processing techniques. One disadvantage of this design is that it needs two vapor plenums on each side of the thermal conducting pathways and would also need two vapor exit ports. These two vapor ports have to be properly packaged to send vapor from the evaporator to the condenser in the

LHP. For more details about packaging, please refer to the Ph.D. dissertation of P. Medis

104 [3.3]. All further analysis would concentrate on trapezoidal rail design. For all other

designs and their analysis, please refer to the thesis of P. Arragattu [3.2].

An ANSYS FEM model was developed with 25 W (84 W/cm2 heat flux from the

heater) of input power and 80oC as the evaporating temperature of the model. The value of thermal conducting pad was fixed at 50 microns and the value of height of the thermal conducting pad at 150 microns. These values were obtained from micro-processing standpoint. The number of thermal conducting pads was varied from 0 to 32. The rails were equally distributed and the distance between each pad was calculated by dividing 1 cm with the number of rails. The thickness of the top-cap silicon wafer was fixed at 1 mm. A 10 mm x 2 mm x 150 micron vapor plenum was provided on each side of the rails

(refer Fig. 3.19). The maximum top-cap temperatures are plotted here vs. number of rails attached as heat conduction pads (refer Fig. 3.26). Design with no rails produced a 35.6oC

temperature difference across the top-cap, 9 thermal conduction pads resulted in 17oC

and 32 thermal conduction pads resulted in 11oC. Here it is evident that having no rails

creates high top-cap temperatures. Using this graph it was decided to have 32 rails in the

fabricated top-cap for the NASA project. This design would produce 11oC temperature

drop across the top-cap.

105 120

115

110

105

100 Temp

95

90

85

80 0 5 10 15 20 25 30 35 No of Rails

Fig. 3. 26: Top-cap temperature vs. no. of rails included in the top-cap.

The results of the 32 thermal conduction pad design is shown for a better

understanding here. Temperature and heat flux in a top-cap with 32 rails is shown in the following three figures (Fig. 3.27-3.29). Most of the heat flux is concentrated at the center of the wick. This indicates that if we use rails most of the heat will be at the center of the wick. The author believes that top-cap with thermal conducting pathways will be more efficient in keeping more number of pores active for evaporation. One other conclusion is that the heat flux distribution is very much dependent on the configuration of the heater. In Fig. 3.28 the heat flux distribution is very much similar to the shape of the heater. Hence, it is also important to consider, the design of a proper heating source for such experiments.

106

Fig. 3. 27: Temperature distribution of the top-cap with 32 rails.

Fig. 3. 28: Heat flux profile with 32 rails (in W/m2). Top view of the evaporator package.

107

Fig. 3. 29: Heat flux profile with 32 rails (in W/m2). Front view of the evaporator package.

3.9 ANSYS thermal model with blanket heater

A separate ANSYS thermal model was developed to visualize the effects of the

configuration of the heater. In this model, heat flux was applied on top of the entire top-

cap (refer Fig. 3.9). A lower heat flux was applied at 25 W/cm2. A boundary condition of

80oC was given to the back of the simulated CPS silicon and all other surfaces being adiabatic. A 6.4oC temperature difference was observed from the hottest to the coolest

part of the top-cap. This when translated linearly to 84 W/cm2 heat flux would result in a

21.5oC temperature difference across the top-cap. The hottest part of the top-cap was at

the vapor plenums. This was due to the fact that, heat has to go around the plenum to

conduct into the bottom silicon wafer (refer Fig. 3.30). This model’s result combined

with the previous model’s result clearly indicates that it is very essential to design the

configuration of the heater.

108

Fig. 3. 30: Top-cap temperature distribution with blanket heat flux of 25 W/cm2.

3.10 Model with Evaporation at the non-contact regions of the CPS wick In all the above models, the evaporation was considered to be happening

uniformly on the backside of the simulated CPS wick with an area of 2.89 sq. cm. The heat has to travel across the top-cap and the simulated CPS wick to reach the evaporating surface. In reality, the evaporation happens at the top of the CPS wick, where the pores menisci are present. The total area of the CPS pores is 0.64 sq. cm. To get a closer understanding of the heat conduction, a new model was developed using these new constraints. Similar loads of 84 W/cm2 (25 W power) was applied to the heater and a

constraint of evaporation at 80oC was applied at the top the simulated CPS wick where

the pores are present (refer Fig. 3.31).

109 Top-cap

•Thermal conduction pathways •# of rails - 32 •Center to Center distance - 300 microns •Height -150 microns •Length – 1 cm •Angle – 54.74o •Footprint on CPS – 50 microns •CPS wick •Pore diameter – 5 microns •Pore pitch – 10 microns •# of pores per row between each pad – 20 •# of pores per column along the length- 1000 •CPS row width- 200 microns •CPS column width – 1 cm •Bonding space between CPS pores-100 microns

Fig. 3. 31: Dimensions of the top-cap and CPS wick.

The results obtained from this model were similar to the model with patterned heater. The heat flux was concentrated at the center of the wick. The main difference between these two models is the reduction of top-cap maximum temperature to 86.9oC

(refer Fig. 2.32) compared to the previous model, which showed 90.7oC. This decrease in maximum temperature of the top-cap is attributed to the reduction in the length of the path of heat transfer. The evaporating surface is much closer and concentrated at the center of the CPS wick. This was achieved by an increase in maximum heat flux from

267 W/cm2 in the previous model to 322 W/cm2 in this model (refer Fig. 2.33). This is expected due to the fact that the evaporating surface area has been reduced from 2.89 sq. cm to 0.64 sq. cm between the two models. A proof of heat being transferred through the

110 heat conducting pathways into the top of the CPS wick can be seen in heat flux result

(Fig. 3.34).

Fig. 3. 32: Temperature distribution (oC) on the top-cap with evaporation simulated on top of the CPS wick.

Fig. 3. 33: Thermal flux (W/m2) across the cross-section of the rails.

111

Fig. 3. 34: Proof of heat transport to the top of the CPS wick. The bending of the heat flux lines at the top of the CPS wick gives the direction of heat transfer.

3.11 Quartz wool as the primary wick model A new approach was undertaken to see the performance of quartz wool as a

primary wicking material. Quartz wool is a silicon dioxide fiber interwoven with a

distribution of pores. Unlike CPS which has coherent pores in a unidirectional way,

quartz wool has nominal diameters and the pores are interconnected. The average quartz wool fiber diameter used in our experiments was 9 µm. This quartz wool had excellent

porosity in excess of 90% [3.1]. In a CPS wick with a 5 µm diameter and 10 µm spacing

would give a porosity of 25%. This high porosity of quartz wool would give very low

pressure drops across the wicking surface and therefore more mass flow rates can be

accommodated. This would result in higher heat load capability. The average pore

diameter was found to be around 40 µm for the quartz wool [3.1]. Compared to CPS

wick, the average pore diameters are 8 times larger in quartz wool and this will result in

112 lower capillary pressures. To overcome this problem, a one-way valve was incorporated in the liquid return line of the LHP. This would reduce the risk of burst through of the quartz wool due to pressure build-up in the vapor plenums of the top-cap. For more information on the packaging please refer to the dissertation of P. Medis [3.3]. One other problem of using quartz wool is the containment of the wool under the top-cap with good contact. For this a very fine copper mesh was used to encapsulate the quartz wool [3.3].

The dimensions of the top-cap remain the same as the previous models with 32 rails. A glass (Pyrex 7740) compensation chamber containing the quartz wool was attached to the top-cap. The dimensions of the compensation chamber are 17mmx17mmx8.5mm. A circular hole of 8.9 mm diameter is drilled in the center of the compensation chamber and quartz wool is inserted from the top-cap side to a depth of 5.5 mm and the bottom 3 mm was filled with water (refer Fig. 3.35).

Fig. 3. 35: Compensation chamber (purple) with quartz wool (light green) are shown. The foot print of the top-cap is also visible.

113 The thermal conductivity of silicon dioxide and water are very close (0.67

W/m/K). The steady state model assumes the quartz wool and water in the compensation

chamber to be of the same thermal conductivity. A heat flux of 134.45 W/cm2 was

applied (equivalent of 40 W) to the heater. The experiments were assumed to be

conducted at atmospheric pressure and therefore the evaporating temperature was

constrained at 100oC. The temperature constraint was applied on all areas where the rails

are touching the quartz wool. The author believes the evaporating surfaces are right under

the top-cap. A 12oC temperature difference was observed across the top-cap (refer Fig.

3.36). The hottest place of the top-cap was found to be on the legs of the heater. The heat input from this point has to travel across the top-cap in lateral direction before it reaches

the evaporating temperature. This is due to the fact that, some of the geometry of the

heater is out of the evaporating surfaces. The conclusion the author would like to draw

from this result is that the heater configuration must have minimum distance path to the

evaporating surfaces. If the customization of the heating source is not possible, then the

design of the evaporating surface has to be matched. The natural convection of air at

room temperature was not considered for this model. This is evident by the flux lines

turning in the compensation chamber back to the evaporating surface, which is at the interface between the top-cap and the compensation chamber (refer Fig. 3.37).

114

Fig. 3. 36: Top-cap temperature profile using quartz wool as the primary wicking material.

Fig. 3. 37: Evaporator package heat flux lines (W/m2).

115 A separate model was developed, where the above model was used with an added constraint of 45oC applied on the back side of the compensation chamber. This assumption was reached after experimentally constructing an evaporating package with the same dimensions and measuring the backside temperature at 40 W input power. The top-cap temperature difference was found to be 11.6oC instead of 12oC in the previous model. The main difference was found in the temperature distribution along the evaporating package (refer Fig. 2.38- Fig. 2.40). Figure 2.40 indicates that the flux lines are being modified to accommodate the 45oC constraint applied on the backside of the evaporator package.

Fig. 3. 38: Temperature profile of the evaporator package using the 45oC backside constraint.

116

Fig. 3. 39: Temperature profile of the evaporator package along the cross section perpendicular to the rails direction.

Fig. 3. 40: Heat flux (W/m2) lines of the evaporator package after the 45oC constraint on the backside of the compensation chamber.

A modification of the above mentioned model was investigated to include convective heat transfer to the surrounding from the evaporator package. The above

117 mentioned 45oC constraint on the back of the evaporator was obtained using the experimental results after building an evaporator package to the same dimensions. This assumption is only valid for 40W power for the unique design of the evaporator package mentioned earlier. The influence of room temperature is not also taken into account. To get a better picture of the heat flow in the evaporator package, a convective heat transfer coefficient has to be added to all surfaces that are exposed to the surrounding room temperature. One other modification was the evaporation surface definition. In the previous model, it was assumed that the evaporation is happening at the bottom of the rail. In this model, the evaporation is assumed to be taking place on the surface of the quartz wool, which is in between the thermal conduction pathways. The input power and the evaporating temperature are kept the same. A 15 W/m2/K convective heat transfer

coefficient (h) was applied to all surfaces exposed to room temperature of 25oC. The

value of h was determined from the range of 5 – 25 W/m2/K of the natural convective

heat transfer coefficient. The purpose of the study was to determine the right value of h to

match the experimental data present.

The maximum top-cap temperature increased from 110.6oC (previous model) to

111.7oC. There was no change in the maximum heat flux in the evaporator package. The

direction of heat flux changed both at the evaporation surface (Fig. 3.41) and around the

package of the evaporator (Fig. 3.42). The value of h was varied from 5 W/m2/K to 25

W/m2/K; the resulting temperatures from the model were compared with the

experimentally measured temperatures of the evaporator package. The value of h=25

W/m2/K gave the closest result of the modeling to the experimental data.

118

Fig. 3. 41: Heat flux lines bending from the thermal conduction pathway to reach the evaporating surface of quart wool.

Fig. 3. 42: Heat flux (W/m2) lines are bending to incorporate the convection of the package.

119 3.12 Distribution of heat into convection and evaporation

A new compensation chamber was made for the modeling and experiments. The

dimensions of the new compensation chamber are 50.8mmx50.8mmx8.5mm. A hole in

the center of the compensation chamber was drilled with diameter 9.58 mm. The

compensation chamber was topped with the top-cap with thermal conduction pathways at

the center and it was backed with a stainless steel plate of dimensions

50.8mmx50.8mmx1.93mm.

The power supplied to the heater has to either convect from the evaporator package or cause evaporation in a working fluid filled in the LHP (refer Eq. 3.1). The convection of the evaporator package can further be divided into convection from the top-cap and from the rest of the package (refer Eq. 3.2).

Qin = Qconv + Qevap (3.1)

Qconv = Qconv _ topcap + Qconv _ evap (3.2)

A dry test was experimentally performed with no working fluid in the LHP

evaporator package. At 4.73 W, the maximum temperature of the package was 109oC and

the minimum recorded was 36oC. The whole of the power has to go to convection from

the LHP. The temperatures of the vapor and liquid lines and the condenser were such

that, the convection from them can be neglected. An average value of h can be

determined from Eq. 3.3.

Q h = in (3.3) Aconv (Twall − T∞ )

It is difficult to determine the value of h experimentally of the evaporator

package, as an average wall temperature and the area are difficult to predict. An

120 analytical model was developed to simulate the dry test. The dimensions of the top-cap,

compensation chamber, quartz wool porosity and stainless steel backing plate were

accurately defined to match with the experimental counterpart. Several values of h in the

range of 5-25 W/m2K were modeled with the ambient temperature at 22oC. The modeled

temperatures matched closely with experimental values at a particular h value of 25

W/m2K. This led us to believe that the average convective heat transfer coefficient for future models can be safely assumed as 25 W/m2K.

In the simulated dry test model, the input power to the heater was 4.73W

(15.88W/m2). The value of h was 25 W/m2/K and ambient temperature was assumed to

be at 22oC. The thermal conductivity of stainless steel was taken as 16.3 W/m/K. Since,

this is a simulation of dry-test no evaporation constraints were applied to this model.

Table 3.1 summarizes the result from the data of the dry test (also refer to Fig. 3.43 for

temperature distribution).

TABLE 3. 1: RESULTS FROM SIMULATED MODEL OF THE DRY TEST Input Power 4.73 W Power that went to convection 4.73 W Power that went to evaporation 0 W Power that went to convection of top-cap 0.64 W Power that went to convection of the rest 4.09 W of the evaporator package Maximum temperature 109.1oC (109oC measured experimentally) Minimum temperature 36.6oC (36oC measured experimentally)

121

Fig. 3. 43: Temperature distribution in oC on evaporator package for simulated dry test at 4.73 W.

The model showed excellent similarity in results with the experimental data.

Therefore the value of h being 25 W/m2/K was confirmed. The division of power into convection and evaporation was done by calculating the convection from all exterior faces from the model.

Simulations of the wet test were performed with water as the working fluid in the

LHP. The values of h, ambient temperature were kept the same as in dry test. A 100oC evaporation constraint was applied to the surface on the quartz wool between the thermal conduction pathways. The input power to the heater was varied. The simulated values of the input power are 19.5W, 30.7W, 40W and 100W. The results of the simulations are summarized in the table 3.2 below. The input values of 19.5W and 30.7W were chosen due to the fact that, experimental data was available for these power levels for comparison

122 TABLE 3. 2: RESULTS FROM SIMULATED MODELS OF THE WET TESTS Input Power 19.5W 30.7W 40W 100W Power that went to 4.87W 4.95W 5W 5.39W convection Power that went to 14.63W 25.75W 35W 94.6W evaporation Power that went to 0.62W 0.63W 0.64W 0.7W convection of top- cap Power that went to 4.25W 4.32W 4.36W 4.69W convection of the rest of the evaporator package Maximum 106.5oC 110.4oC 113.6oC 134.2oC temperature Minimum 37.3oC 37.5oC 37.7oC 38.8oC temperature

For experimental setup of the LHP, refer to the dissertation of P. Medis [3.3]. Here a brief summary of the work is given. The setup for the test can be seen in Fig. 3.44. The result from the setup is summarized in table 3.3.

Fig. 3. 44: The experimental setup of the quartz wool as the primary wick LHP working without evacuation (from [3.3]).

123 TABLE 3. 3: EXPERIMENTAL DATA OF A CLOSED LHP (FROM [3.3]) Power Applied to the Heater Evaporation Energy Convection Energy Loss 19.51W 14.0W 5.51W 30.7W 23.5W 7.2W

In the simulation, we found that, as we gradually increase the input power from 0

W, initially most of the power goes to convection of the evaporator chamber. After a

certain power, where convection saturates (in our case 4.74W), most of the excess power

(99% of input power) applied goes into evaporation. At higher input powers due to

heating of the whole package (due to 1% of input power going to convection), the temperatures rises a little. This produces a little increase in the convection.

Predominantly, after the convection saturates, the heat applied goes to evaporation (refer

Fig. 3.45). The empirical equation for the amount going to evaporation is given below.

From Eqs. (3.1) and (3.4), the amount of power convecting from the package can be

calculated. The simulations also showed that the convection was dominated by the

compensation chamber. The convection of the top-cap was almost constant for various

power levels. Thus, it can be concluded that, if one has to reduce or increase convection,

the important design criterion would be scaling the compensation chamber.

Qevap ≈ 0 0W ≤ Qinput ≤ 4.74W (3.4) Qevap ≈ 0.99Qinput − 4.74 Qinput > 4.74W

124 100

90

Evaporation 80

70

60

50 Q (W)

40

30

20

10 Convection

0 020406080100120 Qinput (W)

Fig. 3. 45: Distribution of input power into evaporation and convection in the evaporator package.

For chip manufacturers the maximum operating temperature of a device is a

critical parameter for the life expectancy of the device. The top-cap temperature was

found to be directly proportional to the amount of power going into evaporation. Figure

3.46 shows a plot of top-cap maximum temperature versus the amount of power that went into evaporation. Here, the saturation temperature is considered as 100oC for water at one

atmosphere pressure. If the LHP is evacuated and filled with working fluid with non-

condensable gas, the total vapor pressure is the sum of the partial pressures of the water

and all the gases at that temperature. An elaborate filling station was completed at the

University of Cincinnati, which can provide working fluid with almost no non-

condensable gas in it [3.4]. This would drop the saturation temperature, corresponding to

the pressure in the loop and thus dropping the maximum temperature, a device would

reach. The evaporating temperature can also be changed by using different working

fluids, which evaporate at lower temperatures (eg. methanol). In our model, the thermal

125 resistance of the top-cap was 0.35 oC/W. This indicates a 0.35oC rise in top-cap temperature for every 1 W rise in evaporation power. If Tsat is the saturation temperature of the working fluid, then the maximum temperature (Tmax) for our device would be given by Eq. (3.5).

Tmax ≈ 0.35Qevap + Tsat ≈ 0.347Qinput + Tsat Qinput > 4.74W (3.5)

135

130

125

120 T maximum (oC) 115

110

105

100 0 102030405060708090100 Q evaporation (W)

Fig. 3. 46: Maximum temperature on the top-cap versus power that went into evaporation.

The package temperatures are important in material design for the evaporator.

This also helps to optimize the amount of heat going into convection and evaporation. In our device; the better the evaporation, the better the efficiency of cooling. The package temperatures were linearly proportional to the amount of power dissipated through convection (Fig. 3.47).

126 37.8

37.6

37.4

37.2

Tmin (oC) Tmin 37

36.8

36.6

36.4 4.7 4.75 4.8 4.85 4.9 4.95 5 5.05 Q convection (W)

Fig. 3. 47: Minimum package temperatures versus convective power.

3.13 Effect of the size of the compensation chamber It is useful to understand the size of the compensation chamber on the distribution of heat into convection and evaporation. It also is important to study, the effect on both device and package temperatures. The dimensions of the top-cap are

17mmx17mmx1mm. Three different compensation chambers were designed and their corresponding stainless steel plates. The thicknesses of these two are not changed, only the cross sectional area is increased. The dimensions of the hole in the compensation chamber, quartz wool etc. are not changed. Below table 3.4 provides a summary of the results from the simulated models.

127 TABLE 3. 4: EFFECT OF COMPENSATION CHAMBER SIZE Dimensions of 17mmx17mmx 50.8mmx50.8mmx 101.6mmx101.6mmx compensation 8.5mm 8.5mm 8.5mm chamber Input power 40W 40W 40W Power that went 2.19W 5W 6.19W to convection Power that went 37.81W 35W 33.81W to evaporation Power that went 0.67W 0.64W 0.64W to convection of top-cap Power that went 1.52W 4.36W 5.55W to convection of the rest of the evaporator package Maximum 113.8oC 113.6oC 113.6oC temperature Minimum 75.9oC 37.7oC 25oC temperature

As the size of the compensation chamber is increased the percentage of power

going into convection also increases. Higher convection results in lower evaporation

power and therefore a less efficient LHP. The maximum temperature of the top-cap is

independent of the size of the compensation chamber. This concludes that the top-cap

temperatures are more tied with the top-cap material thermal conductivity and the

distances between the heat sources to the evaporating surfaces. As these two mentioned

parameters are the same for all the three designs above, the maximum top-cap

temperature did not change. The size of the compensation chamber has a profound impact on the minimum temperatures of the package. The smaller the size of the compensation chamber, the higher its minimum temperature. This is an important criterion to be taken into account while designing the materials for the compensation chamber. As the device is made smaller, the whole evaporator package tends to reach uniform temperatures

128 throughout. As concluded earlier, the convection of the rest of the package dominated the convection of the top-cap.

3.14 Effect of heat spreaders The configuration of the heater always played a very important role in the distribution of the heat to the evaporator package. Ideally, the device has to operate independent of the configuration of the heater pattern. Microelectronic devices do not produce heat uniformly; hence this non-uniformity has to be addressed to make efficient

LHPs. A thermal spreader is routinely used on all microelectronic chips to address this problem. The thickness of the thermal spreader and its material design are very important for effective ways to remove heat. In the previous model, at 40W of input power there was a 19oC temperature variation on the top-cap. The temperature varied from 94.6oC to

113.6oC (refer Fig. 3.48). Chip manufacturers would like to see the temperature range to be minimum. A copper thermal spreader was used for the modeling on top of the top-cap.

The design of the thickness of the thermal spreader is important. As the thickness increases, the effectiveness of the thermal spreading increases and therefore lower top- cap temperatures result. The disadvantage of increasing thickness beyond an optimum value is that there will be a temperature drop across the thermal spreader owing to a finite thermal conductivity of the material. This would result in higher chip temperatures. The purpose of this study is finding the optimum thickness of the thermal spreader to reduce the variation in the top-cap temperatures. A model was developed to see the effect of a copper thermal spreader with dimensions (10mmx10mmx0.5mm) at 40W. The thermal conductivity of copper was taken as 395W/m/K. The resulting range of temperatures was from 97.3oC to 111oC. The difference reduced from 19oC to 13.7oC.

129

Fig. 3. 48: Temperature profile of the top-cap with no thermal spreader. A 20oC variation can be observed.

To optimize the thickness of the copper thermal spreader, a 100W input power was modeled. Three different thicknesses (0.1mm, 0.5mm and 2mm) were modeled. The maximum top-cap temperatures obtained from these models were plotted and curve fitted

(refer table 3.5 and Fig. 3.49). The optimum value obtained was 0.115 mm and the corresponding maximum top-cap temperature for 100W input power is 127.2oC.

TABLE 3. 5: MAXIMUM TOP-CAP TEMPERATURES FOR VARIOUS THICKNESS OF CU HEAT SPREADERS

Thickness of Cu 0.1mm 0.5mm 2mm thermal spreader Power input 100W 100W 100W Maximum top-cap 133.6oC 129.6oC 131.4oC temperature

130 134 133.6

133

132

131.4 131

130 129.6 Tmax (oC)

129

128

127

126 0 500 1000 1500 2000 Tmax vs. thickness of t Thickness of the Thermal spreader in microns

Fig. 3. 49: Maximum top-cap temperature vs. thickness of the copper thermal spreader for 100 W of input power.

3.15 Effect of top-cap & evaporating surface dimensions In all the previous models, a circular hole was drilled in the compensation chamber. The geometry of the top-cap is a square. To match the top-cap with the primary

wick in the drilled compensation chamber, significant amount of the top-cap is not used.

This would increase the temperatures of the top-cap due to the increase in the effective

length between the heat source and the evaporating surfaces (refer Fig. 3.50(a)).

A new micro-processing tool was developed by P. Medis [3.3], known as

Ultrasonic Impact Grinding (UIG). Using this tool, it was possible to make square holes

in glass (refer Fig. 3.50(b)). The concept and working of UIG is described in the

dissertation of P. Medis [3.3].

131 a) b)

Fig. 3. 50: a) Compensation chamber drilled with circular drill bit. Imprint of top-cap shows that the area of evaporating surface inside the hole is not completely matching the top-cap b) Square hole drilled using UIG has exact matching of the evaporating surfaces to the top-cap.

A new top-cap was modeled with 10 thermal conduction pathways (refer Fig.

3.51). This number was deduced from the Fig. 3.26, where the maximum top-cap

temperature difference between 10 thermal conduction pathways and 32 thermal

conduction pathways (Fig. 3.19) was observed to be small. By reducing the number of

thermal conduction pathways, the width of the vapor channels between them is increased.

A larger width vapor channel produces lower pressure drop, thereby allowing more mass flow rate and input power into the device. To keep the total foot print of the top-cap area

the same, the width of the thermal conduction pathways was increased from 50 µm to

160 µm. The area of evaporation between the thermal conducting pathways increased

from 250 µm to 840 µm. The area of the foot print of previous and the present top-caps is

16 mm2. One other big advantage of this configuration is the ability to bond this top-cap to the matching CPS wick. Previous with 50 µm width rails, the issue of uniformity of

bonding was a big concern. With the new model, the width has been scaled by 3 making

the bonding to the CPS wick easier.

132

Fig. 3. 51: New top-cap with 10 thermal conduction pathways with 160 µm rail width.

The evaporating temperature of 100oC was applied to the quartz wool in between

the thermal conduction pathways. An input of 100W was applied for both the models,

with h value of 25 W/m2/K and ambient temperature of 22oC. The outer dimensions of

the compensation chamber and the stainless steel backing plate are not changed. A 1000

µm copper thermal spreader is placed on the top of the top-cap for better heat distribution from the heater to the top-cap. The maximum top-cap temperature for the circular hole was 135oC, while that of the square hole was 128.6oC. This 6.4oC temperature difference

between the two models suggests strongly matching the top-cap dimensions and the

evaporating surfaces dimensions.

3.16 Predictions for higher input power Table 3.6 summarizes the data obtained from the above models. There are several interesting conclusions that can be drawn from them. The maximum temperature of the top-cap (Tmax) was found to be linearly proportional to the power that went into evaporation (Qevap). The minimum temperature of the package (Tmin) was found to be linearly proportional to the amount of heat that went to convection (Qconv). As the input

power is increased from 0, the initial amount of energy goes in the heating of the package

133 and therefore into convection. After the convection saturates, 99% of the heat is observed

to be going into evaporation. Convection from the rest of the package (Qconv RP)

dominated the amount of heat that went into convection (Qconv). Based upon the

following data obtained from the model, extrapolations were made to the relationships

found as described above. Table 3.7 shows the authors predictions from these

extrapolations for higher input power.

TABLE 3. 6: SUMMARY OF DATA OF THE MODELS

Dimensions of Thickness of # of rails Type Qin (W) Qconv (W) Qconv TP Qconv Qevap Tmin Tmax Compensation Thermal spreader in top-cap (W) RP (W) (W) (oC) (oC) Chamber(mm) (µm) 50.8x50.8x8.5 0 32 Dry Test 4.73 4.73 0.64 4.09 0 36.6 109.1 50.8x50.8x8.5 0 32 Wet Test 19.5 4.87 0.62 4.25 14.63 37.3 106.5 50.8x50.8x8.5 0 32 Wet Test 30.7 4.95 0.63 4.32 25.75 37.5 110.4 50.8x50.8x8.5 0 32 Wet Test 40 5 0.64 4.36 35 37.7 113.6 50.8x50.8x8.5 0 32 Wet Test 100 5.39 0.7 4.69 94.6 38.8 134.2 101.6x101.6x8.5 0 32 Wet Test 40 6.19 0.64 5.55 33.81 25 113.6 17x17x8.5 0 32 Wet Test 40 2.19 0.67 1.52 37.81 75.9 113.8 50.8x50.8x8.5 100 32 Wet Test 100 5.9 0.75 5.15 94.1 38.7 133.6 50.8x50.8x8.5 500 32 Wet Test 100 5.76 0.38 5.38 94.24 39.4 129.6 50.8x50.8x8.5 2000 32 Wet Test 100 6.11 0.55 5.56 93.9 40 131.4 50.8x50.8x8.5 500 32 Wet Test 40 5.08 0.33 4.75 34.9 38.9 112.2 50.8x50.8x8.5 1000 10 Wet Test 100 40.6 134.9 (circular hole) 50.8x50.8x8.5 1000 10 Wet Test 100 38.9 128.6 (square hole)

TABLE 3. 7:PROJECTIONS FOR HIGHER INPUT POWER TO THE LHP

Projections for water as a working fluid in a LHP device at one atmosphere pressure Qin (W) Qconv (W) Qconv TP (W) Qconv RP (W) Qevap (W) Tmin (oC) Tmax (oC) 50 5.07 0.65 4.42 44.93 38.0 117.4 60 5.13 0.66 4.47 54.87 38.3 120.8 70 5.19 0.67 4.53 64.81 38.5 124.2 80 5.26 0.68 4.58 74.74 38.8 127.6 90 5.32 0.69 4.63 84.68 39.0 131.0 100 5.39 0.70 4.69 94.61 39.3 134.4 110 5.45 0.71 4.74 104.55 39.5 137.8 120 5.51 0.72 4.80 114.49 39.8 141.2 130 5.58 0.73 4.85 124.42 40.1 144.7 140 5.64 0.74 4.90 134.36 40.3 148.1 150 5.71 0.75 4.96 144.29 40.6 151.5 160 5.77 0.76 5.01 154.23 40.8 154.9 170 5.83 0.77 5.07 164.17 41.1 158.3 180 5.90 0.78 5.12 174.10 41.3 161.7 190 5.96 0.79 5.17 184.04 41.6 165.1

134 200 6.03 0.80 5.23 193.97 41.9 168.5 210 6.09 0.81 5.28 203.91 42.1 171.9 220 6.15 0.82 5.34 213.85 42.4 175.4 230 6.22 0.83 5.39 223.78 42.6 178.8 240 6.28 0.84 5.44 233.72 42.9 182.2 250 6.35 0.85 5.50 243.65 43.1 185.6 260 6.41 0.86 5.55 253.59 43.4 189.0 270 6.47 0.87 5.61 263.53 43.7 192.4 280 6.54 0.88 5.66 273.46 43.9 195.8 290 6.60 0.89 5.71 283.40 44.2 199.2 300 6.67 0.90 5.77 293.33 44.4 202.6

3.17 NASA Project: gravity-fed compensation chamber model A new compensation chamber was suggested for the NASA project, here at the

University of Cincinnati. This new compensation chamber would use gravity to keep the primary wick always wetted. This mechanism will ensure a reliable operation and safe start-up. The details of the gravity fed compensation chamber can be obtained from the dissertation of J. Suh [3.5] & P. Medis [3.3]. The details of the compensation chamber are given in Fig. 3.52, Fig. 3.53 and tables 3.8 and 3.9. The top-cap, CPS wick package is placed on the top of the small hole (dimension (c) shown in Fig. 3.52). Quartz wool which acts like a secondary wick is placed in the smaller diameter whole with a stainless steel mesh as a holder. The bigger hole (dimension (b)) has a stainless steel backing plate and has liquid return line from the condenser. These dimensions were accurately taken into, while simulating the thermal model.

135

Fig. 3. 52: Glass compensation chamber, (a) cross section, (b) viewed from back side (From [3.3]).

TABLE 3. 8: DIMENSIONS OF THE COMPENSATION CHAMBER (FROM [3.3])

Section letter Dimension(mm) a ~50.8 b 22.7 c 9.58 d 15.34 e 10.0 f 5.34

TABLE 3. 9: VOLUME OF THE COMPENSATION CHAMBER (FROM [3.3]) Description Calculated Volume (cc) Measured Volume (cc) Smaller cavity 0.384 0.47 Larger cavity 4.047 4.14 Total 4.431 4.61

136

Fig. 3. 53: Rendering of the compensation chamber to the exact dimensions for modeling.

A 40W input power was given to the heater in the model. The model assumed one atmospheric pressure and therefore 100oC evaporation constraints were laid. Due to the gravity affect and the fill quantity, it was calculated that only half of the bigger cylindrical volume is occupied by water and the rest by water vapor. Convective heat transfer coefficient constraints were applied to all the surfaces exposed to ambient. The result was a 109.9oC maximum temperature on the top-cap and minimum of 32.8oC was observed at the backside of the compensation chamber (Fig. 3.54). A maximum heat flux of 481W/cm2 was also observed (Fig. 3.55).

137

Fig. 3. 54: Temperature profile of the evaporator package using gravity fed compensation chamber.

Fig. 3. 55: Heat flux (W/m2) distribution of the evaporator package using gravity fed compensation chamber.

138 3.18 Flow modeling of pressure drop in a trapezoidal rail design

Understanding the pressure drop in the top-cap of an evaporator package in the

LHP helps to calculate the total pressure loss in the loop. This total pressure has to be less

than the capillary pressure of the primary wick at the evaporating temperature of the

working fluid. An initial attempt was made by P. Arragattu [3.2], where a piece-wise

approximation is done. Arragattu divided the top-cap vapor path into two sections, one in

the vapor channels and one in the vapor plenum. This model does not account for

pressure losses caused due to turning of vapor from one section to another. For a better

understanding of the pressure losses in the top-cap (including the losses due to turning) a

Computation Fluid Dynamics (CFD) model was developed. Due to the symmetry in the

top-cap in both X and Y planes, it is sufficient to model half the number of rails (16 out

of 32) and also model half the length of the rail, as the top-cap has two vapor ports. Half

the vapor in the vapor plenum travels to one vapor port and the other half flows to the

other exit port. Hence the model considers only one quarter of the top-cap (Refer Fig.

3.56).

The pressure drop can be divided into two separate pressure drops, one in space between the thermal conducting pathways and the other in the vapor plenum, where the vapor is exiting. Modeling was performed with 25 W of power applied to the top-cap in

Fluent (Flow Simulation Software).

139

Fig. 3. 56: Schematic of the top-cap with 32 rails. The yellow region was considered for modeling. . From the total input power (Q), the mass flow rate ( m ) of the vapor generated

was calculated using Eq. 3.6, given area of cross section of evaporation and latent heat of

. . vaporization (hfg). The resulting m was distributed among all rails to calculate the m rail

of each rail. This when divided by 2 would give the mass flow rate from half a rail

. ( m rail/2). Since, vapor is generated throughout the rail and the model was a “flow in a pipe” model, some kind of approximation was needed. The model is approximated as half of the mass flow rate is traveling the whole distance of the half rail. The dimensions of the trapezoidal vapor channel are 250 µm bottom width, 150 µm height and 54.74o

sidewalls. The length of the half rail is 5mm. The modeling results of pressure drop and

velocities in a single rail are given below. The flow was simulated such that it enters the

rail at one end and leaves the rail at the other. The model showed fluid velocities up to 10

m/sec (Fig. 3.57) and pressure drop of 805 Pa. (Fig. 3.58) per half rail. In this model the

pressure drop in the plenum is not accounted.

140 . Q m = (3.5) h fg A

Fig. 3. 57: Velocity profile in a single rail.

Fig. 3. 58: Pressure drop in a single rail.

A complete top-cap flow simulation was performed using flow originating from the porous region in the wick structure and escaping out from the vapor exit port. The model showed velocities up to 15 m/sec and pressure drop of 1030 Pa. These numbers

141 indicate that the top-cap is well below the 2500 Pa. limit set for an optimal design. One interesting observation was the formation of flow vortex in the exit port. This was indicated by negative pressures from the model. This model more accurately depicts the flow rotation from the evaporating surface to the vapor channels to the vapor plenum and to the exit port of the evaporator package.

Fig. 3. 59: Velocity profile of the top-cap with 16 half rails.

Fig. 3. 60: Pressure contour of the top-cap with 16 half rails.

142 3.19 Fabrication of top-cap Two inch diameter (100) silicon was used for top-cap fabrication. The thickness of the wafer was chosen to be one inch. After measuring the thickness of the wafer, RCA cleaning procedure is undertaken (Appendix A). The cleaning step is always performed before a high temperature process. Either silicon dioxide or silicon nitride can be used as

an etching mask. Silicon dioxide can be thermally grown in a furnace around 1050oC or it

can be deposited using a Low Pressure Chemical Vapor Deposition (LPCVD) at a lower

temperature using silane and oxygen as the precursor gases. Silicon dioxide films grown

using LPCVD have higher etch rates than thermally grown silicon dioxide films in

anisotropic etchants; namely potassium hydroxide (KOH), Ethylene Diamine

Pyrocatechol (EDP). It is highly desirable to thermally grow silicon dioxide. Thermal

oxidation is performed either in dry mode or wet mode. In dry mode, oxygen is pumped

into the furnace, which reacts with silicon wafers inside to form silicon dioxide. In wet

mode, oxygen is passed through a bubbler which contains de-ionized (DI) water at

around 90oC. The water vapor and oxygen mixture is passed into the furnace. Wet

oxidation or silicon dioxide grown in wet mode has a faster oxidation rate than in dry

oxide or silicon dioxide grown in dry mode. If thin silicon dioxide thickness (around

0.1µm) is required dry oxide produces the best films. If thicker oxides are needed (up to 2

µm), wet oxidation is used. For any thickness beyond 2 µm CVD silicon dioxide growth

techniques are typically used. Due to diffusion properties of oxygen in silicon, the silicon

dioxide growth is both into (46%) and out (54%) of the silicon initial surface (refer Fig.

3.61).

143 Initial Silicon Surface 54% of t SiO2 t 46% of t

Silicon

Fig. 3. 61: Growth of silicon dioxide on silicon.

Silicon has a 31µm/h etch rate in 45 wt% KOH at 70oC. The anisotropic etchant

etches silicon dioxide at a rate of 163 nm/h. To etch a groove of 150 µm depth,

approximately it takes 5 hours. To design a silicon dioxide mask for KOH etching, the

thickness has to be a minimum of 0.8µm. Silicon has a 24 µm/h etch rate in EDP at 95oC.

The anisotropic etchant etches silicon dioxide at a rate of 15 nm/h. To etch a groove of

150 µm depth, approximately it takes 6.25 hours. To design a silicon dioxide mask for

EDP etching, the thickness has to be a minimum of 0.1µm. An alternative to growing

thick silicon dioxide is to use silicon nitride as an etch mask. Anisotropic etchants do not

etch silicon nitride. In our experiments both silicon dioxide and silicon nitride were used

as masking layers on separate silicon wafers. Minimizing pin holes in silicon nitride film

was a challenge in our experiments. Furnace tubes have to be frequently cleaned. All

vacuum fittings have to be checked for optimal operation. The silicon nitride film is

grown in a partially evacuated furnace tube at 770oC. The operating pressure is

maintained at around 300 torr. Dichloro silane and ammonia are the pre-cursor gases for

the reaction. The product of the reaction ammonium chloride deposits on the furnace

walls. This is the major culprit for the pin holes produced in silicon nitride films. For

more information please refer to the dissertation of A. Shuja [3.4]. The deposition rates of

silicon nitride are around 2.8 nm/min.

144 After the deposition, solvent cleaning and photo-lithography are performed to make the rail windows in silicon dioxide or silicon nitride. After the lithography step, the wafer is protected on the non-lithography side using wax. For silicon dioxide, Buffered

Oxide Etchant (BOE) is used to etch the silicon dioxide. The BOE etchant is a mixture of

Hydro Fluoric acid (HF) and Ammonium Fluoride (NH4F). The etch rates at room temperature was found to be around 0.1 µm/min. The use of BOE instead of HF to etch silicon dioxide is due to the fact that photoresists (P.R.) films are less passive to HF. To use photoresist (Shipley 1818 in our case) as a masking layer, BOE is preferred. For etching silicon nitride films, Reactive Ion Etching (RIE) scheme was used. Carbon tetra fluoride (CF4) and oxygen are the pre-cursor gases, the etching was done in partial vacuum around 60 torr using a 13.45 MHz microwave source at 100W power. The etch rate was recorded around 2.27 nm/sec. After the mask etching process, the wafers are solvent cleaned to remove P.R. and wax.

The next step is to etch the silicon using anisotropic etchants such as KOH or

EDP. The composition for EDP is as follows: Ethylene Diamine- 200 ml, Pyrocatechol-

32 g, Pyrazine- 1.4g and D.I. water- 26 ml. The anisotropic etching was done at the appropriate temperatures as mentioned above. A reflux condenser was used to keep the composition of the solutions same. A magnetic stirrer was used to keep the etch rates of the solution uniform. One optional step can be performed at this stage. If pin-holes in the masking layer can compromise the resistance of the heater that is deposited in the next step. The passivation layer is etched away and a 0.1 µm of dry thermal oxide is grown.

Dry thermal silicon dioxide produces films that are almost pin-hole free and will provide very good electrical insulation.

145 The next step in the top-cap fabrication can vary depending upon whether the heater thin-film is deposited in a lift-off procedure or using a direct etching procedure. In the lift-off procedure, the next step is photolithography on the backside surface of the etched grooves. Alignment marks are present on the surface that has grooves. These marks are aligned in Infra-Red (IR) light source with the alignment marks of the mask.

Silicon is transparent to IR light, making the alignment possible. The mask of the heater contains a heater pattern, two metal pads for attaching copper or stainless steel tubes to the exit ports and a Resistance Temperature Detector (RTD) to measure temperature of the top-cap in LHP testing. Please refer to Appendix B for more information on heater design. The wafers are dipped in chlorobenzene for 90 seconds between the exposure to

UV step and developing step of the P.R. The purpose of the chlorobenzene dip step is to make the top surface of the P.R. harder to form trapezoidal sidewalls in P.R. The developer under etches the P.R. This would help to avoid any cross-linking of the metal in the evaporation stage (refer Fig. 3.62). After the development of P.R., the step is metal evaporation. A 50 nm chromium is evaporated as an adhesion layer and 200 nm of nickel film evaporated. A solvent clean will lift-off the metal with P.R. leaving the negative pattern of the P.R. as metal on the surface. If etching of metal procedure is used instead of lift-off procedure, before depositing metal, alignment marks have to be placed on the surface that have the heater. Infra-Red (IR) can not be used, as it is not transparent through the metal. The alignment marks can be placed by several techniques, one of the techniques used in this work is to use the same mask for the rails and do lithography on the other surface. Since, no metal has been deposited yet, I.R. can be used for alignment.

A Ultra Violet (U.V.) blocking tape is used to block U.V. in the rails. This would allow

146 only the alignment marks to be transferred to the surface. After this lithography, metal is

deposited. A solvent clean will liftoff metal at the alignment marks making them visible

for alignment with the etching mask. Lithography is performed with the etching mask.

Nickel etchants (30 % Ferric chloride) and chromium etchants are used to etch the metal

from the surface, leaving the heater, RTD and bonding pads (refer Fig. 3.63).

P.R.

Silicon Silicon

Metal evaporation

P.R.

Silicon Silicon

Liftoff with Acetone

Silicon Silicon

Without chlorobenzene dip With chlorobenzene dip

Fig. 3. 62: Liftoff process with and without chlorobenzene. Cross-linking of metal lines is possible, when chlorobenzene dip is not used. With chlorobenzene dip metal lines have no cross-linkage enabling a clean liftoff.

147 a) b)

Fig. 3. 63: a) Top-cap with heater pattern in a spiral shape, two bond pads with holes drilled in them for vapor exit, a RTD (thin metal line with two bond pads) can be seen. b) 32 rails top-cap fabricated using silicon nitride as a masking layer. The depth of the vapor plenum is 150 µm.

3.20 Comparison of KOH and EDP etching for top-cap

Both KOH and EDP were investigated in this work for etching of the top-cap. The

advantages of using KOH is its faster etch rate of silicon at the same temperature over

EDP, and its high selectivity between (100) and (111) etching planes, around 400:1. The

advantages of using EDP are its smoothness of the etched surface compared to KOH

etching (fig. 3.64) and its greater selectivity to SiO2 (150 µm silicon etching required

only 0.1 µm of SiO2 in EDP, compared to 0.8 µm of SiO2 in KOH). EDP has a selectivity

of 35:1 between (100) and (111) surfaces [3.6]. The width of the rail was designed to be

50 µm and it remained 50 µm with KOH etching. Using EDP, as the etchant, the rail was

undercut and was reduced to around 30 microns. The calculated selectivity of EDP to

(100) to (111) is 10:1. To get a smooth surface and to get 50 µm final structure, EDP

etchant is recommended with an initial width of 65 µm.

148 a) b) Fig. 3. 64: a) Smooth surfaces etched with EDP. b) Rough surfaces in silicon after KOH etching.

3.21 Convex corner etching

The thermal conducting pathways, requires a mask of rectangular islands. In

anisotropic etchants of silicon, each rectangle forms 4 convex corners. These convex

corners get undercut by fast etching planes of {311} and {411} [3.7]. The undercutting of

the convex corners produces a profile at the intersection of the rails and the vapor

plenum, which enables smooth turning of the vapor from the vapor channel between the rails to the vapor plenum (Fig. 3.65). The author believes that this profile will reduce the pressure losses involved in turning of the vapor.

149

Fig. 3. 65: SEM image at the end of the thermal conducting pathways. Undercutting of the convex corners left a smooth turning profile for the vapor from the channels to the plenum.

3.22 References

[3.1] P. Medis, S. Parimi, A.Shuja, J. Suh, P. Ponugoti, K. Ogirala, “Proof of Concept LHP”, Final Report 2005, NASA Contract # NNC04CB44C, University of Cincinnati. [3.2] P. Arragattu, “Optimal Solutions for Pressure Loss Through the Top Cap of the Evaporator of a Micro Loop Heat Pipe”, M.S. Thesis, University of Cincinnati, Cincinnati, OH, 2005. [3.3] P. Medis, “Development of Microfluidic Packaging Strategies, with Emphasis on the Development of a MEMS Based Micro Loop Heat Pipe”, Ph.D. dissertation, University of Cincinnati, Cincinnati, OH, 2005. [3.4] A. Shuja, “Development of Materials and Processing for Realization of a MEMS Based Loop Heat Pipe”, Ph.D. dissertation (in progress), University of Cincinnati, Cincinnati OH 2006. [3.5] J. Suh, “Proof of Operation in a Planar Loop Heat Pipe (LHP) Based on CPS Wick”, Ph.D. dissertation, University of Cincinnati, Cincinnati, OH 2005. [3.6] G. T. Kovacs, “Micromachined Transducers SourceBook”, McGraw-Hill Science/Engineering/Math, Feb. 1998. [3.7] X. Li, M. Bao, S. Shen, “Maskless etching of three-dimensional silicon structures in KOH”, Sensors and Actuators, A: Physical. Vol. 57, no. 1, pp. 47-52. 1996.

150 Chapter 4 Packaging, Automation and Testing of LHP

4.1 Components of 5th generation evaporator package The evaporator package consists of top-cap, CPS primary wick, quartz wool

secondary wick, stainless steel mesh to hold the secondary wick, compensation chamber,

stainless steel back plate, gasket to seal the stainless steel back plate to the compensation

chamber, two vapor transport lines, one liquid return line and one evacuation/working

fluid filling port. Six thermocouples and a pressure sensor are used to record temperatures

and pressures respectively.

4.1.1 Top-cap The functionary of a top-cap in an evaporator package is to seal the CPS primary wick. It also helps in providing heat to the evaporating surface uniformly. Uniform distribution of heat helps to reduce nucleate boiling on the backside of the primary wick

and will enable more percentage of CPS pores to be active in evaporation. The design and

fabrication of the top-cap is discussed in the previous chapter. The top-cap used in this

generation device has 32 thermal conduction pathways etched using anisotropic etchant

(EDP). The depth of the vapor channel is 150 µm, the width of the pad touching the CPS

primary wick is 50 µm. The pitch between two thermal conduction pathways is 300µm.

The length of the rail is 1 cm. The side walls have a 54.74oC tapering due to anisotropic

etchants slowing down at {111} planes of silicon, which have a 54.74oC angle to (100)

plane of silicon. The conduction path cross-section looks like a trapezoid. The fabrication

of the top-cap is achieved in a 2” silicon wafer. Four top-caps would be etched

151 simultaneously. The bonding of top-cap to the CPS wick was found to be more efficient, when it is done at the wafer level than at the individual 1 sq. cm. level. The top-cap also has two vapor plenums on each end of the vapor channels. This plenum helps to collect the vapor from the vapor channels and guide it to the exit port drilled through the top-cap at the center of the plenum. The plenum has the same depth as the vapor channels, the width of the plenum is 2 mm and the length is 1cm. The diameter of the exit port drilled at the center of the plenum is around 1 mm. Computational fluid dynamics model of the top-cap is presented in the previous chapter.

Top-cap on the front side has a lithographically patterned thin-film heater. A 50 nm Cr adhesion layer is topped by 200 nm Ni. Liftoff lithography techniques are used to pattern heater on the Si surface. Sufficient care has to be taken to make sure no pin-holes are present in the silicon dioxide layer underneath the heater pattern. Pin-holes can short the heater pattern, thereby reducing the resistance of it. The target resistance of the top- cap heater was 25 Ω. An annealing process is required after the evaporation at 350oC for

30 minutes to stabilize the resistance of the heater. Along with the heater pattern, a RTD and two bond pads are also lithographically placed on the wafer. A RTD is a thin metal wire, whose resistance changes with temperature. By calibrating and measuring resistance, temperature can be sensed of the top-cap (Fig. 4.1). Alignment marks are placed on both the top side and the bottom side of the top-cap. This enables not only to align features on the top and the bottom side of the top-cap but also to the CPS patterned wick.

152 a) b) Fig. 4. 1: a) Four silicon top-caps on a 2” wafer with heaters, RTDs and bond pads (top side). b) Four silicon top-caps with rails and vapor plenums (bottom side).

4.1.2 Patterned CPS wick To avoid nucleate boiling on the backside, it was desired to have thermal

conduction pathways not to cover any CPS pores. For this, the CPS wick has to be

patterned such that no pores are present at the feet of the thermal conduction pathways.

After considerable amount of research on material selection, electrolyte selection, pre and

post processing modifications, a patterned CPS wick was produced. Please refer to the

first chapter of this dissertation for more information on patterning. In this generation

device, polysilicon was chosen as the HF passivating film. Etch pits initiation was

performed with RIE. The final CPS structure that resulted had meso-pores

interpenetrating the CPS pores. This enabled cross-permeation between pores. The

smaller the diameter of the CPS pore, the larger is its capillary pressure. Higher capillary

pressures in a LHP would result in higher heat transfer rates from the evaporator to the

condenser. Below, SEM image of the polysilicon patterned CPS wick can be seen. The

thickness of the wick is around 250 µm. The width of the CPS pores between the thermal

conduction pathways is 200 µm. To tolerate alignment errors a total of 100 µm of non-

porous pattern width is present on the CPS wick. The fabrication of the CPS wick is

153 presented in chapter 1. After CPS etching, not all pores are etched through. To open the capillaries of all the CPS pores, backside silicon has to be removed. The post processing of the CPS wick is performed using Chemical Mechanical Polishing (CMP) to remove backside silicon.

Fig. 4. 2: Patterned CPS wick shown here. The pores are cross-permeated.

4.1.3 Compensation chamber The compensation chamber is primarily used as a liquid reservoir in an evaporator package of a LHP. In this generation device, the compensation chamber was designed to help any vapor on the backside of the primary wick to escape into a vapor space provided. This helps to delay the onset of nucleate boiling. Figure 4.3 shows a picture of the compensation chamber for this generation device. Borosilicate 7740 glass was used as the base material to build a compensation chamber. This particular glass has the CTE very similar to that of Si. This helps to reduce any stresses formed due to temperature cycling of the evaporator package in LHP testing. The dimensions of the compensation

154 chamber are 50.8x50.8x15.3mm. A circular hole of diameter around 1 cm was drilled.

This cavity will hold the secondary wick and a top-cap with the CPS wick will be capped on one side. A second hole of diameter 22.7 mm was drilled to a depth of 1 cm. This cavity will act as a liquid reservoir and a small vapor space is provided on top the liquid to accumulate any vapor on the backside of the primary wick. The volume of the vapor space in the compensation chamber is determined by the working fluid fill quantity. A stainless steel backing plate is attached to seal the larger cavity of the compensation chamber with rubber gaskets and nylon screws. The stainless steel tube has two ports, to which stainless steel tubing are soldered. One tube is used as a liquid return line from the condenser, while the other is used as an evacuation/filling the working fluid port. A stainless steel mesh is used as a retainer of quart wool in the smaller cavity of the compensation chamber.

Fig. 4. 3: Compensation chamber with two diameter holes.

4.2 Packaging the evaporator

4.2.1 Bonding top-cap to patterned CPS Many bonding schemes were experimented to bond the top-cap to the patterned

CPS wick. Bonding silicon to silicon can be achieved using fusion bonding scheme,

155 where the wafers are heated to around 1000oC with pressure applied. Due to the presence of metal on the top-cap fusion bonding could not be implemented. Anodic bonding method, where the bond temperature was around 500oC with a voltage around 1000 V produced limited results. The roughness measurements on the bonding pads of the patterned CPS wick indicated a roughness above 1 micrometer. Anodic bonding can not seal such highly rough surfaces. An alternative was suggested to use eutectic bonding scheme. Eutectic bonding can be used to seal rough surfaces, as the eutectic mixture flows at eutectic temperatures. This flow of the eutectic mixture can result in covering any non-uniformity in the surface. After thorough investigation, indium-gold eutectic was selected as the bonding layer. The process of the bonding scheme is referred as Solid-

Liquid Interdiffusion (SLID) or Transient Liquid Phase Bonding (TLP) [4.1]. The usage of metal as a bonding layer will also produce high thermally conducting surfaces and causing almost no temperature difference across the bonding interface.

Eutectic bonding scheme utilizes the fact that diffusion in liquids is much faster than in solids. A low melting point material can be used to diffuse into a high melting point material. The melting point of indium is 157oC. When heated above this temperature, In diffuses into gold and forms AuIn2. The melting point of the eutectic

o AuIn2 is 456.5 C. Sufficient care has to be taken not to take the temperature of the eutectic above this temperature, as the eutectic will change to liquid phase and can debond the top-cap and the CPS wick.

The CPS wick was evaporated with 30 nm Cr (adhesion layer) and 100 nm Au.

The top-cap was evaporated with 30 nm Cr (adhesion layer), 25 nm Au, 370 nm In, 25 nm Au. The In layer on the top-cap is sandwiched between two thin gold layers to avoid

156 any oxidation of In. Any oxidation of In can hamper the eutectic bond process. After aligning the top-cap with the patterned CPS wick, the wafers were bonded at 250oC for

45 minutes. Instron tensile strength measurements, showed bond strength of 4MPa/cm2

[4.2]. The 2” top-cap and CPS bonded wafer package is then diced along the dicing lines provided on the top-cap to form 4 individual components.

4.2.2 Bonding top-cap & CPS package to the compensation chamber Two important considerations to seal the top-cap/CPS package to the compensation chamber are that the bond has to hermetically seal the evaporator package and the bond has to withstand 175oC without failing. Vacseal® is a sealant commonly used for systems that operate under partial vacuum conditions. A thin layer of Vacseal® was applied on the periphery of the bottom side of the CPS wick and the top side of the compensation chamber. After placing the top-cap/CPS package on the compensation chamber, the whole assembly is cured at 260oC for 1 hour. This helps to seal the package and also helps to gain the full strength of the sealant to bond. The soldering techniques used to attach the stainless steel tubes to the top-cap and the stainless steel back plate can be referred in the work of Medis [4.2]. Figure 4.4 shows a package evaporator package.

Fig. 4. 4: Packaged evaporator package with top-cap/CPS bonded to the compensation chamber. Soldered electrical connections can be seen to the heater and the RTD. Two vapor transport lines are also seen.

157 4.3 Condenser The primary function of a condenser is to act as a heat sink. In this generation device, an improvement of the previous generation condenser was designed. In the 4th generation device, the condenser had large surface areas and the convection of these areas dominated the condensing process. A dual core copper condenser was designed with lower surface areas in this generation of the LHP testing. The inner core of the condenser carries the working fluid, while the outer core circulated the cooling water. Inner baffles are created in the outer core for more efficient heat transfer between the cooling water and the working fluid. Four thermocouples were placed at the inlets and outlets of the inner and outer core of the condenser respectively. A maximum of 325 W was transferred using cooling water with a test setup and the convection of the condenser to the surroundings was measured around 20-25 W.

Fig. 4. 5: Smaller condenser designed to allow calorimetric calculations of the heat transfer. a) Schematic of the condenser. b) Photograph of a condenser. [4.2]

4.4 Packaging of evaporator and condenser The evaporator has a liquid and vapor transport line that has to be connected to the condenser. Two quick disconnects were machined by Medis [4.2] to allow flexibility in testing multiple evaporator packages. A commercial MEMS pressure sensor was connected using a T on the vapor line. Two thermocouples, one on the top-cap and one in

158 the compensation chamber are placed. The whole LHP was placed on a sturdy base to avoid any vibrational disturbance. Please refer to Fig. 4.6 and Fig. 4.7 for a schematic and a picture of the 5th generation LHP.

Fig. 4. 6: Schematic of 5th generation LHP.

Fig. 4. 7: Photograph a 5th generation LHP.

159 4.5 Evacuation/Filling station A brand new filling station was developed for filling the working fluid in this generation LHP. The non-condensable gases in the working fluid of the 4th generation device played a critical role in its inefficient operation. The close dependence of saturation temperature on the saturation pressure allows little room to have non- condensable gases in the working fluid. Non-condensable gases can create air pockets in the liquid return line creating disconnect in the liquid supply to the compensation chamber. The evaporation temperature of a working fluid with non-condensable gas is higher than the one without.

The dual functions of evacuation and filling from the same port complicated the design of a filling station. A roughing pump was used to evacuate the loop, a liquid reservoir with continuous D.I. water feed was used to supply the working fluid. A double wall stainless steel reservoir was used to freeze the working fluid and pump out the non- condensable gas. For more information on the filling station please refer to the work of

Shuja [4.3]. Figure 4.8 shows a picture of a filling station built to evacuate and pump the

LHP.

160

Fig. 4. 8: A LHP filling station with LHP on the right can be seen. A roughing pump is employed to evacuate the loop. A D.I. water feed is used and a glass burette is used to meter the fill quantity. From [4.3]

4.6 LHP Measurement Automation

4.6.1 Equipment used The LHP automation was performed using LabVIEW 7.0. The data acquisition

(DAQ) card used was National Instruments PCI-6023E. It is a 200 ksamples/s, 12-Bit,

16-analog-input multifunction DAQ card. The power was supplied to the heater using

Agilent Technologies E3631A.This is 80 W triple output power supply with 6V 5A,

+25V 1A and -25V 1A outlet. The power supply was controlled using National

Instruments PCI-GPIB (general purpose interface bus) card.

There are 6 type T thermocouples. The locations of these thermocouples are

described as below.

T1: Placed on the top of the heater.

161 T2: Vapor Inlet temperature to the Condenser.

T3: Liquid outlet temperature from the Condenser.

T4: Temperature of the liquid in the compensation chamber.

T5: Inlet cooling water temperature of the condenser.

T6: Outlet cooling water temperature of the condenser.

A pressure sensor is also integrated into the loop in the vapor line. The pressure sensor is a gauge sensor and has a 6.67 mV output for every psi change in pressure. The saturation temperature which is also indicated and logged is calculated from the pressure sensor reading. This is achieved using a lookup table of saturation temperatures vs. saturation pressures of water. The program automatically interpolates and extrapolates the lookup data using algorithms in LabVIEW. A lookup table is initially fed to the program to achieve this.

Computer controls the power supply using a GPIB interface. The power supply activates voltage at the appropriate outlet and feeds back to the computer the current in the circuit. This voltage and current can be used to determine the resistance of the heater and the amount of power delivered to the heater. With a 25 V power supply and the heater resistance around 40 Ω, the maximum power that can be delivered was 15.6 W to the heater. The project goals were set around 25 W of cooling capability for the LHP. To achieve this, a second power supply with similar configuration was connected in series with the first power supply. This enabled total power of 40 W.

162 4.6.2 Features included in the program

4.6.2.1 Noise filtering The fluorescent tubing in the clean room induced a noise in the thermocouple sensors. As the thermocouple sensor voltage is in nano ampere. range, the 60Hz signal from these fluorescent tubing has dramatic effects on the sensitivity of the thermocouple sensors. These noises had to be filtered to get better resolution from the sensors. Filters can be implemented by using signal conditioning blocks sold by National Instruments.

This is not a favorable option due to the high costs involved in the purchasing of the signal conditioning block. A second approach is to design a component filter. A software filter approach was implemented in the LHP automation program. A low pass

Butterworth filter of order 3 with cutoff frequency of 6 Hz was designed using

LabVIEW. This dramatically increased the sensitivity of the thermocouples and made them more stable (Fig. 4.9).

4.6.2.2 Averaging 1000 samples per second are taken for each channel and are filtered to reduce the

noise after which an averaging function is implemented to get the data point at that

particular second. This helps in stabilizing the signal further. A precision of 0.1oC in

temperature was achieved using both the low pass filter and the averaging.

4.6.2.3 Data logging Sample data is shown below (Fig. 4.10) to show the format of the data that is being logged. The user has a feature of inputting the data log time interval. This will enable data logging once in every data log time interval. This helps to keep the data files small but has a vulnerability of not logging crucial data if data log time interval is large.

163

Fig. 4. 9: Signals before and after passing through the low pass butterworth filter.

Fig. 4. 10: Sample logged data.

4.6.2.4 Power increment/decrement The user has an option to either increment or decrement the power applied to the heater using a control switch. When the switch is in ON position the power would increase according to the value given by the user in the power increment input box and vice versa. A positive value would increment the power and negative value would

164 decrement. The time between each increment or decrement is determined by the user.

When the switch is in OFF position the power of the heater is maintained at a constant

value.

4.6.2.5 File name File description Each run is logged in a file which has a name with time stamp and a user

supplied file name. For example “05 03 2005 11 44 evacuation.txt” indicates the program

was done on 3rd May 2005 at 11th hour 44th minute and the name of the file is evacuation.

The first line in the file is a description of the process that is being done. The file name

and the file description are supplied by the user.

4.6.2.6 Comments In the LHP testing, the user can input comments which are stored in a separate file. The comments are each time stamped and are logged into this file. Sample of the comments are shown below.

Fig. 4. 11: Sample of comments.

165 4.7 LHP Test Results

4.7.1 Dry vs. wet tests

The objective of this test is proving the amount of cooling a LHP can provide.

This can be measured using either temperature or input power. A dry LHP test is defined as a test performed by applying input power to the heater with no working fluid present in the LHP. A wet test in contrary has the working fluid filled with a predetermined fill quantity into the LHP. In all the tests conducted on the 5th generation LHP, D.I water that has been conditioned to remove non-condensable gases was used as a working fluid. The

LHP was not perfectly sealed and hence has a finite amount of leak present. The leak was slow enough to conduct LHP testing for several days without being concerned about the effect of non-condensable gases which have leaked back into the system.

Multiple dry loop test were performed were the loop was evacuated and power was incrementally applied to the heater. The power increments were chosen to be very small (0.1 W). The time between successive increments was determined by the saturation of the temperature values. Sufficient care was taken to reach steady state condition before applying the next power increment. A maximum temperature (120oC) limit was placed on the program to avoid any thermal runaways. The program automatically shuts the heater off as soon the temperature of the top-cap reaches above 120oC. The temperature of the top-cap reached 120oC at input power of 5.7 W to the heater. The relationship between temperature of the top-cap and the input power was linear. The temperatures of the condensers were at room temperature indicating almost no heat transfer to the condenser end. This indicates that the total input power was convecting from the evaporator package

166 to the surroundings. The relationship between the top-cap temperature (oC) and the input

power to the heater is show in Eq. (4.1).

Ttop−cap = 16.83Pinput + 22.05 (4.1)

The inner volume of the whole loop is 5.8 ml. The loop was evacuated and filled

with 4.1 ml of D.I. water. The percentage of loop volume filled with liquid is 70%. The

input power is incrementally increased; the condenser was supplied with constant R.T.

cooling water. The temperature of the top-cap reached 110oC at 17.5 W of input power.

The top-cap temperature of 316.5oC is calculated when extrapolated to 17.5 W of input power in the dry test using Eq. (4.1). A top-cap temperature of 110oC at 17.5W indicates

a cooling of 206.5oC. Another way of looking at the cooling capability is that in a dry test

at 5.2 W of input power the top-cap reached a temperature of 110oC. A 17.5W of input

power in the wet test indicates an additional 12.3 W of cooling capability added to the

LHP system. Refer to Fig. 4.12 for top-cap temperatures vs. input power for both dry and

wet loop data.

167 140

120

100

80

60 Temperatue of the top-cap (oC) 40

Wet Loop Test Dry Loop Test

20

0 0 2 4 6 8 10 12 14 16 18 20 Input power (W)

Fig. 4. 12: Top-cap temperatures vs. input power of dry and wet loop tests.

4.7.2 Calorimetric calculations The input power can be divided into two categories, convection from the loop to the surroundings and heat transfer to the condenser cooling water. Convection power to the surroundings can be reduced by thermally insulating the loop. This is achieved by either placing the LHP in an evacuated chamber or by covering the loop with a high thermal resistance material. In our case foam was used as an insulating material due to its high thermal resistance and its flexibility to bend. Assuming Temperature at the inlet of the cooling water (T5), outlet of the cooling water (T6), inlet of the condenser (T2), outlet of the condenser (T3) and mass flow rate of the cooling water (mc) are known, the calculation of the power delivered to the condenser can be calculated by Eq. (4.2). Here

Cp is the specific heat of water (4184 J/Kg /K).

168 Q = m cCp (T6 - T5) (4.2)

Using Eq. (4.2), the amount of power going into the condenser was calculated.

When subtracted from the total input power, power going into convection is obtained.

Refer table 4.1 for distribution of total power into convection and heat transfer to

condenser.

TABLE 4. 1: DISTRIBUTION OF INPUT POWER INTO HEAT TRANSFER TO CONDENSER AND TO AMBIENT

Qinput(W) Qcond(W) Qamb(W) 8.5 4.01 4.49 9 4.3 4.7 9.5 4.59 4.91 10 4.997 5 10.5 5.594 4.906

11 5.82 5.18 11.5 5.16 6.34

12 6.05 5.95 12.5 6.46 6.04 13 6.66 6.34 13.5 7.638 5.862 14 8.398 5.6 14.5 9.05 5.45 15 9.94 5.06 15.5 10.53 4.97 16 10.7 5.3

From calorimetric calculations, it can be concluded that, when ramping the input

power from 0W, the evaporator package heats up by convecting to the ambient before the

evaporation starts. After the onset of evaporation, most of the additional input energy

goes into evaporation. The modeling studies in the previous chapter indicated towards the

same conclusion. This is evident in the wet loop data graph shown in Fig. 4.13. The slope

of T1 (top-cap temperature) changes at around 5W, indicating evaporation started at that temperature. The indication of evaporation can be seen with the increasing temperatures

169 values of T2 around 5W. At around 11.5 W, the inlet of the condenser temperature (T2) is almost equal to the top-cap temperature (T1), indicating a high heat transfer rate to the condenser from the evaporator. At 14.5W, T2 measured 91oC and T3 measured 75oC, the pressure recorded was 11.5 psi absolute. The saturation temperature of water at this pressure is 93.4oC, which is same as the top-cap temperature measured (T1). The optimal performance of the loop was observed when T1 equals the saturation temperature of water at the pressure recorded in the loop.

100

90

80

70 T1 T2 T3 60 T4 T5

Temperature (oC) T6 50

40

30

20 0 2 4 6 8 10 12 14 16 Power (W)

Fig. 4. 13: Thermocouple reading of the LHP vs. input power applied to the heater.

4.7.3 Non-condensable gas Non-condensable gas in the working fluid can increase the loop pressure of the

LHP. Initial evacuation of loop recorded a -14.7 psi gauge pressure. After introducing the working fluid the pressure sensor recorded -12.45 psi gauge. If the water had no non- condensable gas, then the pressure should correspond to the saturation pressure of water

170 at room temperature (-14.1psi gauge). In this case, an additional 1.65 psi of pressure was

created by non-condensable gas. The effect of non-condensable gases in the loop is still

under investigation. If the non-condensable gases accumulate in the vapor space provided

in the compensation chamber. The pressure in the vapor space will increase and can

increate the evaporating temperature in the compensation chamber. This helps to delay

the onset of nucleate boiling on the backside. It is difficult to predict or control the space

non-condensable gases occupy in a loop. Intermittent operation of the loop can be

attributed to the distribution of the non-condensable gases in the LHP. Non-condensable

gases can also pose many startup issues and operating issues in a LHP. It is concluded in

this work that non-condensable gases in the compensation chamber delayed the on-set of

nucleation and more investigation is required to understand the complete contribution of

these gases in the LHP as a whole.

4.7.4 Effect of condenser One of the investigations performed is to see the effect of the condenser on the

LHP evaporator package. The temperature of the cooling water entering the condenser

was varied to see any effect on the evaporator top-cap temperature. Ideally, if the

condenser and evaporator are thermally coupled, any increase in cooling water

temperature should result in a raise in top-cap temperature. Cooling water was circulated at various inlet temperatures (20oC, 30oC, 40oC). Unfortunately, the top-cap temperature

did not change. This indicates that the evaporator and condenser are decoupled and the

vapor-liquid meniscus, which ideally should exist in the condenser, exists in the vapor

line. High convection losses to the surroundings can result in the meniscus being in the

vapor line.

171 4.7.5 Operating range of 5th generation LHP The LHP evaporator package convected 5W to the ambient. At 5W of input power, the condenser inlet temperature increased indicating evaporation and vapor transport. At 11.5 W input power, the inlet temperature of the condenser was close to the top-cap temperature, indicating vapor-liquid meniscus inside the condenser (Fig. 4.13).

At 17.5W the top-cap temperature reached a pre-determined maximum temperature of

110oC.

4.7.6 Limitations of the present device The porosity of the packaged CPS wick in the 5th generation LHP was very low.

This conclusion was made when a 90% porous wick was used in a separate evaporator package, 60.5 W was delivered from the evaporator to the condenser [4.2]. Investigation into higher porosity wicks were made a CPS wick with 16.25% porosity wick was made

(Fig. 4.14). As discussed in the previous chapter, reducing the number of thermal conduction pathways from 32 to 10 can increase the vapor channel volumes reducing the pressure drop created. This can also make more space available to the CPS pores increasing the evaporating surface. Nucleate boiling on the backside of the primary wick was delayed using the gravity-assisted compensation chamber. In space applications, where gravity is absent, alternative methods to avoid nucleate boiling have to be incorporated. Controlling the non-condensable gases can provide the solution to this problem but more investigation is needed to confirm this. The presence of a big compensation chamber is not favorable for both terrestrial and space applications. One solution to this problem can be achieved by implementing the compensation chamber off- board with the evaporator package (like a CPL). Chapter 3 provides the effect of the size of the compensation chamber on the LHP performance. It was concluded that for more

172 uniform temperatures in the evaporator package, the compensation chamber has to be

made smaller. The condenser designed in both 4th and 5th generation design had large

surface areas for convection. A direct coupling between the evaporator and the condenser

was not seen in this generation.

Fig. 4. 14: A 16.5% porous CPS wick.

4.8 Integrating top-cap and CPS wick A new approach was undertaken to integrate the top-cap and the CPS wick into a

single silicon structure. In this method, parameters in CPS etching are controlled such

that the diameter of the pores is changed with time. According to Eq. (1.2), the diameter of a CPS pore can be varied by varying the current in the etching process. By increasing the current in the CPS etching process, more holes are being attracted to the electrode tip.

This enhances more oxidation and more etching per unit time. Not only the pore tip will attract more holes but also the pore walls. This increases the diameter of the pores. The current can be increased such that the pores can physically interpenetrate into each other.

173 A schematic of such a structure is shown in Fig. 4.15 and a SEM image can be seen in

Fig. 4.16. The pores in Fig. 4.16 were widened using KOH after the initial CPS etch process.

Fig. 4. 15: Schematic of an interpenetrating coherent porous silicon wick (ICPS).

The interpenetrating part of the CPS wick acts as the vapor channel in a LHP. The pores on the bottom act as capillaries. The silicon posts created by interpenetrating of the pores would act as thermal conduction pathways. The backside of the CPS wick provides a planar surface to place microelectronic chips for cooling. The ICPS wick structure was fabricated but was never tested as an evaporator package.

174

Fig. 4. 16: SEM images of ICPS micro fabricated using CPS etching process.

4.9 References [4.1] J. H. Lau, “Chip on Board Technologies for Multichip Modules,” International Thomas Publishing, New York, 1994. [4.2] P. Medis, “Development of Microfluidic Packaging Strategies, with Emphasis on the Development of a MEMS Based Micro Loop Heat Pipe”, Ph.D. dissertation, University of Cincinnati, Cincinnati, OH, 2005. [4.3] A. Shuja, “Development of Materials and Processing for Realization of a MEMS Based Loop Heat Pipe”, Ph.D. dissertation (in progress), University of Cincinnati, Cincinnati OH 2006.

175 Chapter 5 Introduction to Chromatography & Previous Work

5.1 Lab-on-a-chip

The field of micro total analytical systems (µ-TAS) is growing at an exponential rate to produce devices which would simulate the functionality of a laboratory on a microelectronic chip. One of the core research areas is DNA separation and analysis. The advantages of microsystems over bench scale systems are mass production, low cost, portability, real time responses, higher efficiencies, decreased waste production and much more. The recent spurt in the research in microsystems area shows the viability of such devices. These systems produce outputs using very little time and sample quantity [5.1-

5.4]. The applications of µ-TAS are wide-ranging from analytical standard operations such as sample preparation, injection and manipulation, reaction, separation and detection, to biological applications such as cell culture, polymerase chain reaction, DNA separation and sequencing, and clinical diagnosis [5.5]. In addition to analytical applications, micro devices have also found a place in the preparative applications domain. Micro devices are highly suitable for massive parallelization, which provides them with an enormous potential for high-product throughput operations [5.6-5.8].

Advances in the MEMS (Micro Electro Mechanical Systems) research area in the last two decades have made possible the development of micro separation devices [5.9,

5.10]. The miniaturization process is implemented to the separation device as well as the detector system, the injection system and the data acquisition system. This lead to the development of fully integrated microsystems [5.3]. Micro-structures are ideal for high

176 parallelization. Preparative applications of micro separation systems are achieved by

developing massively-parallel, high-throughput configurations. These micro–devices are

utilized for applications such as the recovery of trace components in bulk biological

systems, isolation of pure pharmaceuticals, and the production of fine chemicals etc. [5.6,

5.11]. Despite the tremendous potential of microdevices for preparative applications,

most of the research conducted on microseparators has focused on analytical applications,

as in earlier work done in this lab towards the development of a “lab-on-a-chip” [5.22].

The multi-turn chromatographic device concept discussed in the next chapter, would use

the advances in MEMS and µ-TAS technologies.

5.2 Chromatography

Chromatography is a family of analytical chemistry techniques for the separation of mixtures. It involves passing the sample, a mixture which contains the analyte

(substance being measured), in the "mobile phase", often in a stream of solvent, through the "stationary phase". The stationary phase retards the passage of the components of the sample, differing amounts for each chemical component. When components pass through the system at different rates they become separated in time, like runners in a sprint. Each component has a characteristic time of passage through the system, called a "retention time". Chromatographic separation is achieved when the retention time of the analyte differs from that of other components in the sample.

A chromatograph takes a chemical mixture carried by liquid or gas and separates it into its component parts as a result of differential distributions of the solutes as they flow around or over a stationary liquid or solid phase. Various techniques for the

177 separation of complex mixtures rely on the differential affinities of substances for a gas

or liquid mobile medium and for a stationary absorbing medium through which they pass.

5.2.1 Theory of chromatography

Chromatography is a separation method that exploits the differences in

partitioning behavior between a mobile phase and a stationary phase to separate the

components in a mixture. Components of a mixture may be interacting with the stationary

phase based on charge, relative solubility, size or adsorption.

5.2.1.1 Retention The retention is a measure of the speed at which a substance moves in a

chromatographic system. In continuous development systems such as HPLC (High

Performance Liquid Chromatography) or GC (), where the

compounds are eluted with the eluent, the retention is usually measured as the retention

time, i.e. the time between injection and detection. In interrupted development systems

such as TLC (Thin Layer Chromatography) the retention is measured as the retention

factor, i.e. the run length of the compound divided by the run length of the eluent front.

The retention of a compound often differs considerably between experiments and laboratories due to variations of the eluent, the stationary phase, temperature, and the setup. It is therefore important to compare the retention of the test compound to that of one or more standard compounds under absolutely identical conditions.

5.2.1.2 Plate theory The plate theory describes the chromatography system (the mobile and stationary phases) as being in equilibrium. The term “plate” refers in its historical origins to classical distillation plates, but contemporary chromatographers use it as a term for

178 efficiency. The higher the number of “plates” of a chromatograph, the better the

separation. The partition coefficient K is based on this equilibrium, and is defined as the

ratio of concentration of the solute in the stationary phase to the concentration in the

mobile phase. The partition coefficient (K) is assumed to be independent of concentration

(assuming that the stationary phase does not reach saturation), and can change if

experimental conditions are changed, such as when temperature is increased or

decreased. As K increases, it takes longer for solutes to separate. For a column of fixed

length and flow, the retention time (tR) and retention volume (Vr) can be measured and

used to calculate K.

5.2.2 Column chromatography

Column chromatography utilizes a vertical glass column filled with some form of solid support, with the sample to be separated placed on top of this support. The remainder of the column is filled with a solvent which, under the influence of gravity, moves the sample through the column. In 1978, W. C. Stills introduced a modified version of column chromatography called flash column chromatography ("flash") in which solvent is driven through the column by applying positive pressure.

In this dissertation, the author utilized micro-columns made from silicon using a novel photon pumped electrochemical etching technique. The solvent was pumped using a High Performance Liquid Chromatography (HPLC) pump. Refer to the next chapter for more details on this setup.

5.2.3 Gas-liquid chromatography

179 Gas-liquid chromatography (GLC), or simply gas chromatography (GC), is a type

of chromatography in which the mobile phase is a carrier gas, usually an inert gas such as

helium, hydrogen or nitrogen, and the stationary phase is a microscopic layer of liquid on

an inert solid support. The stationary phase lines the inside of a very long very thin tube

known as a column. As the chemicals exit the end of the column, they are detected and

identified electronically (Fig. 5.1). The function of the column is to separate and

concentrate different components in order to maximize the detection signal.

Fig. 5. 1: A schematic of a gas chromatograph with injection and detection.

Two types of columns are used in GC:

(1) Packed columns contain a finely divided, inert, solid support material coated with a

liquid or solid stationary phase. Most packed columns are 1.5 - 10m in length and have an internal diameter of 2 - 4mm. The outer tubing is usually made of stainless steel or glass.

(2) Capillary or open-tubular columns have a very small internal diameter, on the order of a few tenths of millimeters. The column walls are coated with the active materials. Most capillary columns are made of fused-silica with a polyimide outer coating. These columns are flexible, so a very long column can be wound into a small coil.

180 Because molecular adsorption and the rate of progression along the column depend on the temperature, the column temperature is carefully controlled to within a few tenths of a degree for precise work. Reducing the temperature produces the greatest level of separation, but can result in very long elution times. For some cases, temperature is ramped either continuously or in steps to provide the desired separation.

Multiple types of detectors are used in gas chromatography. The most common one is the thermal conductivity detector (TCD), which monitors changes in the thermal conductivity of the effluent. The main advantage of the TCD is that it can detect any substance (except the carrier gas). Other detectors include the flame ionization detector

(FID), electron capture detector (ECD), flame photometric detector (FPD), photo- ionization detector (PID), and Hall electrolytic conductivity detector.

The multi-turn chromatographic device discussed in the next chapter is a variation of the capillary column gas chromatography. The column is miniaturized in the micro- meter scale and the column is turned into multiple “U” turns. A high performance

(pressure) liquid chromatographic (HPLC) pump is used to push the solvent through the column.

5.2.4 Ion exchange chromatography

Ion exchange chromatography is a column chromatography that uses a charged stationary phase. It is used to separate charged compounds including amino acids, peptides, and proteins. The stationary phase is usually an ion exchange resin that carries charged functional groups which interact with oppositely charged groups of the compound to be retained:

(1) Positively charged ion exchanger (anion exchanger) interacts with anions.

181 (2) Negatively charged ion exchanger (cation exchanger) interacts with cations.

In the next chapter, an analytical model is developed to estimate the performance

efficiency of the multi-turn chromatography. The model utilizes ion-exchange

- - 2- chromatography in a capillary chromatograph for separating anions (Cl , Br , SO4 ) using

a positively charged ion exchanger as the stationary phase.

5.2.5 High performance liquid chromatography (HPLC)

High performance liquid chromatography, usually referred to simply as HPLC, is

a form of column chromatography used frequently in biochemistry and analytical

chemistry. The analyte is forced through a column (stationary phase) by a liquid (mobile

phase) at high pressure, which decreases the time the separated components remain on

the stationary phase and thus the time they have to diffuse within the column. Diffusion

within the column leads to broad peaks and loss of resolution. Less time on the column

then translates to narrower peaks in the resulting chromatogram and hence to better

resolution and sensitivity.

5.2.5.1 Normal phase (NP) liquid chromatography

Normal phase HPLC (NP-HPLC) was the first kind of HPLC setup used. This method uses a polar stationary phase and a non-polar mobile phase, and is commonly used when the analyte of interest has a non-polar nature.

5.2.5.2 Reversed phase (RP) liquid chromatography

Reversed phase HPLC (RP-HPLC) was developed due to the increasing interest in large polar bio-molecules. The RP-HPLC consists of a non-polar stationary phase and a polar mobile phase. One common stationary phase is silica. Silica must never be used with strong aqueous bases (alkali) as these will etch the silica, however they can be used

182 with aqueous acid. Special care has to be taken for the acid not to etch any metal parts of

the HPLC equipment.

The multi-turn chromatograph discussed in the next chapter using silicon dioxide

(silica) as a support structure on silicon. The oxide of silicon can be used as a stationary

phase in reversed phase liquid chromatography or can be coated with a polar compound

to use it in normal phase liquid chromatography.

5.2.3 Literature review

5.2.3.1 Chromatography

It was the Russian botanist, Mikhail Tsvet, who invented the first chromatography

technique in 1901 during his research on . He used a liquid-adsorption column

containing calcium carbonate to separate plant pigments. In 1952 Archer John Porter

Martin and Richard Laurence Millington Synge were awarded the Chemistry Nobel Prize for their invention of partition chromatography. The technology of chromatography

advanced rapidly throughout the 20th century. Researchers found that the principles

underlying Tsvet's chromatography could be applied in many different ways, giving rise

to the different varieties of chromatography. Simultaneously, advances continually

improved the technical performance of chromatography, allowing increasingly similar

molecules to be resolved. Analytical chromatography is used to determine the identity

and concentration of molecules in a mixture. Preparative chromatography is used to

purify larger quantities of a molecular species.

5.2.3.2 Micro columns

183 The first miniaturized chromatograph fabricated in silicon was developed by S.C.

Terry and J.B. Angel, a group of researchers from Stanford University in 1997 [5.12,

5.13]. The device had a column, a sample injection loop and a thermal conductivity detector. A 1.5 m long spiral groove capillary column, 200 µm wide and 30 µm deep was etched in silicon. Anodic bonding was used to attach the column to a Pyrex glass cover plate. A solenoid-actuated valve was fabricated for sample injection. Chemical activation was performed after the sealing.

Rocky Preston from the Stanford group fabricated two chromatographs capable of separating ammonia and nitrogen dioxide [5.14]. A spiral column of 0.9 m long was isotropically etched in silicon. The deposition of the stationary phase was performed prior to bonding and the surface was lapped for bonding. The device used a chemiresistor as the primary detector and a general thermally conductivity detector.

A silicon chip with open tubular geometry for a high pressure liquid chromatograph was first researched by Manz et al. in 1990 [5.15]. It had spiral geometry

(15 cm long column, 6 µm wide and 2 µm deep), conductometric detector, a chip holder, and a pressure pulse driven injector using a conventional LC valves and pump. The total volume of the column was 1.8 nL of which the detection cell made up only 1.2 pL.

Theoretical consideration indicated that this column should yield efficiencies of 8000 and

25000 plates in 1 and 5 min, respectively. The micro LC column was fabricated in (110) silicon using a mixture of hydrofluoric acid and nitric acids (isotropic etch).

Ocvirk et al. [5.16] in 1995 fabricated an integrated planar silicon structure with a split injector, a packed small bore column, a frit and an optical detector cell. This structure was covered by a glass chip and another silicon optical fiber positioning unit.

184 The dimension of this micro-structure was 4.5x25x0.75 mm with a separation column

volume of 0.5 µL and the critical extra-column dead volumes on the chip were below 2.5 nL. A separation of fluorescein and acridine orange yielded a maximum of 200 theoretical plates in 3 min.

Regnier et al. [5.17] inn 1998 fabricated nano-columns for liquid chromatography using deep reactive ion etching (DRIE). The channels were 15 (µm)2 in cross section.

The micro-chromatographic system included millions of micron size collocated

monolithic support structures, fluid distributors, mixers, sample inlets, a solvent

formation system, and detector flow cells.

5.2.3.3 Capillary electrophoresis

Capillary electrophoresis (CE) is a separation method, which uses electric field.

Planar microdevices are suitable for this type of separation technique as noted by

Jacobsen et al. [5.18] in 1994. Using micromachining techniques, it is possible to

integrate a complex manifold of flow channels in a planar substrate, fabricating a network

of capillaries capable of sample injection, pretreatment, and separation. The multi-turn

chromatograph proposed in the author’s work, discussed in the next chapter, has

capillaries of 5 µm and has excellent capability to be used as a capillary electrophoresis

device.

Jacobson et al. [5.18-5.20] have developed at Oak Ridge National Laboratory

several chromatographic separation devices for capillary electrophoresis and open

channel electro chromatography on silicon wafers. Columns were realized by isotropic

wet etching using HF/NH4F solution.

185 Raymond, Manz and Widmer presented a new concept for continuous sample

pretreatment using a free-flow electrophoresis device, in 1994 [5.21]. This device uses

the differences in the electrophoretic mobilities of sample components. This concept

involves continuously feeding a narrow sample stream into a carrier solution which flows

perpendicular to the applied electric field. Charge species are then deflected from the

flow direction at an angle determined by a combination of the carrier flow velocity and

the respective electrophoretic mobilities of the sample components.

5.3 Micro open parallel plate separator (µ-OPPS)

The present work “Micro Multi-turn Open Tubular Separator” (µ-MOTS) is an

extension of the previous collaborated work of our lab (Center for Microelectronics

Sensors and MEMS) with department of Chemical Engineering for “Micro Open Parallel

Plate Separator” (µ-OPPS) [5.23-5.25] in 1998. In the above earlier work in this lab, deep

channels were etched in (110) orientation silicon using anisotropic etching techniques.

The µ-OPPS device falls in the category of open-tubular capillary liquid chromatography.

Bonded phase chemistry with self assembling mono-layers was used to separate using ion

exchange chromatographic techniques.

5.3.1 (110) silicon etching

The (110) orientation in silicon has a special anisotropic etching characteristic in

alkali hydroxides such as KOH. Four of the six exposed (111) slow etching planes of silicon are vertical to the (110) etching plane. The other two (111) planes are oriented at an angle of 35.26o with the (110) surface [5.26]. Parallel trenches with vertical side walls

can be created from a pattern parallel to the vertically etched planes of the (111) silicon.

186 This produces a slot which has two vertical walls and two slanting walls. Refer to the

Figs. 5.2, 5.3 and 5.4. The KOH etchant has a great selectivity of (110) over (111) planes, as high as 500 [5.27]. The etch rate varies on the concentration of the etchant, usually in the range of 10-55%, and on the solution temperature [5.28]. Silicon dioxide or silicon nitride can be used as a masking material while etching silicon using KOH. A 380 µm thick (110) silicon wafer was used to etch the vertical slots.

A-A’ cross-section B

A A’

B’ B-B’ cross-section

Fig. 5. 2: (110) silicon wafer with a vertical slot etched using anisotropic etching. A-A’ and B-B’ cross sections show two vertical (111) planes and two (111) planes at an angle of 35.26o with (110) silicon plane.

187

Fig. 5. 3: Typical anisotropic etching geometry in (110) wafers, resulting from slow etching (111) planes and the (110) bottom. Note the possibility of etching long, deep channels with vertical sidewalls along two different directions. From [5.29].

{111} type vertical sidewalls

{111} type slanting sidewall

{311} type shoulder

(110) type bottom

Fig. 5. 4: Illustration of {133} shoulders forming at the (110) bottom. From [5.29].

188 Oxygen impurities in silicon are potential killers when deep vertical side walls are

expected in silicon. Oxygen is the most common impurity in silicon due to quartz

crucibles being used to hold molten silicon when pulling wafers using Czochralski

method, also abbreviated as CZ method. Potassium hydroxide has a lower selectivity of

etching silicon dioxide than silicon and hence used as a masking layer. An effective

method to avoid this problem would be thermally treating the silicon wafer at high

temperatures (around 1200oC). This would cause oxygen gettering and increase the smoothness of the vertical side walls.

5.3.2 µ-OPPS device

The µ-OPPS device was fabricated earlier in this lab in 2” diameter (110) silicon.

Multiple arrays of slots were etched in silicon using anisotropic etchant KOH. A 380 µm

thick silicon wafer was used. Silicon dioxide was thermally grown and used as a masking

layer in KOH etching. Reservoirs were realized by isotropically etching shallow cavities

in matching 7740 borosilicate glass wafers (750 µm thick, 2” diameters) A second glass

wafer was used to seal the bottom of the channels. Glass nipple connections were made to

the inlet and outlet reservoirs. Three arrays of different widths were etched in silicon (10

µm, 50 µm and 150 µm). The distance between adjacent channels was 450 µm and the

length of each channel is 3 cm. Each array had 20 micro-channels. Figure 5.5 shows the

schematic of the cross section of the fabricated device. Input and output reservoirs are

etched in Pyrex glass and glass nipples attached for plumbing. Figure 5.6 shows a more

detailed cross section of the device, reservoirs, detector system. The two slanting {111}

silicon walls are used at the input and output reservoirs; this reduces the pressure as the liquid can smoothly turn into the channel. Multiple detectors are placed along the channel

189 length. The 10 µm and the 50 µm width channels have detectors spaced 20 µm. and the

150 µm width channels have detectors spaced around 62 µm (refer to Fig. 5.7). Due to fabrication, surface activation and testing difficulties, only 50 µm wide channels were used. Anodic bonding was used to seal the micro-channel with top and bottom glass wafers. Wire bonding was used to connect the electrodes with the external metal pads for electrical contact. The fabrication sequence is schematically illustrated in Fig. 5.8.

Fig. 5. 5: Schematic representation of micro-channels. From [5.30]

190

Fig. 5. 6: Cross-sectional view of the complete device. From [5.30].

Fig. 5. 7: Schematic representation of the detectors. From [5.23].

191

Fig. 5. 8: Fabrication steps involved in the realization of the micro-channels, conductivity detectors and reservoirs. From [5.23].

5.3.3 Surface activation of the side walls

Bonded phase chemistry was used to coat the walls of the above chromatograph.

The thickness of this stationary phase layer is normally 25-100 Å. In this device, a Si-O-

Si type of bonded phase was utilized to modify the device interior channel wall for amine

functionality. This process of surface activation can be done either in batch mode or

continuous process. In batch mode, the channels are coated with the stationary phase

before they are bonded into the package. Lapping of undesired chemical species on the

192 bonding surfaces has to be implemented for a good seal. In continuous mode the channels

are packaged before the activation of the stationary phase by cycling the chemicals.

5.3.3.1 Activation cycle of the stationary phase

Hydroxylation: A hydroxylation reaction is performed to increase the surface SiOH

concentration. A 50% (v/v) solution of H2SO4 and HNO3 was refluxed over the device at

180oC for 8 hours.

Surface modification: A 10% (v/v) 3-glycidoxypropyltrimethoxysilane in toluene at

120oC was refluxed for 16 hours. The wafer was dried in a vacuum oven at 50oC and 15-

20 inch Hg for 12 hours to remove unreacted silane. The wafer was rinsed in acetone for

several times (1.5 hrs) and dried in vacuum oven at R.T. for 16 hours at 15-20 in Hg.

Immobilization reaction: A 20% (w/v) polyethyleneimine (MW=600) in methanol

solution was cycled at R.T. for 16 hours. It was then dried in a vacuum oven at 50oC for

12 hours. Then solvent cleaning with acetone and methanol were performed (30 min.

each), followed by drying in a vacuum oven at R.T. for 12 hours at 15-20 in Hg. Refer to

Fig. 5.9 and 5.10 for chemistry and process details respectively.

193

Fig. 5. 9: Chemistry of the surface activation process. From [5.24].

Fig. 5. 10: Continuous activation cycle procedure. After [5.24].

5.3.4 Testing and results [5.23]

194 Experiments were conducted using 500 nL samples of 1 mol/l KCl, KBR and 0.5 mol/l K2SO4. The three peaks were detected after 309, 313 and 341 seconds, respectively.

The timer was initialized at the time of injection. This clearly indicates that Cl- ion and

- 2- Br ion are tough to resolve due to their similarities and SO4 , which has a higher retention due to its doubly charged nature. The column also showed broad peaks indicating “column overloading”. The surface gets saturated due to excess sample input and no further separation is possible.

The next set of experiments was conducted with 20 nL samples. Different co-ions were used like Na+, K+ to see the effects of including them. The co-ion K+ showed a better separation than did Na+. This could be due to the larger size of the potassium atom compared to the sodium atom. Different flow rates (10 µL/min and 20 µL/min) were also used to see the effect of velocities. Slightly narrower peaks and more tailing were produced at higher velocity. Higher concentrations lead to faster saturation of the column, lower retention times and broader peaks. Typical chromatograms obtained from the set of experiments are shown below (Fig. 5.11 and Fig. 5.12).

Fig. 5. 11: Typical anion exchange chromatogram for micro-device. From [5.30].

195

Fig. 5. 12: Effect of KNO3 concentration. From [5.30]. 5.4 References [5.1] Y. Fintschenko, W. Y.Choi, and S.M. Ngola, “Chip electrochromatography of polyacrylic aromatic hydrocarbons on an acrylate-based UV-initiated porous monolith,” Fresenius Journal of Analytical Chemistry, Vol. 371, pp. 174–181, 2001. [5.2] A. M. Garc´ıa-Campa˜na, W. R. G. Baeyens, H. Y. Aboul-Enein, and X. Zhang, “Miniaturization of capillary electrophoresis systems using micromachining techniques,” Journal Microcolumn Separations, Vol. 10, No. 4, pp. 339–355, 1998. [5.3] M. M. McEnery, J. D. Glennon, J. Alderman, and S. C. O’Mathuna, “Liquid chromatography on a chip,” Biomedical Chromatography, Vol. 44, pp. 44–46, 2000. [5.4] D. R. Reyes, D. Iossifidis, P. A. Auroux, and A. Manz, “Micro total analysis systems.1. Introduction, theory, and technology,” Analytical Chemistry, Vol. 74, pp. 2623–2636, 2002. [5.5] P. A. Auroux, D. Iossifidis, D. R. Reyes, and A. Manz, “Micro Total Analysis Systems. 2. Analytical Standard Operations and Applications,” Analytical Chemistry, Vol. 74, pp. 2637–2652, 2002. [5.6] E. C. Nice, Encyclopedia of Analytical Chemistry, Chapter: “Miniaturization of HPLC separations and equipment in peptide and protein analysis”, (John Wiley & Sons Ltd.), pp. 5823–5845, 2000. [5.7] T. Chov´an and A. Guttman, “Microfabricated devices in biotechnology and biochemical processing,” Trends Biotechnology., Vol. 20, No. 3, pp. 116–122, 2002. [5.8] H. Nagai, Y. Murakami, K. Yokoyama, and E. Tamiya, “High-throughput PCR in silicon based microchamber array,” Biosensors Bioelectronics, Vol. 16, pp. 1015–1019, 2001. [5.9] T. V. Dinh, B. M. Cullum, and D. L. Stokes, “Nanosensors and biochips: frontiers in biomolecular diagnosis,” Sensors and Actuators, B, Vol. 74, pp. 2–11, 2001. [5.10] C. S. Effenhauser, Microsystem Technology in Chemistry and Life Sciences, Chapter: “Integrated Chip-Based Microcolumn Separation Systems”, (Springer), pp. 51– 82, 1998. [5.11] C. Heuer, H. Kniep, T. Falk, and A. Seidel-Morgenstern, “Comparison of Various Process Engineering Concepts of Preparative Chromatography,” Chemical Engineering Technology, Vol. 21, No. 6, pp. 469 – 477, 1998.

196 [5.12] S. C.Terry, J. H. Jerman, J. B. Angell, “A gas chromatographic Air Analyzer fabricated on a silicon wafer”, IEEE Transactions on Electron Devices, Vol. 26, pp. 1880-1886, 1979. [5.13] J. H. Jerman, S. C. Terry, “U.S. Patent No. 4,471,647”, 1984. [5.14] R. R. Reston, “Design and performance evaluation of a gas chromatograph micromachined in a single crystal silicon substrate”, Ph.D. dissertation, Air force institute of technology, 1993. [5.15] A. Manz, Y. Miyahara, Z. Fan, H. Ludi, H. M. Widmer, H. Miyagi, K. Sato, “Design of an open tubular column liquid chromatograph using silicon chip technology”, Sensors and Actuators, Vol. B1, pp. 249-255, 1990. [5.16] G. Ocvirk, E. Verpoorte, A. Manz, M. Grasserbauer, H. Widmer, Analytical Methods and Instrumentation, Vol. 2(2), pp. 74-82, 1995. [5.17] A. M. Campana, B. Garcia, Baeyens, R. G. Willy, Aboul-Enein, Y. Hassan and Z. Zhang, J. Microcolumn Separations, Vol. 10(4), pp. 339-355, 1998. [5.18] S. C. Jacobson, R. Hergenroder, L. B. Kounty, M. J. Ramsey, “high-speed separations on a microchip”, Analytical Chemistry, Vol. 66, pp. 1114-1118, 1994. [5.19] S. C. Jacobson, R . Hergenroder, L. B. Kounty, R. J. Warmack, M. J. Ramsey, “Effects of Injection schemes and column geometry on the performance of microchip electrophoresis devices”, Analytical Chemistry, Vol. 66, pp. 1107-1113. [5.20] S. C. Jacobson, R. Hergenroder, L. B.Kounty, M. J. Ramsey, “Open Channel Electrochromatography on a microchip”, Analytical Chemistry, Vol. 66, pp. 2369-2373, 1994. [5.21] D. E. Raymond, A. Manz, H. M. Widmer, “Continuous Sample Pretreatment using a free-flow electrophoresis device integrated onto a silicon chip”, Analytical chemistry, Vol. 66, pp. 2858-2865, 1994. [5.22] S. M. Dharmatilleke, “MEMS Prototypical System Integration and Packaging for a Generic Microfluidic System”, Ph.D. Dissertation, University of Cincinnati, Cincinnati, OH, 2000. [5.23] N. C. Golubovic, “A MEMS Based Liquid Micro Chromatographic System Based Upon (110) Silicon”, Ph.D. Dissertation, University of Cincinnati, Cincinnati, OH, May 1998. [5.24] Q. Kang, “A Miniaturized Ion-exchange Liquid Chromatograph on a Silicon Wafer”, M.S. Thesis, University of Cincinnati, Cincinnati, OH, 1998. [5.25] B. H. Lapizco-encinas, “Micro Open Parallel Plate Separator: Performance and Applications” Ph.D. Dissertation, University of Cincinnati, Cincinnati, OH, 2003. [5.26] H. Seidel, L. Csepregi, A. Heuherger, H. Baumagartel, “Anisotropic Etching of Crystalline Silicon in Alkaline Solution”, J. of Electrochemical society, Vol. 137, pp. 3612-3632, 1990. [5.27] E. Herr, H. Baltes, “KOH etch rates of high-index planes from mechanically prepared silicon crystals”, 6th International conference on Solid-State sensors and actuators, San Francisco, CA, pp. 807-810, 1991. [5.28] K. Bean, “Anisotropic Etching of Silicon”, IEEE Transactions on Electron Devices, Vol. 25, pp. 1185-1193, 1978. [5.29] A. Holke, “Development of Silicon Chemical Wet Etching Toward The Realization Of An Integrated Thermal-Electronic Package”, Ph.D. Dissertation, University Of Cincinnati, 1998.

197 [5.30] Q. Kang, N. C. Golubovic, N. G. Pinto and H.T. Henderson, “A novel integrated micro ion-exchange separator and detector on a silicon wafer,” Chem. Eng. Sci., Vol. 56, No. 11, pp. 3409–3420, 2001.

198 Chapter 6 Multi-turn micro chromatograph on a chip

6.1 Limitations of µ-OPPS device

The µ-OPPS device is fabricated using anisotropic etching techniques of (110)

silicon. Due to microprocessing difficulties, deep channels could not be fabricated with

high aspect ratios. The experimentally tested µ-OPPS device had 50 µm wide channels

with 380 µm depth, giving the channel an aspect ratio of 7.6. The issues with uniformity

and roughness of the walls become severe using anisotropic etching techniques for high

aspect ratio structures. Oxygen as an impurity in silicon makes the surfaces rough in

anisotropic etching process. Very high aspect ratios in chromatographs produce excellent

separations in short times and also enhance the packaging density for portability

purposes. The multi-turn chromatographic device, explained below, would have very

high aspect ratios (>100). These high aspect ratios are achieved utilizing the Coherent

Porous Silicon (CPS) technology.

6.2 Multi-turn micro chromatograph The multi-turn micro chromatograph utilizes the high aspect ratios of CPS

structures (Fig. 1.1). Very low roughness of the CPS pore walls makes it ideal to coat the

stationary phase for interaction with the mobile phase. The length of each pore can be up

to the thickness of the silicon wafer. In our analysis, the length of each pore is assumed to

be 300 µm (a typical thickness of a 2” silicon wafer). To enable separation of species

with almost identical properties, a separation length of more than 300 µm is needed. To

provide longer separation lengths, the CPS pores are connected in a multi-turn fashion as

199 shown in Fig. 6.1. For parallel analysis and to reduce the pressure drop, a set of pores are

clubbed together. In our analysis each unit cell has 10x10 array of CPS pores. The pore

diameter of each pore is 5 µm and pitch between each pore is 10 µm. The total cross

sectional area of 1 unit cell of CPS pores is 100 µmx100µm. Chapter 1 discusses methods

to pattern CPS structures and will not be discussed here. A CPS wick with 10x10 array

pores, with a inter array spacing (d) is assumed to be available for further discussions.

Inlet Outlet

Fig. 6. 1: Cross section of a multi-turn micro chromatograph flow path. The flow direction is shown in arrows. The CPS pore diameters are typically around 5 µm and length of the pores around 300 µm.

6.3 Fabrication of multi-turn micro chromatograph The multi-turn micro chromatograph has a patterned CPS wick sandwiched

between a top and a bottom cap. The function of the top and bottom cap is to seal the chromatograph to avoid any leaking and also to provide the multi-turn path for the mobile phase. The number of turns to be fabricated is decided upon the determination of the length of the chromatograph needed. These discussions are provided in the model

200 developed later in this chapter. It is recommended to have even number of turns to reduce

the effect of mixing at each turn. The other function of the top and bottom cap in a multi-

turn chromatograph is to provide electrodes at each turn to sense the separation of the

species.

6.3.1 Material selection for top and bottom caps The functionality of the top and bottom cap is identical. The material and process

selection discussed below applies for both. The turn space in top and bottom cap can be

made in a shape of a trapezoid, hemispherical, elliptical or a rectangle. Due to recent

success in Ultrasonic Impact Grinding (UIG) [6.1] all the above referred shapes can be

transferred on a silicon or glass wafer. Due to the micromachining complexity of aligning

multiple features, the UIG method was not used in this work. Anisotropic etching of

silicon in (100) silicon produces trapezoidal etch features and in (110) produces two

vertical faces and two slanting faces. For modeling purposes, these different features

were assumed to be rectangular in nature. Using glass, both elliptical and hemispherical

shapes can be achieved using HF as the etchant. A cut-away cross section of a glass top

and bottom cap can be viewed in Fig. 6.2.

6.3.2 Providing electrodes at each turn Not only the top and bottom electrodes have to provide a seal in the multi-turn

chromatograph but they also have to supply with electrodes at each turn. These electrodes

are used to sense the ionic species by measuring the resistance between them. Providing detection electrodes at each turn will help to understand the mechanism of separation more precisely. The challenges encountered in this setup was to make sure no electrode crossed each other, electrodes should not provide any leak path from the device,

201 electrodes have to be inert to and should produce reliable data. Taking the above challenges into account, gold was selected as the ideal material for the purpose. It is inert to most mobile phases and has high electrical conductivity. To embed electrodes in glass and make sure no leakage paths “Dual Damascene” process is used.

Fig. 6. 2: Cutaway cross section of a multi-turn chromatograph with hemispherical turning spaces in glass top and bottom caps.

Dual damascene process is routinely used in microelectronic industry to layout copper interconnects. In multi-turn micro chromatograph, a variation of such process is used. A small cavity is photolithographically etched in silicon/glass substrate. This cavity is selectively evaporated with gold using liftoff lithographic process. This thin layer of gold acts as a seed layer. Using electroplating techniques gold is plated on the evaporated region. The electroplated gold covers the whole cavity and also is deposited on top of it.

A CMP process is undertaken to polish off the excess gold. This produces a silicon/glass

202 surface for subsequent bonding process to the CPS wafer. The gold electrode is embedded into the wafer and also provides a good seal to prevent any leakage of the mobile phase. See Fig. 6.3 for process sequence of the electrode placement process. A top view of the electrode placement can be seen in Fig. 6.4. A constant voltage is applied to the sets of electrodes and current is monitored in the circuit. The background electrical resistance of the mobile phase is the electrical resistance of the solvent used in the process. Any ionic species, injected for separation, when passing through the electrodes, while turning from one array of CPS pores to the next array will reduce the resistance and thereby increase the current in the monitoring electrical loop. Higher the polarity on the ion, more the reduction in electrical resistance. Larger the numbers of ions flowing per unit time also will increase the current in the circuit (current is defined as total number of charges flowing per unit time). Figure 6.4, 6.5, 6.6 and 6.7 show the design drawing with dimensions of the three components and package. These dimensions were arrived after considering using glass as the top and bottom caps and isotropic etching in HF to create a hemispherical turning space. A 300 µm diameter hemispherical turning space is provided.

To completely enclose the two arrays of CPS pores with each array width being 100 µm, left a inter-array pitch of 66 µm. The final dimensions are 5 µm CPS pore diameter with

10 µm pitch, a 10x10 rectangular array of CPS pores, with an inter array pitch of 166 µm.

The bonding of the CPS structure to the top and bottom caps would be performed with a sealant called Vacseal ®.

203

Fig. 6. 3: Process sequence of a dual-damascene process to provide electrodes in the turns of a multi- turn micro chromatograph.

Fig. 6. 4: Bottom view of electrode configuration on the top cap. Here, CPS pores and bottom cap& its electrode are shown for illustrative purposes (dotted lines). A voltage is applied between a set of electrode, and current is monitored.

204

Fig. 6. 5: Bottom view of the top cap of the multi-turn micro chromatograph. All dimensions are in micrometers.

Fig. 6. 6:Top view of the CPS of the multi-turn micro chromatograph. All dimensions are in micrometers.

205

Fig. 6. 7: Top view of the bottom cap of the multi-turn micro chromatograph. All dimensions are in micrometers.

Fig. 6. 8: Front view of the assembled package of the multi-turn micro chromatograph. All dimensions are in micrometers.

206 6.4 CFD modeling of pressure and velocity The turning plenum was modeled as a cube with 150 µm side. A mass flow inlet boundary condition was applied at the inlet and a boundary condition of 1 atmospheric pressure is applied on the outlet. Both water and methanol are used as the mobile phases.

Table 6.1 and Table 6.2 shows data gathered for pressure drops across a unit cell of the multi-turn micro chromatograph. A unit cell is defined as shown in Fig. 6.9. By plotting the pressure drop (P) in a unit cell vs. volumetric flow rate (v) in a log-log plot (Fig.

6.10), relationships between them were derived. Equation (6.1) is the curve fitted equation to calculate pressure for water and Eq. (6.2) is for methanol.

TABLE 6. 1: PRESSURE DROPS IN ONE UNIT WITH WATER AS THE MOBILE PHASE

Mass flow rate (kg/sec) vol flow rate m3/sec vol flow rate ml/min Pressure Drop (Pa) log(pressure) 1.00E-06 1.00E-09 0.60 7.72E+04 4.89 5.00E-06 5.00E-09 3.00 3.85E+05 5.59 1.00E-05 1.00E-08 6.00 8.02E+05 5.90 5.00E-05 5.00E-08 30.00 4.83E+06 6.68 1.00E-04 1.00E-07 60.00 1.09E+07 7.04 5.00E-04 5.00E-07 300.00 8.44E+07 7.93

TABLE 6. 2: PRESSURE DROPS IN ONE UNIT WITH METHANOL AS THE MOBILE PHASE Mass flow rate (kg/sec) vol flow rate m3/sec vol flow rate ml/min Pressure Drop (Pa) log(pressure) 1.00E-06 1.26E-09 0.76 5.30E+04 4.72 5.00E-06 6.32E-09 3.79 2.77E+05 5.44 1.00E-05 1.26E-08 7.58 5.90E+05 5.77 5.00E-05 6.32E-08 37.91 3.72E+06 6.57 1.00E-04 1.26E-07 75.82 8.62E+06 6.94 5.00E-04 6.32E-07 379.12 7.82E+07 7.89

207

Fig. 6. 9: Schematic of a unit cell. This consists of half the turning volume in both the top cap and the bottom cap and an array of CPS pores.

8.00

7.50

7.00

6.50

6.00 Log (Pressure Pa) (Pressure Log 5.50

5.00

4.50 Water Methanol 4.00 -0.5 0 0.5 1 1.5 2 2.5 3 Log (Vol. flow rate ml/min)

Fig. 6. 10: Log-log plot of pressure drop(Pa) in a unit cell vs. volumetric flow rate in ml/min

For water,

208 Log(P) = 0.067(Log(v))2 + 0.9724Log(v) + 5.1029 (6.1)

For methanol,

Log(P) = 0.0826(Log(v))2 + 0.9647Log(v) + 4.8469 (6.2)

To validate these results a two unit cell design was modeled. It was found that pressure drop created in a two unit cell design is double the pressure drop of a unit cell.

This confirms that the unit cell chosen is appropriate to represent all other cells in the chromatograph. Fig. 6.10 and Fig. 11 shows the CFD model absolute pressures in Pascal and velocity vectors in m/sec.

Fig. 6. 11: Contours of static absolute pressure in Pa of a two unit cell.

209

Fig. 6. 12: Velocity vectors in m/sec of a two unit cell.

6.5 Calculation of plate height According to Giddings et al. [6.2], the calculation of plate height of a cylindrical

column with radius r with a stationary phase coated with retention ratio R and flowing a mobile phase at an average velocity of V, which has a diffusion coefficient D of the

species to be separated is given by Eq. (6.3). A CPS pore is a cylindrical column and Eq.

(6.3) holds good for the multi-turn liquid chromatograph.

r 2V h = (6R 2 −16R +11) (6.3) 48D

For the µ-OPPS device discussed in the previous chapter, Lapizco-encinas [6.3]

developed a similar equation. The µ-OPPS device is assumed to have a rectangular cross

section with a width of 2b and a depth of 2d. Equation (6.4) calculates the height of the

each plate for a µ-OPPS device is given.

210 2(35R 2 − 84R + 51)b 2V h = (6.4) 105* D

The multi-turn micro chromatograph was compared to the µ-OPPS device using

Eqs. (6.3) and (6.5) for plate height calculation for similar retention ratios and average velocities. Here the diffusion coefficient of chlorine/bromine ion is considered (2*10-5 cm2/s). The radius of the CPS pore is considered as 2.5 µm. The depth of the µ-OPPS device channel was taken as 380 µm and the width as 150 µm. Plate heights were calculated for varying retention ratios and average velocities (m/s). Figure 6.13 shows a plot calculated from Eq. (6.3) of the plate height of the µ-OPPS device developed earlier at UC and Fig. 6.14 shows the same plot for the multi-turn micro chromatograph using

CPS structure calculated from Eq. (6.4). Sample data is shown in table 6.3 and 6.4. The data shows three orders magnitude reduction in plate height by using the multi-turn micro chromatograph over the µ-OPPS device. For example, if 300 mm of separation length is required by the µ-OPPS device to resolve two species, its takes only 0.3 mm to resolve the same two species using multi-turn micro chromatograph. This reduces the overall package dimensions and therefore helps in miniaturizing the device for portability.

211

Fig. 6. 13: Plot of plate height in meters of the µ-OPPS device developed earlier at UC.

Fig. 6. 14: Plot of plate height in meters of the multi-turn micro chromatograph using CPS structure.

TABLE 6. 3: SAMPLE DATA OF PLATE HEIGHT IN METERS FOR µ-OPPS DEVICE (S.I. UNITS)

212 Retention Ratio Velocity 1.10E+00 1.20E+00 1.30E+00 1.40E+00 1.50E+00 1.00E-02 5.09E-04 3.21E-04 5.09E-04 1.07E-03 2.01E-03 2.00E-02 1.02E-03 6.43E-04 1.02E-03 2.14E-03 4.02E-03 3.00E-02 1.53E-03 9.64E-04 1.53E-03 3.21E-03 6.03E-03 4.00E-02 2.04E-03 1.29E-03 2.04E-03 4.29E-03 8.04E-03 5.00E-02 2.54E-03 1.61E-03 2.54E-03 5.36E-03 1.00E-02

TABLE 6. 4: SAMPLE DATA OF PLATE HEIGHT IN METERS FOR MULTI-TURN MICRO CHROMATOGRAPH (S.I. UNITS)

Retention Ratio Velocity 1.10E+00 1.20E+00 1.30E+00 1.40E+00 1.50E+00 1.00E-02 4.30E-07 2.86E-07 2.21E-07 2.34E-07 3.26E-07 2.00E-02 8.59E-07 5.73E-07 4.43E-07 4.69E-07 6.51E-07 3.00E-02 1.29E-06 8.59E-07 6.64E-07 7.03E-07 9.77E-07 4.00E-02 1.72E-06 1.15E-06 8.85E-07 9.38E-07 1.30E-06 5.00E-02 2.15E-06 1.43E-06 1.11E-06 1.17E-06 1.63E-06

6.6 Modeling open tubular columns The multi-turn micro chromatograph falls under the category of open tubular liquid chromatography (OTLC). In an OTLC, the stationary phase is coated on the walls of the column and a mobile phase with species to be separated is flowed. The advantages of OTLC are discussed in the previous chapter.

Lapizco-encinas [6.3] derived a model to show the performance of a µ-OPPS device. In this work, her model is modified to be applied to a circular cross section of a

OTLC column. Figure 6.15 shows an OTLC column. The model would be developed in cylindrical coordinates. The main assumption in this model is that the effect of mixing is neglected in the turning of the mobile phase once it exits one set of CPS pores before it reaches the next set. Innovative ideas to reduce mixing in these turns are described later.

The model assumes a straight CPS pore of length L and radius (R). The flow is directed in the y direction as shown in Fig. 6.15.

213

Fig. 6. 15: OTLC column showing various directions in cylindrical coordinates.

By applying mass balance in cylindrical coordinates and assuming the velocity in the

radial direction is zero, we get

∂C ∂C ∂ 2C D ∂C ∂ 2C + v = D + + D (6.5) ∂t y ∂y ∂y 2 r ∂r ∂r 2

Where,

C – concentration is a function of time (t) and spatial coordinates (r,y)

t – time

D – diffusion coefficient

r – radial direction length unit

y – axial direction length unit

Vy – velocity in axial direction

The velocity and average velocity in a cylindrical column are related by

214 2 ⎛ ⎛ r ⎞ ⎞ V = 2V ⎜1− ⎟ (6.6) y avg ⎜ ⎜ ⎟ ⎟ ⎝ ⎝ R ⎠ ⎠ Replacing Vy in Eq. (6.5) using (6.6) gives

2 ∂C ⎛ ⎛ r ⎞ ⎞ ∂C ∂ 2C D ∂C ∂ 2C + 2V ⎜1− ⎜ ⎟ ⎟ = D + + D (6.7) avg ⎜ ⎟ 2 2 ∂t ⎝ ⎝ R ⎠ ⎠ ∂y ∂y r ∂r ∂r Equation (6.7) is iteratively solved with the following initial and boundary conditions.

Phase ratio in a OTLC column is defined as the ratio of the surface area of the stationary phase to the volume of the mobile phase

Asationaryphase 2ΠRL 2 φ = = 2 = (6.8) Vmobilephase ΠR L R Capacity factor (k’) is defined as the time of retention of specie divided by the time of solvent elution. If to be the time of solvent elution and tr is the time of specie elution. The capacity factor is defined as

t − t k'= r o (6.9) to

The capacity factor values obtained from the parallel plate chromatograph are listed in the table 6.5 below. The diffusion coefficients of the chemicals in water are also listed. In subsequent modeling, it is assumed that the capacity factor remains constant for a given stationary phase-specie pair. Since, the method of coating the stationary phase is identical in both the µ-OPPS device and the multi-turn micro chromatograph, the values in the table below can be safely assumed.

TABLE 6. 5 CAPACITY FACTOR VALUES AND DIFFUSION COEFFIECIENT VAULES FOR VARIOUS SPECIES IN WATER Chemical Name Capacity factor (k’) Diffusion coefficient (D) m2/sec

KCl 2.83 2e-9

215 KBr 3.17 2e-9

K2SO4 4.56 1.5e-9

Linear thermal isotherm coefficient (a) is defined as the ratio of the capacity

factor to the phase ratio.

k′ a = (6.10) φ

The accumulation (q) at the wall is defined as the product of linear thermal isotherm coefficient and concentration.

q = aC (6.11)

Initial condition, at time t=0, all concentrations in the column are zero

At t=0, C(r,y)=0 for all r and y values

Boundary conditions are given below,

1) At the column wall the solute diffusion flux is equal to the accumulation due to

adsorption.

∂C ∂q At r=R, − D = (6.12) ∂r ∂t

Combining Eqs. (6.11) and (6.12)

∂C ∂C At r=R, − D = a (6.13) ∂r ∂t

2) At the column end, the concentration gradient is zero. Infinite pore lengths is

difficult to model and therefore this boundary condition simulates a infinite pore

length. Sufficient care has to be taken choosing the value of L. Ideally it has to be

as large as possible (in our model L is chosen as 3 mm).

216 ∂C At y=L, = 0 (6.14) ∂y

3) At the axial center, symmetry in the radial direction is assumed. Therefore

concentration gradient across it is zero.

∂C At r=0, = 0 (6.14) ∂r

4) The last boundary condition is of injection of species, a uniform concentration of

species (CF) is injected for a injection time of (tf) at the start of the time (t) of the

model. Injection is done on one side of the column at y=0;

At y=0, C(r,0)=CF for 0tf (6.15)

6.6.1 Finite difference explicit (forward) scheme In a finite difference method, derivatives are replaced by differences rates. Here,

∆t represents an infinitesimal time division, ∆r represents an infinitesimal radial length division and ∆y represents an infinitesimal axial length division. The model is divided into infinitesimal small divisions in both temporal and spatial coordinates. Here, subscript r represents present radial division and r+1 represents the next radial division, y and y+1 hold the same distinction in the axial direction and t and t+1 represents the present and the next time division respectively. For clarity, time divisions are shown as superscripts, while radial and axial divisions are shown as subscripts. By using finite difference methods in explicit scheme, the following equations are used.

∂C C t+1 − C t = r,y r, y (6.16) ∂t ∆t

∂C C t − C t = r,y+1 r, y (6.17) ∂y ∆y

217 t t ∂C C r + 1, y − C r , y = (6.18) ∂r ∆ r

2 t t t ∂ C C r, y+1 − 2C r, y + C r, y−1 = (6.19) ∂y 2 ()∆y 2

2 t t t ∂ C C r +!, y − 2C r , y + C r −1, y = (6.20) ∂r 2 ()∆r 2

By substituting, Eqs. (6.16) - (6.20) in Eq. (6.7) results in,

C t+1 − C t ⎛ 2 ⎞ C t − C t C t − 2C t + C t r, y r, y ⎜ ⎛ r ⎞ ⎟ r, y+1 r, y r, y+1 r, y r, y−1 + 2Vavg 1− ⎜ ⎟ = D ∆t ⎜ ⎝ R ⎠ ⎟ ∆y ()∆y 2 ⎝ ⎠ (6.21) D C t − C t C t − 2C t + C t + r+1,y r,y + D r +!, y r, y r−1, y r ∆r ()∆r 2

By rearranging terms in Eq. (6.21),

⎛ ⎛ 2 ⎞⎞ 1 2Vavg ⎛ ⎛ r ⎞ ⎞ D 2D 2D C t+1 = C t ⎜∆t⎜ + ⎜1− ⎜ ⎟ ⎟ − − − ⎟⎟ r,y r, y ⎜ ⎜ ∆t ∆y ⎜ R ⎟ r∆r 2 2 ⎟⎟ ⎝ ⎝ ⎝ ⎝ ⎠ ⎠ ()∆y ()∆r ⎠⎠ ⎛ ∆tD ⎞ ⎛ ⎛ D D ⎞⎞ ⎛ ∆tD ⎞ + C t ⎜ ⎟ + C t ⎜∆t⎜ + ⎟⎟ + C t ⎜ ⎟ (6.22) r−1, y ⎜ 2 ⎟ r+1, y ⎜ ⎜ 2 ⎟⎟ r,y−1 ⎜ 2 ⎟ ⎝ ()∆r ⎠ ⎝ ⎝ r∆r ()∆r ⎠⎠ ⎝ ()∆y ⎠ ⎛ ⎛ 2 ⎞⎞ D 2Vavg ⎛ ⎛ r ⎞ ⎞ + C t ⎜∆t⎜ − ⎜1− ⎜ ⎟ ⎟⎟⎟ r,y+1 ⎜ ⎜ 2 ∆y ⎜ R ⎟⎟⎟ ⎝ ⎝ ()∆y ⎝ ⎝ ⎠ ⎠⎠⎠

Applying finite difference methods to initial and boundary conditions,

Initial condition,

For all r and y values

0 Cr,y = 0 (6.23)

1) Boundary condition at the pore wall r=R Eq. (6.13)

218 C t − C t C t+1 − C t − D R, y R−∆r, y = a R, y R, y (6.24) ∆r ∆t rearranging Eq. (6.24) gives,

t+1 t ⎛⎛ ∆tD ⎞⎞ t ⎛ D ⎞ CR,y = CR,y ⎜⎜1− ⎟⎟ + CR−∆r, y ⎜ ⎟ (6.25) ⎝⎝ a∆r ⎠⎠ ⎝ ∆r ⎠

2) Boundary condition at the end of the OTLC tube at y=L

C t − C t r,L r,L−∆y = 0 (6.26) ∆y

Rearranging Eq. (6.26) gives,

t t Cr,L = Cr,L−∆y (6.27)

3) Boundary condition at the center of the radial center r=0

C t − C t 0, y ∆r, y = 0 (6.28) ∆r

Rearranging gives,

t t C0, y = C∆r, y (6.29)

4) Boundary condition for the injection of the species

t t Cr,0 = CF , when 0tf (6.30)

Before proceeding with the model, it was critical to analyze the boundary

conditions, temporal and spatial increments in the model. The iterative process can be

unstable if proper care is not taken in choosing the right values. In our case, stability

criterion were met with a one microsecond time interval, 0.5 µm axial length increment

and 0.25 µm radial increment.

219 6.7 Model results The first model that was tested was for a 2.5 µm radius CPS pore with a length of

3000 µm. If the length of each pore is 300 µm, then 10 turns are involved to achieve the required length. Three ionic species were injected to understand the separation mechanisms. The choice of the species was based on available experimental and modeling data of the µ-OPPS device for comparison. Detectors were placed along the length of the column to detect ionic species. The capacity factors and diffusion coefficients used for KCl, KBr and K2SO4 are given in Table 6.5.

6.7.1 Number of plates and plate heights The average velocity of the mobile phase in the model is 2e-3 m/sec. A detector at

distance d will sense the mobile phase after 500d seconds. The solvent elution time is

termed as To. Table 6.6, 6.7 and 6.8 shows the data obtained from the model. Data

collected at each detector position is shown below. Solvent elution times (To), specie

elusion peak time (Tmax), and ratio of peak concentration (Cmax) with initial injection

concentration (Co), full width half maximum of the peak (FWHM) is also measured from

the plot. The FWHM is width of the concentration of the species at half of its maximum

concentration (refer Fig. 6.16). The number of plates till that detector position is given by

Eq. (6.31) and plate height is calculated by dividing detector position (DP) with number

of plates (Eq. (6.32). Lapizco-encinas [6.3] reported a plate height around 31-38 µm for

the µ-OPPS device. The plate height for the multi-turn micro chromatograph is in the

range of 3.8-4.7 µm. This is around 10 times smaller than the previous device.

Chromatographs from the model can be seen in Figs. 6.17 to 6.21.

220 FWHM Peak concentration Concentration Half Peak concentration

Time Fig. 6. 16: FWHM calculated from a peak of a specie concentration.

⎛ T ⎞ N = 5.54⎜ max ⎟ (6.31) ⎝ FWHM ⎠ DP H = (6.32) N

TABLE 6. 6: PLATE HEIGHT AND NUMBER OF PLATES CALCULATIONS FOR KCl

KCl Detector FWHM position To(msec Tmax(msec (msec Plate height (DP)(µm) ) ) Cmax/Co ) N (µm) 0.15912493 100 49.1 173 9 80 25.90729 3.85991733 0.11127432 200 98.2 353 3 115 52.19916 3.83147945 0.09052156 300 147.3 534 9 142 78.34578 3.82917897 0.07825046 400 196.4 714 8 164 105.0071 3.80926774 0.06991090 500 245.5 894 2 184 130.7824 3.82314569

TABLE 6. 7:PLATE HEIGHT AND NUMBER OF PLATES CALCULATIONS FOR KBr

Detector KBr position (DP) To(msec Tmax(msec FWHM (µm) ) ) Cmax/Co (msec) N H in microns 100 49.1 188 0.14453 89 24.71983 4.04533554 200 98.2 385 0.10108 128 50.12003 3.99042094 350 171.8 679 0.07604896 170 88.37949 3.96019502 400 196.4 778 0.071082 182 101.234 3.95124363 500 245.5 974 0.06350803 203 127.5368 3.9204363

TABLE 6. 8: PLATE HEIGHT AND NUMBER OF PLATES CALCULATIONS FOR K2SO4

221 K2SO4 Detector FWHM position (DP) To(msec Tmax(msec (msec (µm) ) ) Cmax/Co ) N H in microns 100 49.1 251 0.10117 128 21.30283 4.69421235 200 98.2 513 0.070888 182 44.0151 4.54389489 300 147.3 775 0.057705 224 66.31582 4.52380756 400 196.4 1038 0.049899 259 88.98257 4.4952624 500 245.5 1300 0.044591 289 112.0988 4.46035289

Fig. 6. 17: Chromatograph showing detection of KCl at 100, 200, 300, 400 and 500 µm.

222

Fig. 6. 18: Chromatograph showing detection of KBr at 100, 200, 350, 400 and 500 µm.

Fig. 6. 19: Chromatograph showing detection of K2SO4 at 100, 200, 300, 400 and 500 µm.

223

Fig. 6. 20: Chromatograph showing detection of KCl , KBr and K2SO4 at 100 µm.

Fig. 6. 21: Chromatograph showing detection of KCl , KBr and K2SO4 at 500 µm.

224 6.7.2 Curve fitting Figure 6.22 shows a plot of elution times of the species with respect to detector positions. The relation shown between detector position (DP) and elution time (Tmax) is

linear for all species. The curve fitted elution times are shown in Eqs. (6.33) to (6.35).

1400

1200

1000

800

600 Elute time (msec)

400

200 KCl K2SO4 KBr 0 0 100 200 300 400 500 600 Detector position (micrometers)

Fig. 6. 22: Plot of elution times in milliseconds with the detector position in micrometers.

For KCl, Tmax=1.803(DP)-7.3 msec (6.33)

For KBr, Tmax=1.965(DP)-8.3 msec (6.34)

For K2SO4, Tmax=2.623(DP)-11.5 msec (6.35)

Similar relationships were found for maximum concentration (Cmax) and number

of plates (N). Fig. 6.23 and Fig. 6.24 show plots of maximum concentration and number

of plates respectively. There curve fitted equations follow for each specie.

225 0.18

0.16

0.14

0.12

0.1

Cmax/Co 0.08

0.06

0.04

KCl 0.02 K2SO4 KBr

0 0 100 200 300 400 500 600 Detector position in micrometers

Fig. 6. 23: Plot of ratio of peak concentration with initial concentration with the detector position in micrometers.

-0.511 For KCl, Cmax= 1.6718(DP) (6.36)

-0.511 For KBr, Cmax= 1.5182(DP) (6.37)

-0.5091 For K2SO4, Cmax= 1.0535(DP) (6.38)

226 140

120

100

80

60 Number of plates of Number

40

20 KCl K2SO4 KBr 0 0 100 200 300 400 500 600 Detector position in micrometers

Fig. 6. 24: Plot of number of plates with the detector position in micrometers.

For KCl, N= 0.2626(DP) - 0.32 (6.39)

For KBr, N= 0.2566(DP) - 1.15 (6.40)

For K2SO4, N= 0.2266(DP) - 1.43 (6.41)

6.7.3 Resolution Resolution (R) between two peaks is defined as the ratio of two times the time difference of elution to the sum of base widths of each peak. Refer Fig. 6.25 and Eq. 6.42 for resolution between two peaks. The resolutions are plotted from the model of the KCl-

KBr pair, KBr-K2SO4 pair and KCl-K2SO4 pair (Fig. 6.26) and the curve fitted equations are shown.

227

Fig. 6. 25: Resolution of two peaks is calculated by how far the peaks are and how broad they are. After [6.4].

2∆Z 2(()t − (t ) ) R = = r B r A (6.42) WA +WB WA +WB

Resolution

0.9

0.8

0.7

0.6

0.5

0.4 Resolution

0.3

0.2

0.1 KCl-KBr KCl-K2SO4 KBr-K2SO4 0 0 100 200 300 400 500 600 Detector position in micrometers

Fig. 6. 26: Resolution of the 3 pairs of ions with respect to detector position.

0.5177 For KCl-K2SO4, R=0.0331(DP) (6.39)

0.5149 For KBr-K2SO4, R=0.027(DP) (6.39)

For KCl-KBr, R=0.0089(DP)0.5248 (6.39)

228 6.8 References

[6.1] P.S. Medis, H.T. Henderson, “Micromachining using ultrasonic impact grinding”, Journal of Micromechanics and Microengineering, vol.15, no.8 Aug. 2005, p 1556-9. [6.2] J.C. Giddings, J. P. Chang, M.N. Myers, J.M. Davis, and K.D. Caldwel, “Capillary liquid chromatography in field flow fraction-type channels,” Journal of chromatography, Vol. 255, 1983, pp. 359–379. [6.3] B. H. LAPIZCO-ENCINAS, “Micro Open Parallel Plate Separator: Performance and Applications”, Ph.D. dissertation, University of Cincinnati, Cincinnati, OH, 2003. [6.4] www.scimedia.com

229 Chapter 7 Conclusions and Future Work

7.1 Coherent porous silicon In this work, the working principles behind CPS photon pumped electrochemical

process are explained. This technology can be used to make high aspect ratio structures in silicon. By adjusting the current density in the etching process, it was proved that varying diameters of pores with time can be etched. Larger current densities were shown to produce larger diameter pores and vice versa. This technique can be used for pore shaping for applications, which necessarily do not need straight pores. In this work, several passivation processes are investigated to produce patterning of the CPS pores.

This process selectively grows CPS pores in pre-defined regions. Patterning of pores have several advantages, such as it provides, mechanical strength while packaging CPS pores, in LHP application, it provides non-porous region as a bonding interface for thermal conduction pathways to deliver heat more efficiently. From all the materials investigated as a HF mask, micro plasma enhanced CVD diamond was shown as the best masking material. Due to its limited availability for this lab, an alternative of P-type dopes polysilicon and a very thin layer of low stress silicon nitride combination produced the next best results. The finite stress in the low stress Si3N4 produced some skewing of

pore at the boundaries. A commonly used negative photoresist SU-8 as a masking layer

required non-aqueous HF etching solutions as adhesion problems were found in aqueous

based HF solutions. Anisotropically etched V grooves were necessary for CPS pores to

grow. This was shown with polysilicon as the passivating layer, when etch pits with RIE

were made. These etch pits were jagged and did not have a tip for field concentration; an

230 interpenetrating meso pore structure resulted from such etching. Gold film was used as an

optical mask on the backside of the wafer. Several modifications were performed to the

etching setup to incorporate continuous cycling of fresh HF into the etching rig, etching

at elevated HF temperatures and controlling the level of HF in the etching rig. Due to the

vertical setup of the etching rig, an etch catcher was designed and implemented. This

enabled etching the CPS pores completely through the silicon wafer in the CPS etching

process. This can save a lot of time in post-processing to make CPS capillaries.

7.2 Micro LHP In this work, it is concluded that heat delivery to the evaporating surface is one of

the foremost design criterion. In several generations of LHPs developed in this lab, heat was conducted around the periphery of a 1 sq. cm. CPS wick. The maximum power delivery of 6-7 W was achieved, as the top-cap temperatures were reaching a preset high.

The problem of heat delivery mechanism is studied in this work in both microfabrication and thermal stand point of view. Many thermal conduction pathway structures were proposed and investigated for optimum heat delivery. Trapezoidal rail design was chosen for its simplicity in fabrication and high thermal contact areas for packaging. This design was investigated further to understand and optimize the same. Several packages were modeled, including the effects of convective heat transfer to the surroundings, effect of evaporating temperatures, and effect of size of compensation chamber. The distribution of heat into evaporation and convection is predicted for various packages. It was concluded that the convection was dominated by the compensation chamber and the sizing of the same was appropriate to reduce convection. Less convection would imply more evaporation. The results from the modeling were experimentally confirmed for

231 some of the packages built. The effect of heat spreaders to reduce the top-cap temperature is also discussed. After analyzing the data from all the models, predictions were made for higher input power levels. Computation fluid dynamics model was developed to analyze pressure drops in the top-cap. The results showed that the maximum pressure drops were within the preset limit to avoid any capillary burst through of pores. A complete fabrication sequence of the top-cap is listed along with all the materials and chemicals needed.

Packaging techniques to build an evaporator package and subsequently the LHP are discussed. A patterned CPS wick was used as a primary wick and quartz wool was chosen as the secondary wicking material. Automation of logging the thermocouple data, pressure data and other key important comments helps us to gather volumes of data for data analysis. The 5th generation LHP was supplied with 18.5 W of input power, before the top-cap temperature reached its maximum preset value of 110oC. This compared to previous generation devices showed much higher heat delivery capability. The porosity of the wick being small was concluded for the failure of the device to deliver more power. A higher porosity wicks were investigated and developed. It was also concluded that by reducing the number of thermal conduction pathways from 32 to 10 would create space for more CPS pores and this eventually would lead to more porosity and more evaporation.

7.3 Multi-turn micro chromatograph A µ-OPPS device was earlier developed in this laboratory to separate ionic species using (110) silicon channels. This work showed that by using CPS pores as open tubular chromatograph has any advantages. The plate height was shown to be 10 times

232 lower than the one calculated for the µ-OPPS device. A model was developed to analyze the elution times, peak concentrations and number of plates. The model results showed drastic improvements in resolution of the peaks when compared to the same in the µ-

OPPS device. A scheme to micro fabricate the components and eventually packaging the multi-turn liquid chromatograph is described.

7.4 Future work 1) A preliminary resistance model was developed [7.1] using the electrical properties of the CPS etching setup. The model can be improved by adding the electrochemical properties of silicon etching in a photon pumped electrochemical setup.

2) Use of diamond films for CPS etching can be further investigated by patterning and measuring stresses developed under the film using Raman spectroscopy.

3) Development of non-aqueous HF electrolytes can help in using SU-8 as a masking layer. This would make the CPS etching pre-processing time very small. To make a CPS wick it takes couple of weeks now and this time can reduced to three days by using SU-8.

4) Effect of non-condensable gases in the LHP is highly debated. The disadvantage of having them in the working fluid is that it would increase the evaporating temperature, thereby increasing the chip temperature. The advantage of them being in the compensation chamber helps reduce nucleate boiling. Further investigation is required to understand their effect more thoroughly.

5) Thermal models indicated towards reducing the size of the compensation chamber.

Experimental results can be gathered by reducing the size and confirming the modeling results.

233 6) A multi-turn micro chromatograph is designed and modeled in this work. An experimental package is suggested in the future to be build and coated with the stationary phase and tested to confirm the results of the model.

7) The effects of mixing in the turning space of a multi-turn micro chromatograph are not thoroughly discussed in this work. Modeling of turning space with respect to mixing of species can be undertaken for further investigation.

7.5 References [7.1] S. Parimi, “Parametric Exploration of Automated Fabrication and Anodic Bonding of CPS for LHP Applications”, M.S. Thesis, University of Cincinnati, OH 2003.

234 Appendix A: Level Control Design Logic

When level A/B electrodes (refer Fig. A.1) contacts HF it is expressed as logic l

respectively and if they do not contact HF as logic 0. Normally open valve (C) and

normally closed valve (D) are given the same electrical actuation of +12 VDC. Normal condition of the valves is considered to be logic 1 and actuated condition as logic 0.

Actuation signal (E) is considered logic 0, when no actuation is given and logic 1 when actuation signal is given. A logic diagram is drawn to state all possible outcomes.

Actuation signal is reversed either when both level A and B touch HF or when both do not touch HF. The level of HF oscillates between level A and B.

Fig. A.1: Schematic of flow/temperature control system

235 TABLE A.1 LOGIC TABLE FOR FLOW CONTROL TABLE (X- DON’T CARE CONDITION). A B Valve (C) Diagram Valves(C) Actuation signal

Present state Next state (E)

0 0 0 1 0

0 0 1 1 0

0 1 0 - X X

0 1 1 - X X

1 0 0 0 1

1 0 1 1 0

1 1 0 0 1

1 1 1 0 1

Level controller A position HF level in the etching rig HF instantaneous flow Level controller B position direction

By utilizing karnaugh map (K-Map), the Boolean logic of E is determined as,

E = (A.C) + B

The electrically actuated valves employed in this design required around 2 A of current each in the actuation mode. Hence a total of 4 A of current was required for the two valves. No power supply at our disposal could provide such high currents. With the help of my colleague Praveen Medis, a valve actuator controller was designed. An actuation signal of 12 VDC is supplied to the valve controller from a computer controlled

236 power supply. The valve controller supplies 12 VDC at higher current rating. The electric schematic of the controller is shown in Fig. A.2.

Fig. A.2: Block diagram of valve controller

237 Appendix B: Oxidation Procedure Sheet

1. Check the furnace temperature and profile it with a thermocouple. The temperature should be 1070π C. If needed increase the temperature by 50π C/30 minute steps. 2. Clean wafers. 3. Bring V5 to dry (valve pointing to the right). 4. Let N2 to purge the lines => Turn V3 and V1 on and adjust the flow meter F1 so that the black ball in the meter reads 70 (V1 points in the left direction if ON and points up if OFF). 5. Open O2 cylinder valve (green cylinder, don’t use much force). Sign in. 6. Fill bubbler with fresh DI water (until black mark to prevent burning of plugs) 7. Make sure P1 is not plugged in the bubbler yet. 8. Dip wafers in 2% HF for 30 sec, rinse in DI water and blow dry. 9. Blow boat clean and load wafers. 10. Insert wafers in the furnace entrance region. 11. Slowly move the boat into transition region (where the red area begins) and let it sit for 5 minutes. 12. While waiting - Run O2 together with N2 => Turn V4 and V2 on and flow meter F2 so that the black ball in the flow meter is between 28-30 (0.5lit/minute, 5Psi.) - Start heating the bubbler => Switch transformer T1 ON and adjust T1 to 80. 13. Push boat slowly into position and put end cap on. 14. For Dry Oxidation - Switch N2 OFF => Turn V1 OFF 15. For Wet Oxidation - Reduce the bubbler temperature by turning transformer T1 to 65. - Plug P1 into bubbler. - Bring V5 to Wet Oxidation (valve pointing to the left) 16. For Dry Oxidation (after wet oxidation) - Bring V5 to Dry Oxidation (valve pointing to the right) - Turn T1 OFF 17. Take boat slowly out and let it sit in the transition region for 5 minutes. 18. Switch to N2 while waiting - Turn V2 OFF - Turn V1 ON - Bring O2 flow to 0 by using F2 on O2 flow meter - Turn V4 OFF - Close O2 cylinder valve and sign off (If pressure is lower than 100Psi Ron MUST know) 19. Take the wafers all the way out and let them cool. 20. Remove wafers from boat. 21. Re-insert boat into the furnace entrance and put end-cap on and place the boat holder in the furnace entrance.

238 22. Turn V1 OFF. 23. Bring N2 flow to 0 by using F1 on N2 flow meter. 24. Turn V3 OFF. 25. Take P1 out of the bubbler. 26. Double-check the valves, bubbler, and transformer. 27. Measure oxide thickness.

239 Appendix C: Reactive Ion Etching (RIE) Procedure Sheet

1. Check for oil in the pump under the table (little glass window) 2. Turn ON the RED power button on the backside (don’t use this to turn the system OFF). 3. Flow N2 to purge the chamber (Point to N2 on the flow panel (FP), flow rate =1.0). 4. Turn ON the cooler under the table (First turn ON MAIN and then REFRIDERATION). Set to 20. 5. Turn ON RF generator (red power button on the very left for 13.56MHz and red button on the very right for 30KHz). 6. Switch to 30KHz or 13.56MHz on the system panel (SP) accordingly. 7. Turn gases on FP (Point the N2 valve towards CF4 or SF6 and turn ON O2, CF4/SF6). 8. Turn ON gases on FP (silver switches point upwards). 9. Set Gas Select Switch (GSS) to the gas that needs to be adjusted (A to D, A is the bottom gas). 10. Set Operation Select Switch (OSS) to calibrate and use the little screw to adjust calibration if needed. 11. Set OSS to set and adjust desired flow rate of gases. Do the same for all gases. 12. Turn OFF gases not used in the process. 13. Place wafer in the chamber - VAC closed, VENT open, Cap UP, place wafer, cap DOWN. - VENT closed, VAC open, wait for pressure to stabilize. 14. RUN system - Gas#1 ON, wait for pressure to stabilize, Power ON, adjust power (if it is 13.56MHz, the switch is the black dial next to power switch on SP, if 30KHz the switch is the very right dial) 15. Stop RUN - Power OFF, Gas#1 OFF, wait for the pressure to be stable 16. Take wafer out - Make sure power OFF, gas#1 OFF and pressure is stabilized - VAC closed, VENT open, Cap UP, wafer out, Cap DOWN, VAC open.

17. System SHUT DOWN - VENT closed, Power OFF, Gas#1 OFF, VAC shut after 10 minutes, silver gas switches OFF, power dial close fully, RF power OFF, Emergency switch OFF, gases OFF on the FP, coolant OFF, Log Out.

240 Appendix D: RCA Cleaning

(1 hour 25 min) Solvent Cleaning (14 min) 1. Clean wafers in Acetone for 5 minutes. 2. Clean wafers in Methanol for 6 minutes. 3. Rinse wafers in DI water for 3 minutes. Base BOE/HF and Acid Clean Procedure Sheet (1 hour 11 min) Base Clean (32 min) 1. Mix 250ml of DI water and 50ml of NH4OH in a 300ml beaker. For doing cleaning wafers for anodic bonding use 200 ml of DI water. 2. Heat it to 70π C (+ or - 5π C) (10 minutes) 3. Remove from hotplate. 4. Add 50ml of H2O2 and wait for the solution to bubble. 5. Wait for 2 minutes. 6. Clean wafers in base solution for 15 minutes. 7. Rinse in DI water for 5 minutes. Do not rinse with DI for bonding, instead blow dry with nitrogen and put glass and Si together. Do not perform the BOE/HF dip or acid clean for wafers to be bonded. BOE/HF Dip (7 min) 1. BOE (Buffered Oxide Etch) – 3:3:1::NH4F(40%):D.I.:HF(48%) or HF (5 wt%) for 2 min. 2. Rinse in DI water for 5 minutes. 132 Acid Clean (32 min) 1. Mix 200ml of DI water and 50ml of HCl in a 300ml beaker. 2. Heat it to 70π C (+ or - 5π C) (10 minutes) 3. Remove from hotplate. 4. Add 50ml of H2O2 and wait for the solution to bubble. 5. Wait for 2 minutes. 6. Clean wafers in acid solution for 15 minutes. 7. Rinse in DI water for 5 minutes. Blow-dry with nitrogen.

241 Appendix E: KOH Etch Rates

KOH ETCH RATES FOR <100> SILICON WAFERS IN MICRONS PER HOUR 20°C 30°C 40°C 50°C 60°C 70°C 80°C 90°C 100°C 10% KOH 1.49 3.2 6.7 13.3 25.2 46 82 140 233 15% KOH 1.56 3.4 7 14 26.5 49 86 147 245 20% KOH 1.57 3.4 7.1 14 26.7 49 86 148 246 25% KOH 1.53 3.3 6.9 13.6 25.9 47 84 144 239 30% KOH 1.44 3.1 6.5 12.8 24.4 45 79 135 225 35% KOH 1.32 2.9 5.9 11.8 22.3 41 72 124 206 40% KOH 1.17 2.5 5.3 10.5 19.9 36 64 110 184 45% KOH 1.01 2.2 4.6 9 17.1 31 55 95 158 50% KOH 0.84 1.8 3.8 7.5 14.2 26 46 79 131 55% KOH 0.66 1.4 3 5.9 11.2 21 36 62 104 60% KOH 0.5 1.1 2.2 4.4 8.4 15 27 47 78

KOH ETCH RATES FOR SILICON DIOXIDE IN NANOMETERS PER HOUR 20°C 30°C 40°C 50°C 60°C 70°C 80°C 90°C 100°C 10% KOH 0.4 1.22 3.5 9.2 23 54 123 266 551 15% KOH 0.63 1.91 5.4 14.4 36 85 193 416 862 20% KOH 0.88 2.66 7.5 20 50 118 268 578 1200 25% KOH 1.14 3.46 9.8 26 65 154 348 752 1560 30% KOH 1.42 4.32 12.2 32.5 81 193 435 940 1950 35% KOH 1.44 4.37 12.4 32.8 82 195 440 949 1970 40% KOH 1.33 4.03 11.4 30.3 76 180 406 875 1820 45% KOH 1.21 3.67 10.4 27.5 69 163 369 797 1650 50% KOH 1.08 3.28 9.3 24.6 62 146 330 713 1480 55% KOH 0.95 2.87 8.1 21.6 54 128 289 624 1290 60% KOH 0.81 2.45 6.9 18.4 46 109 246 532 1100

242 Appendix F: Open Tube Liquid Chromatograph Matlab Program function chroexp(K1,D1)

%Matlab program for calculation of concentration in a cylindrical tube %Prepared by Srinivas Parimi & Karunanand Ogirala %Input command at Matlab prompt >>chroexp 2.83 2e-9 %The above input gives the program name and then capacity factor %and diffusion coefficient of KCl in S.I. units %Output is a concentration vector matrix at each detector value with %respect to time. Each data point is recorded at time equal to matrix %position x logint x delt format short g;

%Inputs to the program

%Capacity factor K=str2num(K1); %Volumetric flow rate volflow=40e-15; %Radius of the cylinder R=2.5e-6; %Length of the cylinder L=3000e-6; %Volume of Solute+Solvent injection VI=0.5e-16; %Initial concentration of solute CI=1; %Diffusion coefficient D=str2num(D1); %radial increment delr=2.5e-7; %length increment dely=5e-7; %time increment delt=1e-6; %log interval logint=1000; %detector at det1=100e-6; det2=200e-6; det3=300e-6; det4=400e-6; det5=500e-6;

%Dependent parameters

%area of stationary phase As=2*pi*R*L; %volume of mobile phase Vm=pi*R^2*L;

243 %phase ratio phi=As/Vm; %linear adsorption isotherm coefficient a=K/phi; %Velocity average Vavg=volflow/(pi*R^2); %Time of injection TI=VI/volflow; %Total time of simulation T=L/Vavg; %time divisions i= round(T/delt); %radial divisions m=round(R/delr); %length divisions n=round(L/dely); %Injection time divisions p=round(TI/delt);

%general variables flag=0;

%coefficient variables atemp1=0; btemp1=0; ctemp1=0; dtemp1=0; etemp1=0;

%concentration matrices with initial conditions C1=zeros(m+1,n+1); C2=zeros(m+1,n+1); C3=zeros(round(((i+1)/logint)),5);

%time iterations for temp=2:i+1 atemp1=(1-(2*D*delt*((1/dely^2)+(1/delr^2))));

%radial iterations for temp1=2:m r=R*(temp1)/(m+1); btemp1=(delt*((-D*delr)+(2*D*r))/(2*r*delr^2)); ctemp1=(delt*((D*delr)+(2*D*r))/(2*r*delr^2)); dtemp1=(delt*((dely*((1-(r^2/R^2))*Vavg))+D)/(dely^2)); etemp1=(delt*((-dely*((1-(r^2/R^2))*Vavg))+D)/(dely^2));

%Stability criterion verification if((atemp1<0)|(btemp1<0)|(etemp1<0)) flag=1; disp('Stability Criterion failed at'); disp('time division'); disp(temp); disp('radial division'); disp(temp1); disp('length division'); disp(temp2);

244 if(atemp1<0) disp(['r,y coefficient =',num2str(atemp1)]); disp('Reduce time increment'); end if(btemp1<0) disp(['r-1,y coefficient =',num2str(btemp1)]); disp('Reduce radial increment'); end if(etemp1<0) disp(['r,y+1 coefficient =',num2str(etemp1)]); disp('Reduce length increment'); end break; end

%length iterations for temp2=2:n atemp=atemp1*C1(temp1,temp2); btemp=btemp1*C1(temp1-1,temp2); ctemp=ctemp1*C1(temp1+1,temp2); dtemp=dtemp1*C1(temp1,temp2-1); etemp=etemp1*C1(temp1,temp2+1); C2(temp1,temp2)=atemp+btemp+ctemp+dtemp+etemp; end end if(flag==1) break; end

%boundary condition at r=0 DC/Dr=0 C2(1,:)=C2(2,:);

%boundary condition at y=L DC/Dy=0 C2(:,n+1)=C2(:,n);

%boundary condition at r=R C2(m+1,:)=C1(m+1,:)-((D*delt*(C1(m+1,:)-C1(m,:)))/(a*delr));

%boundary conditon for injection if(temp

%logging intervals if(rem(temp,logint)==0) tempvar=(temp*100/(i+1)); disp([int2str(tempvar),'% complete']); C3(round(temp/logint),1)=sum(C2(:,round(det1/dely))); C3(round(temp/logint),2)=sum(C2(:,round(det2/dely))); C3(round(temp/logint),3)=sum(C2(:,round(det3/dely))); C3(round(temp/logint),4)=sum(C2(:,round(det4/dely))); C3(round(temp/logint),5)=sum(C2(:,round(det5/dely))); end

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%change to next iteration C1=C2; C2=zeros(m+1,n+1); end

%output C4=C3(:,1); C5=C3(:,2); C6=C3(:,3); C7=C3(:,4); C8=C3(:,5); save str1.mat C4; save str2.mat C5; save str3.mat C6; save str4.mat C7; save str5.mat C8;

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Silicone Elastomer (Sly-guard) Dow Corning Corp, Midland, MI 48686 (517) 496-6000

251