Intel Management Engine Deep Dive
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Intel Management Engine Deep Dive Peter Bosch About me Peter Bosch ● CS / Astronomy student at Leiden University ● Email : [email protected] ● Twitter: @peterbjornx ● GitHub: peterbjornx ● https://pbx.sh/ About me Previous work: ● CVE-2019-11098: Intel Boot Guard bypass through TOCTOU attack on the SPI bus (Co-discovered by @qrs) Outline 1. Introduction to the Management Engine Operating System 2. The Management Engine as part of the boot process 3. Possibilities for opening up development and security research on the ME Additional materials will be uploaded to https://pbx.sh/ in the days following the talk. About the ME About ME ● Full-featured embedded system within the PCH ○ 80486-derived core ○ 1.5MB SRAM ○ 128K mask ROM ○ Hardware cryptographic engine ○ Multiple sets of fuses. ○ Bus bridges to PCH global fabric ○ Access to host DRAM ○ Access to Ethernet, WLAN ● Responsible for ○ System bringup ○ Manageability ■ KVM ○ Security / DRM ■ Boot Guard ■ fTPM ■ Secure enclave About ME ● Only runs Intel signed firmware ● Sophisticated , custom OS ○ Stored mostly in SPI flash ○ Microkernel ○ Higher level code largely from MINIX ○ Custom filesystems ○ Custom binary format ● Configurable ○ Factory programmed fuses ○ Field programmable fuses ○ SPI Flash ● Extensible ○ Native modules ○ JVM (DAL) Scope of this talk Intel ME version 11 , specifically looking at version 11.0.0.1205 Platforms: ● Sunrise Point (Core 6th, 7th generation SoC, Intel 100, 200 series chipset) ● Lewisburg ( Intel C62x chipsets ) Disclaimer ● I am in no way affiliated with Intel Corporation. ● All information presented here was obtained from public documentation or by reverse engineering firmware extracted from hardware found “in the wild”. ● Because this presentation covers a very broad and scarcely documented subject I can not guarantee accuracy of the contents. ● The goal of this talk is to introduce people to the subject and introduce new tools, as such parts of the background information have been discovered/published by other researchers. Working with ME firmware images ● File format already extensively documented by Positive Technologies team (Mark Ermolov, Dmitry Sklyarov, Maxim Goryachy) ○ https://www.blackhat.com/docs/eu-17/materials/eu-17-Sklyarov-Intel-ME-Flash-File-System-Ex plained-wp.pdf ○ https://www.troopers.de/downloads/troopers17/TR17_ME11_Static.pdf ● Ready to use tools are available ○ Unpacks code, metadata: ■ ptresearch/unME11: Intel ME 11.x Firmware Images Unpacker ○ Unpacks code, metadata, config archives, config FS ■ platomav/MEAnalyzer: Intel Engine Firmware Analysis Tool ○ Unpacks/Repacks config archives ■ peterbjornx/meimagetool: Image manipulation tools for the Management Engine firmware ● Flash Image Tool contains XML descriptions of formats that can be retrieved using binwalk Understanding the ME: Firmware Partitions IDX NAME START SIZE TYPE ● FTPR/NFTP ○ Read only filesystem 1: [FTPR] 1000:A7000 Code ○ Contains firmware code 2: [FTUP] 110000:AC000 Code ○ Mounted on /bin 3: [DLMP] 0:0 Code ■ FTPR is recovery/normal boot partition. 4: [PSVN] E00:200 Data ■ NFTP binaries not used during recovery. 5: [IVBP] 10C000:4000 Data 6: [MFS ] A8000:64000 Data ● MFS 7: [NFTP] 110000:AC000 Code ○ Read/write filesystem 8: [ROMB] 0:0 Code ○ Contains configuration data, state 9: [FLOG] 1BC000:1000 Data ○ Initialized by Flash Image Tool 10: [UTOK] 1BD000:2000 Data ● FLOG -> Crash log 11: [ISHC] 0:0 Code ● UTOK -> Unlock Token ● ROMB -> ROM Bypass Understanding the ME: Code partitions ● Code Partitions contain modules ○ .mod files are loadable data/code (extension added by unME11) ○ .met files are metadata (Converted by unME11 to .txt) ● and the partition manifest ○ Filename : <partition>.man ○ Same general format as the metadata files, but has header prepended. Understanding the ME: Metadata ● Type-Length-Value store, entries are called extensions ● Converted to human readable form by unME11 ● Extensions: ○ Data module info Code module info ○ typedef struct { ○ Shared Library info ○ Process info uint32_t tag; ○ MMIO ranges uint32_t length; ○ Device file definitions } met_ext_t; ○ ...and more... See also: https://github.com/peterbjornx/meloader/blob/master/include/manifest.h Code verification chain ERRATUM (Added after talk): Intel Key hashes are in boot ROM, not fuses. Fuses only select which keys are actually trusted. Analysing a simple module ● The module file itself is a flat binary ● Metadata contains memory space info ○ Base load address is easy to find, and usually does not vary across modules within a single firmware version Missing code section? Missing code section? Missing data section? ME shared libraries ● No dynamic linker! ● Jump vector table with fixed address entry points ● Normal SysV i386 calling convention ME shared libraries ● syslib.mod ○ Entry point addresses vary per firmware version ○ Contains ■ hosted libc ■ libsrv ■ libheci ■ crypto library ■ … ● mask ROM ○ Entry point addresses fixed per chipset family (eg. SPT/LBG). ○ Base: 0x0000_1000 ○ Contains ■ freestanding libc ■ MMIO ■ miscellaneous utility routines Analysing a simple module ● The module file itself is a flat binary ● Metadata contains memory space info ○ Base load address is easy to find, and usually does not vary across modules within a single firmware version romlib_func_1000? syslib: clear_ctx Missing data section? C Runtime Startoff (crtso) Data sections ● Initialized data is appended to .rodata ● Before crtso even runs it is copied over to “.bss” ● Addresses can be inferred from code or metadata. Data sections ● Processes use flat 32-bit memory model ● Base address and various area sizes are stored in metadata. ● System library state resides in program-specified area. For a minimal working implementation of this, see: GitHub meloader repo: user/loader/map.c Familiar APIs ME provides many familiar POSIX APIs: ● libc: ○ read(), write(), close(), open(), fcntl(), ioctl(), select() ○ chdir(), stat(), ○ nearly everything in string.h ○ exit() ○ malloc(), free(), calloc() ● pthreads ○ pthread_create(), … ○ pthread_mutex_{lock,unlock} ○ ... Example driver main() function cookie = cookie_value; memset(&funcs, 0, 40); funcs.open = VdmDrvOpenCallback; ... libsrv callbacks funcs.select = VdmDrvSelectCallback; funcs.var_1C = sub_2D062; sven_init(7); ... event_fd = open("/dev/events", 2); POSIX file IO ... if ( srv_init(&g_srv_ctx, 24, &funcs, 0, 5) ) { libsrv init sven_catalog0i(2, 0x320033); goto LABEL_7; SVEN tracing } return srv_task(&g_srv_ctx); libsrv main loop Trace output: SVEN ● Intel Software Visible Event Nexus ● Trace print format strings are replaced by message IDs ○ These are reasonably stable for given platform/major version. ● Output goes to Trace Hub ○ Can be read back from host using memory trace ○ Can be read over debug interface EVEN WITHOUT UNLOCK ● Intel System Studio used to contain decoder and dictionary ○ GREEN dictionary is not very useful, only has a handful of messages ○ System Studio 2018 beta had a nearly complete one for LBG void sven_catalog<n>( int level, int id, ... ); void sven_printf( const char *fmt, ... ); void sven_printf_l( int level, const char *fmt, ... ); void sven_init( int mmio ); ME driver overview: device files ● Unix-style special files under /dev ○ One major number per module ○ Major, minor numbers and names specified in metadata ○ Drivers implement read(), write(), open(), close(), ioctl() for device files ○ Not just for device drivers, used for all high-level services. ● syslib contains convenient framework for implementing this ○ Implementation details hidden, just provide callbacks Ext#9 SpecialFileProducer[3]: major_number=0x0018 1: vdm_gde access_mode:0660, user_id:0x0074 group_id:0x0037 minor_number:00 2: vdm_pavp access_mode:0660, user_id:0x0074 group_id:0x018B minor_number:01 3: vdm_rosm access_mode:0660, user_id:0x0074 group_id:0x018C minor_number:02 ME driver overview: libsrv Framework for drivers, allows driver to only implement simple callbacks. ● open(),close() implementations return their status, ● read(),write(),ioctl() call a reply function with their result data and status. ● libsrv also allows handling hardware interrupts and power state changes. typedef int (*ioctl_cb)(int info, int fd, int gtid, int request, void *par); typedef int (*open_cb)( srvctx_t *ctx, int minor, int gtid, int *p_fd, void *ok); typedef int (*close_cb)( srvctx_t *ctx, int fd); int srv_task( srvctx_t *ctx ) int srv_init( srvctx_t *ctx, int major, srvfuncs_t *ops, srvcli_t *clients, int maxclients ) int srv_ioctl_reply( srvctx_t *ctx, int fd, int gtid, int ?, int status, void *p ) Accessing hardware What’s this? . Ext#8 MmioRanges[41]: ... CF base:F00A0000, size:00006000, flags:00000003 RAVDM D7 base:F5050000, size:00010000, flags:00000003 ICC_CONTROLLER DF base:F0090000, size:00006000, flags:00000003 FTPM Accessing hardware ● MMIOs are accessed through ROM library functions ● The MMIO ranges are defined in the manifest ● mmio = (mmio_list_index * 8) | 7 ○ Seem familiar to anyone? . Ext#8 MmioRanges[41]: ... CF base:F00A0000, size:00006000, flags:00000003 RAVDM D7 base:F5050000, size:00010000, flags:00000003 ICC_CONTROLLER DF base:F0090000, size:00006000, flags:00000003 FTPM Accessing hardware ● MMIOs are accessed through ROM library functions ● The MMIO ranges are defined in the manifest ● mmio = (mmio_list_index * 8) | 7 ○ Seem familiar to anyone? void write_seg_32(int mmio, int offset, int value); void write_seg_16(int mmio, int offset, short value); void write_seg_8 (int mmio, int offset, char value); int read_seg_32 (int mmio, int offset); int read_seg_16 (int mmio, int offset);