DOCSLIB.ORG

C-DAC Activities on Many Cores and Accelerators

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
C-DAC Activities on Many Cores and Accelerators CC--DACDAC HPCHPC ActivitiesActivities && ExperienceExperience onon AcceleratorsAccelerators Goldi Misra Group Coordinator & Head HPC Solutions Group C-DAC, India Thematic R & D Areas of C-DAC • High Performance Computing & Grid Computing • Hardware, Software, Systems, Applications, Research, Technology, Infrastructure • Multilingual Computing and Heritage Computing • Tools, Fonts, Products, Solutions, Research, Technology Development • Health Informatics • Hospital Information System, Telemedicine, Decision Support System, Tools, Traditional Knowledge-base and DSS for Medicine • Software Technologies including FOSS • FOSS, Multimedia, ICT for masses, E-Governance, Geomatics, ICT4D • Professional Electronics including VLSI & Embedded Systems • Digital Broadband and Wireless Systems, Network Technologies, Power Electronics, Real- Time Systems, Control Electronics, Embedded Systems, VLSI/ASIC Design, Agri Electronics, Strategic Electronics • Cyber Security & Cyber Forensics • Cyber Security tools, technologies & solution development, Research & Training Education and Training forms an important component of C-DAC activities cutting across the above Thematic Areas Kaleidoscope of C-DAC Products Spectrum of HPC Activities Technologies Trainings Systems Spectrum of HPC Activities Solutions National Facilities Applications PARAM Series of Supercomputers PARAM YUVA Indian Supercomputing Scenario C-DAC’s PARAM 8000, India’s first Gigascale 1990 Supercomputer ANUPAM- BARC PARAM – C-DAC ANURAG- DRDO Flowsolver- NAL Parallel 1990 Initiatives -2000 Several HPC Facilities setup including those at C-DAC, IISc, BARC, 2000 NAL, CMMACS, DRDO, NCMRWF -2007 C-DAC’s PARAM Padma, India’s first Terascale Supercomputer 2002 Launched (Rank 171 in Top 500 List) CRL’s EKA ranks 4th in Top 500 List 2007 9 Terascale Systems from India in Top 500 List C-DAC’s PARAM Yuva Launched (Rank 68 in Top 500 List) 2008 Only 4 systems from India in Top 500 List as against 41 systems from China 2010 India’s best system ranked 47 in Top 500 List India Govt. takes initiative for a big leap in Supercomputing 2012 6 HPC Activities @ C-DAC National HPC Facilities NPSF @ Pune (1998) PARAM 10000 system CTSF @ Bangalore (2003) PARAM Padma System NPSF @ Pune (2009) PARAM Yuva System HPC Applications: 1988 -2011 CFD CFD Electro-magnetics (Launch Vehicle)‏ Weather Forecasting T80 T172 RTWS, WRF IC Engine, Protein structure FRP Computing Seismic inversion Evolutionary Seismic inversion, pre and post stack Seismic Pre and post stack migration, 1D models Modelling migration, 2D & 3D models - Protein folding (300 ns), Bio Protein folding (1 ns) REMD, MEME informatics Fracture FRP ,Smart Composites Mechanics Structures Structural Engineering ’88 … … ’91 … … … ‘95 … … ‘98 … ‘00 … ‘02 … … ‘08 … … ‘11 1st Mission 2nd Mission 3rd Mission 4th Mission Garuda 54 TF • InClus- HPC cluster Building Toolkit • CHReME – HPC Resource Management Engine • ONAMA – HPC package for academic institutions • Parallel File System InClus Integrated Cluster Solution InClus addresses the need of technical challenges in the field of HPC, it makes cluster easy. • Web and Desktop based GUI • Provision of Operating Systems on physical as well as virtual machines: RHEL5.x, RHEL 6, CentOS5.x, CentOS6.x • Development platform; Compilers, Debuggers • Scheduler and resource manager • Policy based accounting • High availability support • Remote console. Powerful shell support. • Quickly set up and control Management node services: DNS, HTTP, DHCP, TFTP • User Management • GPU Support • Log monitoring • Critical Error/ Warning reporting via Web interface • SMS/Mail alerts for checking job status CHReME C-DAC’s HPC Resource Management Engine CHReME addresses challenge of efficient and easy usage and management of resources of HPC systems CHReME portal is an end-user job submission, management and monitoring tool that works with various schedulers or Workload Managers such as Torque, OpenPBS, Sun Grid Engine, Moab, Load leveler, etc. Timely E-mail notification regarding job status; personalized job list and job status information Secure credential specific access on web through https Allows users to configure their execution environment through compilers and libraries selection, scheduling parameters etc. Scientific & Research Applications specific portals ONAMA With a mission of “ Equipping Premier Academic Institutions with top of the class HPC solutions from C-DAC packaged with open source software and world class services. This would enable the Premier Academic Institutions to benefit in terms of service delivery and affordability.” Onama is an integrated package which opens a new door to future technocrats, providing them a Quantum leap in developing a firm understanding through HPC in several engineering disciplines. Onama comprises of a well selected set of parallel & serial applications and tools across various engineering disciplines such as Computer Science, Mechanical, Electronics and Communication, Electrical, Civil, Chemical engineering etc. Besides, it consists of a number of nVIDIA CUDA enabled applications in several domains such as molecular dynamics and physics. • Parallel, Multicore and Manycore Programming • System Administration & Management • Network Security & Audits • Storage Management Technologies • Facility Operations Management and Maintenance • GPU based Programming • HPC User Symposiums • C-DAC Certified HPC Professional Indigenous capability in • Engineering & managing of large supercomputing systems and national supercomputing facility • HW & SW skills in designing System Area Network • Chip/PCB/system design skills (HW) • Networking stack & system software (SW) • Prototyping/Validation/Certification/Benchmarking/Training • HW & SW skills in designing RC accelerators • RC HW having upto 12 million logic gates for computing, with different host interfaces • Porting applications/algorithms as HW circuits to achieve large speed-ups • SW ecosystem design for various operating systems (contd…) • Porting and scaling applications on large clusters • Several collaborative projects in Science & Engineering research • Increase of HPC user community in the nation • Publications Activities on Intel Many Integrated Core (MIC) Architecture Knights Ferry Co-Processor Card • 1.2 GHz, upto 32 cores, 2 GB GDDR5, 4 threads/core, 300W, 45nm process • MIC Platform Software Stack (MPSS) 1.0 and 2.0 • Development Tools: Intel FORTRAN & C++ Compilers, Intel MPI and OpenMP, Intel MKL, IPP, TBB, ARBB, Cilk Plus, Support for Eclipse IDE, OpenCL support in future Expected Specifications of Knights Corner • More than 50 cores per chip • 22nm process size • ~1TF • Mathematical Algorithms: Mandelbrot Set (An example of a simple mathematical definition leading to complex behavior) • Molecular Dynamics: MD_OPENMP • Oceanography: Tsunami-N2 (Numerical simulation program with the linear theory in deep sea and with the shallow water theory in shallow sea and on land with constant grid length in the whole region) • Astrophysics: CAMB (Code for Anisotropies in the Microwave Background [CAMB] computes cosmic microwave background spectra given a set of input cosmological parameters) • Linear scalability and results are encouraging • Based on familiar x86 architecture • Run on standard, existing programming tools and methods • Minimal Porting efforts • No reprogramming for native compilation and execution • Directive based offloading • Availability of tools (profilers, debugging, monitoring etc.) We intend to work on the commercial product KNC to get an exact idea of performance, scalability etc. Application Accelerators Facts Long-term viability of the technology Technology is changing at a faster pace Many technology providers do not stay in business long enough Application development methodology and tools Differ substantially from conventional multi-core programming Applications can be tuned to achieve a good performance Require a deep study of the underlying hardware architecture to achieve a good performance Codes are platform dependent Emerging Standards OpenCL for many-core architectures GPUs OpenFPGA efforts for reconfigurable computing • 2nd and 3rd gen Reconfigurable Computing (RC) platform • Uses RC hardware with state of the art FPGAs • RC hardware has upto 12 million logic gates for computing with different host interfaces • Avatars – hw routines/ libraries • Varada – APIs, kernel agent, Linux support • Eco-friendly HPC solution Digital Systems Design System Scientific Software Application Design C-DAC RC C-DAC’s Expertise Hardware Library PCB Design Design & Assembly (Avatars) One of the enabling technologies useful in RC is the field-programmable gate array (FPGA). Putting FPGAs on add-on cards or motherboards allow FPGAs to serve as compute- intensive co-processors. FPGAs can be re-configured over and over again, to perform multitude of operations. This enables application-specific, dynamically "programmable" hardware accelerators. Application: Smith-Waterman Sequence Search Nodes: HP DL580G5 Quad Core Quad Database: Protein Socket Xeon 2.93 GHz Query Software RC Speed-Up 3 hrs 8 min (256 (16 Per card cores) Cards) in terms of cores AAN10358 2 hr 18 22 100.1 min 31 min 8 sec sec NP_597681 2 hr 41 25 100.4 min 2 min sec 39 sec 29 min XP_001065 3 hr 8 29 101.2 Time 955 min 28 min sec 47 sec 16 nodes 16 RC (256 Cores) 3000 2250 1500 FPGA 750 CPU Frequency(MHz) 0 1990 1992 1996 1998 2000 2002 2004 2006 2007 Year 2008 Source: Intel, IBM, Xilinx, Altera datasheets • Scientific and engineering applications
Load more

Recommended publications
  • Sun-Earth System Interaction Studies Over Vietnam: an International Cooperative Project
    Ann. Geophys., 24, 3313–3327, 2006 www.ann-geophys.net/24/3313/2006/ Annales © European Geosciences Union 2006 Geophysicae Sun-Earth System Interaction studies over Vietnam: an international cooperative project C. Amory-Mazaudier1, M. Le Huy2, Y. Cohen3, V. Doumbia4,*, A. Bourdillon5, R. Fleury6, B. Fontaine7, C. Ha Duyen2, A. Kobea4, P. Laroche8, P. Lassudrie-Duchesne6, H. Le Viet2, T. Le Truong2, H. Luu Viet2, M. Menvielle1, T. Nguyen Chien2, A. Nguyen Xuan2, F. Ouattara9, M. Petitdidier1, H. Pham Thi Thu2, T. Pham Xuan2, N. Philippon**, L. Tran Thi2, H. Vu Thien10, and P. Vila1 1CETP/CNRS, 4 Avenue de Neptune, 94107 Saint-Maur-des-Fosses,´ France 2Institute of Geophysics, Vietnamese Academy of Science and Technology , 18 Hoang Quoc Viet, Cau Giay, Hano¨ı, Vietnam 3IPGP, 4 Avenue de Neptune, 94107 Saint-Maur-des-Fosses,´ France 4Laboratoire de Physique de l’Atmosphere,` Universite´ d’Abidjan Cocody 22 B.P. 582, Abidjan 22, Coteˆ d’Ivoire 5Institut d’Electronique et de Tel´ ecommunications,´ Universite´ de Rennes Batˆ 11D, Campus Beaulieu, 35042 Rennes, cedex,´ France 6ENST, Universite´ de Bretagne Occidentale, CS 83818, 29288 Brest, cedex´ 3, France 7CRC , Faculte´ des Sciences, 6 Boulevard Gabriel, F 21004 Dijon cedex´ 04, France 8Unite´ de Recherche Environnement Atmospherique,´ ONERA, 92332 Chatillon, cedex,´ France 9University of Koudougou, Burkina Faso 10Laboratoire signaux et systemes,` CNAM, 292 Rue saint Martin, 75141 Paris cedex´ 03, France *V. Doumbia previously signed V. Doumouya **affiliation unknown Received: 15 June 2006 – Revised: 19 October 2006 – Accepted: 8 November 2006 – Published: 21 December 2006 Abstract. During many past decades, scientists from var- the E, F1 and F2 ionospheric layers follow the variation of ious countries have studied separately the atmospheric mo- the sunspot cycle.
    [Show full text]
  • A PROFILE Dr. Vijay Bhatkar Is One of Most Acclaimed and Internationally Acknowledged
    DR. VIJAY BHATKAR: A PROFILE www.vijaybhatkar.org Dr. Vijay Bhatkar is one of most acclaimed and internationally acknowledged scientists of India. He is presently the Chancellor of Nalanda University. In this responsibility, he has committed himself to resurrecting the glory of ancient Nalanda, in the context of 21st century. Prior to Nalanda responsibility, he was the Chairman of Board of Governors of IIT Delhi from 2012 to 2017. He is best known as the architect of India’s national initiative in supercomputing, where he led the development of India’s first supercomputer Param in 1990, under the technology denial regime. Currently he is steering the National Supercomputing Mission of developing Exascale Architecture Supercomputing for India. Dr. Bhatkar is also widely known for bringing ICT to the masses through a wide range of path-breaking initiatives, such as the celebrated GIST multilingual technology covering India’s 22 official languages with 10 diverse scripts that has dissolved the language barrier on computers once for all; MKCL’s computer literacy programme that made a world mark by creating 10 million computer literates within a decade; Education to Home (ETH) initiative for bringing the benefits of ICT to school education. In the 80’s, Dr Bhatkar substantially contributed to the ushering of electronics revolution in India. He is also credited with the creation of several national research labs and institutions, notably amongst them being C-DAC, ER&DC Trivandrum, IIITM-K, TechnoPark, MKCL, IsquareIT, ETH Research Lab and Multiversity. Simultaneously, he has mentored several innovation-based start-ups. Dr. Bhatkar has served as a member of the Scientific Advisory Committee to PM, Member of the Governing Council of CSIR and a member of the IT Task Force constituted by PM in 1998.
    [Show full text]
  • National Supercomputing Mission
    02 April, 2020 National Supercomputing Mission Part of: GS Prelims and GS-III- S&T India has produced just three supercomputers since 2015 under the National Supercomputing Mission (NSM). National Supercomputing Mission The National Supercomputing Mission was announced in 2015, with an aim to connect national academic and R&D institutions with a grid of more than 70 high-performance computing facilities at an estimated cost of ?4,500 crores over the period of seven years. It supports the government's vision of 'Digital India' and 'Make in India' initiatives. The mission is being implemented by the Department of Science and Technology (Ministry of Science and Technology) and Ministry of Electronics and Information Technology (MeitY), through the Centre for Development of Advanced Computing (C-DAC), Pune and Indian Institute of Science (IISc), Bengaluru. It is also an effort to improve the number of supercomputers owned by India. These supercomputers will also be networked on the National Supercomputing grid over the National Knowledge Network (NKN). The NKN connects academic institutions and R&D labs over a high-speed network. Under NSM, the long-term plan is to build a strong base of 20,000 skilled persons over the next five years who will be equipped to handle the complexities of supercomputers. Key Points Progress of NSM: NSM’s first supercomputer named Param Shivay has been installed in IIT-BHU, Varanasi, in 2019. It has 837 TeraFlop High-Performance Computing (HPC) capacity. The second supercomputer with a capacity of 1.66 PetaFlop has been installed at IIT-Kharagpur. The third system, Param Brahma, has been installed at IISER-Pune, which has a capacity of 797 TeraFlop.
    [Show full text]
  • Param Shavak
    CENTRE FOR DEVELOPMENT OF ADVANCED COMPUTING PARAM SHAVAK User Manual www.cdac.in PARAM SHAVAK USER MANUAL PARAM SHAVAK USER MANUAL www.cdac.in i PARAM SHAVAK USER MANUAL Copyright Notice Copyright © 2014 Centre for Development of Advanced Computing All Rights Reserved. Any technical documentation that is made available by C-DAC (Centre for Development of Advanced Computing) is the copyrighted work of C-DAC and is owned by C-DAC. This technical documentation is being delivered to you as is, and C-DAC makes no warranty as to its accuracy or use. Any use of the technical documentation or the information contained therein is at the risk of the user. This document may include technical or other inaccuracies or typographical errors. C-DAC reserves the right to make changes without prior notice. Trademarks CDAC, CDAC logo, PARAM Shavak and PARAM Shavak logo are trademarks or registered trademarks of Centre for Development of Advanced Computing. The CentOS Mark is a trademark of Red Hat, Inc. Ubuntu® is a registered trademark of Canonical Ltd. Intel® and Intel® products are trademarks or registered trademarks of Intel® Corporation and are hereby acknowledged. Other brands and product names mentioned in this manual may be trademarks or registered trademarks of their respective companies and are hereby acknowledged. Intended Audience This document is meant for PARAM Shavak users. This document assumes that they have the following skills depending on the target platform: Basic Linux Commands ii PARAM SHAVAK USER MANUAL Typographic Conventions Symbol Meaning Blue underlined text A hyperlink or link you can click to go to a related section in this document or to a URL in your web browser.
    [Show full text]
  • Air Quality Over Major Cities of Saudi Arabia During Hajj Periods of 2019 and 2020
    Chapman University Chapman University Digital Commons Biology, Chemistry, and Environmental Sciences Science and Technology Faculty Articles and Faculty Articles and Research Research 2-2-2021 Air Quality Over Major Cities of Saudi Arabia During Hajj Periods of 2019 and 2020 Ashraf Farahat Akshansha Chauhan Mohammed Al Otaibi Ramesh P. Singh Follow this and additional works at: https://digitalcommons.chapman.edu/sees_articles Part of the Atmospheric Sciences Commons, Environmental Indicators and Impact Assessment Commons, and the Environmental Monitoring Commons Air Quality Over Major Cities of Saudi Arabia During Hajj Periods of 2019 and 2020 Comments This article was originally published in Earth Systems and Environment in 2021. https://doi.org/10.1007/ s41748-021-00202-z This scholarship is part of the Chapman University COVID-19 Archives. Creative Commons License This work is licensed under a Creative Commons Attribution 4.0 License. Copyright The authors Earth Systems and Environment https://doi.org/10.1007/s41748-021-00202-z ORIGINAL ARTICLE Air Quality Over Major Cities of Saudi Arabia During Hajj Periods of 2019 and 2020 Ashraf Farahat1 · Akshansha Chauhan2 · Mohammed Al Otaibi3 · Ramesh P. Singh4 Received: 25 October 2020 / Accepted: 13 January 2021 © The Author(s) 2021 Abstract Mecca and Madinah are two holy cities where millions of people in general, visit throughout the years, during Hajj (Mus- lim’s pilgrimage) time number of people visit these holy cities from diferent parts of the world is very high. However, the Government of Saudi Arabia only allowed 1000 pilgrims during the 2020 Hajj especially when the world is sufering from COVID-19.
    [Show full text]
  • THE BACKGROUND the Crude Market from As Recently As 2015, Saudi Energy Officials Competing Suppliers” Dismissed Suggestions That the Kingdom
    FEATURE ENERGY ENERGY FEATURE BEYOND What are the implications of an increase in Saudi crude oil production capacity? BY JIM KRANE COMBINATION OF FACTORS IS encouraging Saudi Arabia A to consider raising crude oil production capacity beyond the current ceiling of 12.5 million barrels per day. The kingdom has managed to maintain a constant share of global crude oil markets, even as it copes with growing domestic demand for oil and a spate of investments in refineries, inside and outside the kingdom. Longer term, the threat of peak global oil demand – perhaps in response to climate change “Saudi Arabia finds itself – enhances the attractions of a shorter time horizon to depletion. However, an oscillating between increase in Saudi crude oil production cutting crude oil would have consequences for markets and competing forms of energy, as well production to prop up as for the kingdom's geopolitical stature. prices and maintaining The wide range of potential outcomes suggests that a major capacity increase is high levels of exports a risky strategy. to defend its share of THE BACKGROUND the crude market from As recently as 2015, Saudi energy officials competing suppliers” dismissed suggestions that the kingdom 40 Vol. 18/31, September 2017 anbusiness.com 41 FEATURE ENERGY ENERGY FEATURE would seek to raise its crude oil production “Even though costs based on what we see as projection and capacity above its theoretical maximum are among the world’s call on Saudi oil, we don’t see anything of 12.5 million barrels per day (m b/d). like that, even by 2030 or 2040.
    [Show full text]
  • Chapter 1- Overview of Computers MDRPUC, Hassan Chapter-1 OVERVIEW of COMPUTER Definition
    Chapter 1- Overview of Computers MDRPUC, Hassan Chapter-1 OVERVIEW OF COMPUTER Definition: “Computer is an electronic machine that can store, recall and process data. It can perform tasks or complex calculation according to a set of instructions or programs. How does the computer work? It is as simple as making tea. To prepare tea, we add water, tea powder, milk, and sugar. These are all considered as input. After adding all, we have to boil. That boiling is called processing. After boiling, we get tea. That is called output. Similarly, the computer works based on the input, processing and output. Input-Process-Output cycle (IPO Cycle) Characteristics of Computer: Speed Versatility Storage Flexibility Accuracy Cost effectiveness Diligence Speed: The computer works very fast. The speed of Computer is measured in terms of MIPS (Million Instructions Per Second) or BIPS (Billion Instructions Per Second). For Example A money counting machine counts money faster than man. 1 | P a g e Chapter 1- Overview of Computers MDRPUC, Hassan Storage: The computer can store a large volume of data and information. The storage capacity of the computer is measured in terms of Bytes. A group of 8 Bits is called a Byte. Accuracy The computer generated results are exact and without any mistakes with high rate of consistency. Diligence Unlike human beings, a computer does not suffer from limitations like tiredness and lack of concentration. It can work for hours without making any errors. Versatility Computers are capable of performing any task. Multi-processing features of computer make it quite versatile in nature.
    [Show full text]
  • Precarious Justice Arbitrary Detention and Unfair Trials in the Deficient Criminal Justice System of Saudi Arabia
    March 2008 Volume 20, No. 3(E) Precarious Justice Arbitrary Detention and Unfair Trials in the Deficient Criminal Justice System of Saudi Arabia Prologue................................................................................................................ 1 Summary.................................................................................................................3 Methodology .......................................................................................................10 Part 1: Saudi Law..................................................................................................12 I. Sharia and Statutory Law ....................................................................................................... 12 II. Legislative Developments and the Law of Criminal Procedure ............................................... 14 III. Codification of Criminal Laws ............................................................................................... 17 IV. Absence of Rules of Precedent .............................................................................................23 V. Other Legal Gaps ................................................................................................................. 26 Right to Inform Others of One’s Arrest .................................................................................26 Right of Access to a Lawyer ................................................................................................. 31 Obligation to Charge Promptly.............................................................................................35
    [Show full text]
  • This Article Appeared in a Journal Published by Elsevier. the Attached
    This article appeared in a journal published by Elsevier. The attached copy is furnished to the author for internal non-commercial research and education use, including for instruction at the authors institution and sharing with colleagues. Other uses, including reproduction and distribution, or selling or licensing copies, or posting to personal, institutional or third party websites are prohibited. In most cases authors are permitted to post their version of the article (e.g. in Word or Tex form) to their personal website or institutional repository. Authors requiring further information regarding Elsevier’s archiving and manuscript policies are encouraged to visit: http://www.elsevier.com/copyright Author's personal copy ARTICLE IN PRESS Technology in Society 30 (2008) 299– 308 Contents lists available at ScienceDirect Technology in Society journal homepage: www.elsevier.com/locate/techsoc Indian science, technology, and society: The changing landscape R.A. Mashelkar à National Chemical Laboratory, Pune 411 008, India article info abstract Keywords: Over the centuries, India’s scientific and technological position among developed and India developing countries has shifted. Several centuries ago, it was characterized by scientific Science Technology thought, capabilities, and techniques more advanced than many countries. However, Knowledge when the scientific and industrial revolutions took place in the West, India was in a Education stagnant period. This paper looks at knowledge production in different countries vis-a`-vis Economics their economic strength, and then positions India within this landscape. Pillars Science and technology in India rest on four pillars: (1) techno-nationalism, (2) inclusive growth, (3) techno-globalism, and (4) global leadership. Each of these pillars is discussed in some detail, followed by concluding recommendations for steps India should take if it wishes to assume a leadership role among the world’s developed nations.
    [Show full text]
  • Intel® Xeon® Processor Platform Performance Hardware Plus Optimized Software INFERENCE THROUGHPUT TRAINING THROUGHPUT
    HPC Goes Mainstream with AI & Intel® SEETHA . NOOKALA DIRECTOR , IN TEL A P J H P C&AI Seetha Rama Krishna-(Seetha) A researcher turned to techno entrepreneur. • Director: DCG, E&G – HPC & AI at Intel for APJ (South) • HPC & Enterprise Research and Solutions: • Over 30 years of HPC experience contributing to R&D, Product Dev, applying HPC to Enterprise ,Cloud, Research, E Governance ,Data centers. • Formed and lead Advanced computing solutions teams at C-DAC, TATA- CRL, TCS , Intel. • Started career as researcher and quickly moved on to systems and solutions. • Chief Architect of world’s 4th fastest “eKA” super computer , and Intel’s first in top10 computer at TATA-CRL • Member PARAM Series HPC Architecture teams at C-DAC. • Recognitions: • Global Innovation Award winner in 2009- From TATA Sons. Felicitated by Shri. Ratan Tata in the presence 100Plus CEO’ and CFO’s of the TATA group. • Recipient of PARAM technology Awards from C-DAC, IEEE,CSI recognitions for promotion of HPC in India. 2 Software FUELS Hardware 3 Review more success stories, Intel® Parallel Studio XE Case Studies deck Software Optimization Success Stories Science & research Finance Up to 35X Up to 2.7X improved performance** faster application performance compared to NVIDIA Tesla K80* NERSC (National Energy Research Scientific Computing Center) - see case study Monte Carlo European Options Benchmark* Life Science Visualization Simulations ran up to 7.6X faster Up to 5.17X performance with 9X energy efficiency** improvement** compared to NVIDIA Titan X* LAMMPS code - Sandia National Laboratories intel.com/content/www/us/en/high-performance-computing/hpc-xeon-phi-technology-brief.html Intel Embree v2.9.0 **Intel® Xeon Phi™ Processor (codenamed Knights Landing) Software Ecosystem Momentum Guide Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors.
    [Show full text]
  • India-Vietnam Relations BACKGROUND
    India-Vietnam Relations BACKGROUND • India-Vietnam relations have been exceptionally friendly and cordial since their foundations were laid by Prime Minister Nehru and President Ho Chi Minh more than 50 years ago. The traditionally close and cordial relations have their historical roots in the common struggle for liberation from foreign rule and the national struggle for independence. • Pandit Jawaharlal Nehru was one of the first visitors to Vietnam after its victory against the French at Dien Bien Phu in 1954. President Ho Chi Minh went to India in February 1958. President Rajendra Prasad visited Vietnam in 1959. • In recent times, political contacts have strengthened as reflected in several high-level visits by leaders from both sides. Trade and economic linkages continue to grow. India's thrust under the 'Look East' policy combined with Vietnam's growing engagement within the region and with India has paid rich dividends. • Vietnam is an important regional partner in South East Asia. India and Vietnam closely cooperate in various regional forums such as ASEAN, East Asia Summit, Mekong Ganga Cooperation, Asia Europe Meeting (ASEM) besides UN and WTO. • The two countries will celebrate the 40 th anniversary of establishment of full diplomatic relations in 2012. The ‘ Year of India in Vietnam’ will be celebrated in 2012 with several commemorative events, cultural activities and business promotion events. EXCHANGE OF HIGH-LEVEL VISITS • There have been several high-level visits from both sides in recent years. From the Vietnamese side , these include Nong Duc Manh, Secretary General of the Communist Party of Vietnam in 2005, Nguyen Tan Dung, Prime Minister in 2007, Nguyen Thi Doan, Vice-President in 2009 and Nguyen Phu Trong, Chairman, National Assembly of Vietnam in 2010 and Truong Tan Sang, President in October 2011.
    [Show full text]
  • Dr. Vijay Bhatkar: a Profile
    DR. VIJAY BHATKAR: A PROFILE www.vijaybhatkar.org Dr. Vijay Bhatkar is one of the most acclaimed and internationally acknowledged scientists of India. India’s leading computer magazine Dataquest has acclaimed Dr. Vijay Bhatkar amongst the star pioneers who shaped India’s celebrated IT industry (US$ 100 Billion In 2012), with supercomputing capability, capacity, and infrastructure, as its crowning glory. Dr. Bhatkar is best known as the architect of India’s national initiative in supercomputing where he led the development of Param supercomputers. When India was denied the supercomputer by USA, Dr. Bhatkar took the challenge of developing an indigenous supercomputer in a record time of 3 years and delivered Param 8000 in 1991 and went on to develop terascale Param 10000 in 1998, propelling India into the exclusive club of select nations, who possess this strategic technology. Based on the Param series of supercomputers, he built the National Param Supercomputing Facility (NPSF) which has been now made available as a grid computing facility through Garuda grid on the National Knowledge Network (NKN) providing nationwide access to High Performance Computing (HPC) infrastructure. Today, Dr. Bhatkar has once again taken the lead in proposing the National Mission on Development of Exascale Supercomputing Capability, Capacity and Infrastructure on National Knowledge Network. This is one of the largest projects in S&T in India with a 12th Plan budget of nearly Rs. 5,000 crores that will not only transform India’s computing but will also catalyze India’s leadership in Science through Third & Fourth modes of scientific discovery by engaging world’s largest number of researchers and scientists across a large number of research labs and universities of India collaborating together.
    [Show full text]