High-Performance Computing at SGI and the Status of Climate and Weather Codes on the SGI Altix Gerardo Cisneros, Ph.D

Total Page:16

File Type:pdf, Size:1020Kb

High-Performance Computing at SGI and the Status of Climate and Weather Codes on the SGI Altix Gerardo Cisneros, Ph.D High-Performance Computing at SGI and the Status of Climate and Weather Codes on the SGI Altix Gerardo Cisneros, Ph.D. Scientist C2004 Silicon Graphics, Inc. All rights reserved. Silicon Graphics, SGI, IRIX, Origin, Onyx, Onyx2, IRIS, Altix, InfiniteReality, Challenge, Reality Center, Geometry Engine, ImageVision Library, OpenGL, XFS, the SGI logo and the SGI cube are registered trademarks and CXFS, Onyx4, InfinitePerformance, IRIS GL, Power Series, Personal IRIS, Power Challenge, NUMAflex, REACT, Open Inventor, OpenGL Performer, OpenGL, Optimizer, OpenGL Volumizer, OpenGL Shader, OpenGL Multipipe, OpenGL Vizserver, SkyWriter, RealityEngine, SGI ProPack, Performance Co- Pilot, SGI Advanced Linux, UltimateVision and The Source of Innovation and Discovery are trademarks of Silicon Graphics, Inc., in the U.S. and/or other countries worldwide. Linux is a registered trademark of Linus Torvalds in several countries, used with permission by Silicon Graphics, Inc. MIPS is a registered trademark of MIPS Technologies, Inc., used under license by Silicon Graphics, Inc. Intel and Itanium are registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. Red Hat and all Red Hat-based trademarks are trademarks or registered trademarks of Red Hat, Inc. in the United States and other countries. Linux penguin logo created by Larry Ewing. All other trademarks mentioned herein are the property of their respective owners. (04/04) 9/9/2004 Slide 2 AA Overview • Company focus • SGI Altix: present and future • Performance of NWS codes • Conclusions 9/9/2004 Slide 3 Silicon Graphics Providing the Industry’s Highest-Performing Compute, Storage and Visualization Products •Exclusively focused on the technical computing market •Technology is designed to enable the most significant scientific and creative breakthroughs of the 21st century •Products and services are mission critical to government and defense, science and research, manufacturing, energy and media industries 9/9/2004 Slide 4 Images courtesy of SCI Institute, University of Utah, Navy Rehearsal TOPSCENE Program, Magic Earth LLC, and WETA Digital AA Strategic Focus Areas High Performance Advanced Storage Computing Visualization High-performance CXFS™ shared file system Onyx4™ allows users to combine NUMAflex™ architecture allows transparent, multiple industry-standard delivers unprecedented heterogeneous file access graphics cards in a high- flexibility and performance. everywhere, without copying bandwidth, low-latency data. architecture, for cost-effective high performance visualization. 9/9/2004 Slide 5 AA Architecture Designed for HPC; Choice of Deployments NUMAflex™ Global Shared-Memory Architecture Balanced, scalable performance Operating environment optimized for HPC Low-latency memory access Easily Deployable MIPS® and IRIX® Intel® Itanium® 2 and Linux® SGI® Origin® Family SGI® Altix® Family 9/9/2004 Slide 6 AA Modular SGI® NUMAflex™ Architecture System PPeerrffoorrmmaannccee:: HHiigghh--bbaannddwwiiddtthh Interconnect iinntteerrccoonnnneecctt wwiitthh vveerryy llooww llaatteennccyy FFlleexxiibbiilliittyy:: TTaaiilloorreedd ccoonnffiigguurraattiioonnss ffoorr CPU & ddiiffffeerreenntt ddiimmeennssiioonnss ooff ssccaallaabbiilliittyy Memory IInnvveessttmmeenntt pprrootteeccttiioonn:: AAdddd nneeww tteecchhnnoollooggiieess aass tthheeyy eevvoollvvee System I/O SSccaallaabbiilliittyy:: NNoo cceennttrraall bbuuss oorr sswwiittcchh;; jjuusstt Standard I/O mmoodduulleess aanndd NNUUMMAAlliinnkk™™ ccaabblleess Expansion High-Bandwidth I/O Expansion Graphics Expansion Storage Expansion 9/9/2004 Slide 7 SGI Family of Scalable Linux® Solutions SGI® Altix® 350 SGI® Altix® 3000 Servers and Clusters Servers and Superclusters Image courtesy: NASA Ames Mid-range Departmental Capability 9/9/2004 Slide 8 AA SGI® Altix® 3000 Scaling Roadmap 2048p y ® t Worlds Most Scalable Linux Supercomputer i l i b a p a c r o 1024p s s e c o r p 4 512p 512p 512p 512p 8 3 , 6 1 256p 256p 256p 128p 64p 64p 64p 64p 64p Jan 2003 Apr 2003 Sept 2003 Oct 2003 Mar 2004 mid-2004 late 2004 2005 SSI Scalability Shared Memory Scalability 9/9/2004 Slide 9 This slide contains forward-looking statements. The results and forecasts as stated may vary. Other risks and uncertainties relating to this slide may be found in the "Safe-Harbor" statement at the beginning of this presentation. SGI® Altix® 3000 C-Brick Detail 16 x PC2100 or PC2700 DDR SDRAM 8 to 16GB of memory per node 8.51–10.2GB/sec memory b/w • 4x Intel® Itanium® 2 processors • 2 processor per 6.4GB/sec frontside bus • 4–64GB memory C-brick • SHUB memory controller 8.51–10.2GB/sec memory SHUB SHUB bandwidth (varies with memory speed 133 MHz vs. 166 MHz) • 6.4GB/sec aggregate interconnect bandwidth • 4.8GB/sec aggregate I/O bandwidth 9/9/2004 Slide 10 Other Altix Bricks IX-brick Base I/O module D-brick2 Disk expansion R-brick2 Router interconnect PX-brick PCI-X expansion M-brick Memory expansion 9/9/2004 Slide 11 Altix 3700 — 128 processors 9/9/2004 Slide 12 Altix 3700 — 512 processors 9/9/2004 Slide 13 Next generation Altix (8) Fewer External Routers (1) Less Power Bay (1) Less Rack (20) Fewer Cables Altix 3700 “Tornado” 9/9/2004 Slide 14 Next generation Altix 9/9/2004 Slide 15 The Altix® 350: “Expand on Demand” Growth Path 1-16P/2-192GB CPU Expansion Module Right-size systems 1-12P/ 2-144 GB Memory Expansion for the ultimate Module price/performance 1-8P/ 2-96GB I/O Expansion (4-32) Module 1- 4P/ 2- 48GB • Independently scale CPU, memory, I/O • One Linux® instance to manage Base Unit: 1 or 2P/2-24GB • Investment protection & leverage current assets • Allocate budget and resources to ongoing needs 9/9/2004 Slide 16 Customers with Altix systems running climate and weather applications • NASA – 10240p – ECCO, CAM, CCSM, etc. • NCSA – 1024p – WRF • GFDL – 608p (2x256, 1x96) – MOM4, CM2.1 • NRL – 384p (1x128, 1x256) – various • ORNL – 256p – CCSM, CAM, POP • LANL – 256p – POP, HYCOM • BAMS – 20p – MM5 and MAQSIP • CMMACS – 12p Altix350 – MOM4 • APAT – 8p Altix350 – MM5 • Romanian Nat’l Met Admin – 2p Altix350 – HRM 9/9/2004 Slide 17 IFS - Performance on SGI Altix 3000 T511 performance in Forecast days per day 700 600 500 32 Cpu 64 Cpu 400 128 Cpu 300 256 Cpu 200 384 Cpu 512 Cpu 100 0 IBM Power4 SGI Altix 3000 SGI 3000 1.3GHz 1.3GHz 1.5GHz Altix 3000 @1.5GHz is 2.22 x faster IBM Power4 @1.3GHz 9/9/2004 Slide 18 Source: Roland Richter, SGI, May 2004 IFS - Scalability on SGI Altix 3000 Itanium2 @1.5GHz is 1.3x faster than Itanium @1.3GHz because of the larger cache and higher clock rate 9/9/2004 Slide 19 Source: Roland Richter, SGI, May 2004 HRM Performance on the Altix 350 Simulation speed 350 Origin 350/600 MHz Altix 350/1.4 GHz 300 250 200 150 100 50 0 1 2 4 8 10 12 16 Nproc 78h forecast in 2340 time steps over a 181x217 horizontal grid with 26 vertical levels 9/9/2004 Slide 20 LM-RAPS 2.1 (Optimization using shared Memory) Scalability on Altix using Intel Compiler and SGI’s MPT library 9/9/2004 Slide 21 Benchmark case used by Emy (Greece) in 2003 Grid 363x263x45 MM5 3.6.3 - Standard benchmark, 2004 Higher is Better Altix version was compiled with the Intel 8.1.007 (beta) ifort Fortran compiler and the Intel 8.1.010 (beta) icc C compiler, and linked with SGI's MPI from MPT 1.10. Source: http://www.mmm.ucar.edu/mm5/mpp/helpdesk/20040304a.html 9/9/2004 Slide 22 WRF 1.3 - Scalability & Performance on Altix 3000 Altix 3000 is 1.28x faster than HP cluster at the same clock frequency. Source: http://www.mmm.ucar.edu/wrf/bench and Gerardo Cisneros, SGI 9/9/2004 Slide 23 WRF 2.0.2 on a Large Problem WRF SI 5km CONUS 48h forecast (980x720x37, 5km, 30s) 50000 s 40000 d e 30000 s p 20000 a l E 10000 0 32 64 128 256 512 NCPUs 1.5GHz/6MB L3 1.3GHz/3MB L3 9/9/2004 Slide 24 WRF 2.0.2 on a Large Problem WRF SI 5km CONUS 48h forecast (980x720x37, 5km, 30s) d e 40 e p s 30 n o i 20 t a l u 10 m i 0 S 32 64 128 256 512 NCPUs 1.5GHz/6MB L3 1.3GHz/3MB L3 9/9/2004 Slide 25 GFS Performance on the Altix 3700 (1.5GHz) GFS T240L30 (720x360x30) 120h forecast 400.00 343.91 350.00 d e 300.00 e 255.20 p s 250.00 n 190.01 o 200.00 i t a l 150.00 u 98.34 m i 100.00 S 51.15 50.00 23.68 2.23 4.21 9.58 0.00 1 2 4 8 16 32 64 96 128 NCPUs 9/9/2004 Slide 26 MOM4 - Performance on SGI Altix 3700 0.25° Ocean Model (1440x600x24) 18,000 120 15,476 16,000 100 14,000 12,000 80 p d 10,185 e u 10e ,000 s 7,813 d m 60 p e i a 8,000 e T l p E 6,000 4,640 40 3,822 S 4,000 2,308 2,397 20 2,000 0 0 16 32 64 128 Number of processors Altix 3000 @1.5GHz w/ Dynamic memory compilation Altix 3000 @1.5GHz w/ Static memory compilation Speedup Source: Gerardo Cisneros, SGI, May 2004 9/9/2004 Slide 27 POP 1.4.3 (Optimization by reducing the # of synchronizations) Scalability on ALTIX using Intel Compiler and SGI’s MPT library 9/9/2004 Slide 28 Increasing Message length and reducing synchronization frequency improved the performance by 20% at 256 CPU POP 1.4.3 - Performance on SGI Altix 3000 SSI POP 1.4.3 - Performance on 1 Degree “X1” Problem Higher 100.0 is Better Altix 3000 @1.5 GHz (SGI) ) y a D Altix 3000 @ 1.3 GHz (SGI) 80.0 k Configuration: c o l Altix 3000 @1.5GHz (NASA) c Altix 3000 l l 96 a 60.0 88 w @1.3GHz, 512P Ideal / 80 s 72 r Altix 3000 SSI, 64 a p e 40.0 u 56 d Intel compiler Y e 48 e d p 40 e 7.1.035 MPT 1.9 S t 32 a l 24 u 20.0 16 m i 8 S 0 0 32 64 96 128 160 192 224 256 288 320 352 384 0.0 0 64 128 192 256 320 384 Nr.
Recommended publications
  • Real-Time Graphics Architecture P
    4/18/2007 Real-Time Graphics Architecture Lecture 4: Parallelism and Communication Kurt Akeley Pat Hanrahan http://graphics.stanford.edu/cs448-07-spring/ CS448 Lecture 4 Kurt Akeley, Pat Hanrahan, Spring 2007 Topics 1. Frame buffers 2. Types of parallelism 3. Communication patterns and requirements 4. Sorting classification for parallel rendering (with examples) CS448 Lecture 4 Kurt Akeley, Pat Hanrahan, Spring 2007 1 4/18/2007 Frame Buffers Raster vs. calligraphic Raster (image order) dominant choice Calligraphic (object order) Earliest choice (Sketchpad) E&S terminals in the 70s and 80s Works with light pens Scene complexity affects frame rate Monitors are expensive Still required for FAA simulation Increases absolute brightness of light points CS448 Lecture 4 Kurt Akeley, Pat Hanrahan, Spring 2007 2 4/18/2007 Frame buffer definitions What is a frame buffer? What can we learn by considering different definitions? CS448 Lecture 4 Kurt Akeley, Pat Hanrahan, Spring 2007 Frame buffer definition #1 Storage for commands that are executed to refresh the display Allows for raster or calligraphiccalligraphic display (e. g. Megatech) “Frame buffer” for calligraphic display is a “display list” OpenGL “render list”? Key point: frame buffer contents are interpreted Color mapping Image scaling, warping Window system (overlay, separate windows, …) Address Recalculation Pipeline CS448 Lecture 4 Kurt Akeley, Pat Hanrahan, Spring 2007 3 4/18/2007 Frame buffer definition #2 Image memory used to decouple the render frame rate from the display
    [Show full text]
  • Ebook - Informations About Operating Systems Version: August 15, 2006 | Download
    eBook - Informations about Operating Systems Version: August 15, 2006 | Download: www.operating-system.org AIX Internet: AIX AmigaOS Internet: AmigaOS AtheOS Internet: AtheOS BeIA Internet: BeIA BeOS Internet: BeOS BSDi Internet: BSDi CP/M Internet: CP/M Darwin Internet: Darwin EPOC Internet: EPOC FreeBSD Internet: FreeBSD HP-UX Internet: HP-UX Hurd Internet: Hurd Inferno Internet: Inferno IRIX Internet: IRIX JavaOS Internet: JavaOS LFS Internet: LFS Linspire Internet: Linspire Linux Internet: Linux MacOS Internet: MacOS Minix Internet: Minix MorphOS Internet: MorphOS MS-DOS Internet: MS-DOS MVS Internet: MVS NetBSD Internet: NetBSD NetWare Internet: NetWare Newdeal Internet: Newdeal NEXTSTEP Internet: NEXTSTEP OpenBSD Internet: OpenBSD OS/2 Internet: OS/2 Further operating systems Internet: Further operating systems PalmOS Internet: PalmOS Plan9 Internet: Plan9 QNX Internet: QNX RiscOS Internet: RiscOS Solaris Internet: Solaris SuSE Linux Internet: SuSE Linux Unicos Internet: Unicos Unix Internet: Unix Unixware Internet: Unixware Windows 2000 Internet: Windows 2000 Windows 3.11 Internet: Windows 3.11 Windows 95 Internet: Windows 95 Windows 98 Internet: Windows 98 Windows CE Internet: Windows CE Windows Family Internet: Windows Family Windows ME Internet: Windows ME Seite 1 von 138 eBook - Informations about Operating Systems Version: August 15, 2006 | Download: www.operating-system.org Windows NT 3.1 Internet: Windows NT 3.1 Windows NT 4.0 Internet: Windows NT 4.0 Windows Server 2003 Internet: Windows Server 2003 Windows Vista Internet: Windows Vista Windows XP Internet: Windows XP Apple - Company Internet: Apple - Company AT&T - Company Internet: AT&T - Company Be Inc. - Company Internet: Be Inc. - Company BSD Family Internet: BSD Family Cray Inc.
    [Show full text]
  • SGI® Opengl Multipipe™ User's Guide
    SGI® OpenGL Multipipe™ User’s Guide 007-4318-008 Version 1.4.2 CONTRIBUTORS Written by Ken Jones and Jenn Byrnes Illustrated by Chrystie Danzer Edited by Susan Wilkening Production by Glen Traefald Engineering contributions by Bill Feth, Christophe Winkler, Claude Knaus, and Alpana Kaulgud COPYRIGHT © 2000–2002 Silicon Graphics, Inc. All rights reserved; provided portions may be copyright in third parties, as indicated elsewhere herein. No permission is granted to copy, distribute, or create derivative works from the contents of this electronic documentation in any manner, in whole or in part, without the prior written permission of Silicon Graphics, Inc. LIMITED RIGHTS LEGEND The electronic (software) version of this document was developed at private expense; if acquired under an agreement with the USA government or any contractor thereto, it is acquired as "commercial computer software" subject to the provisions of its applicable license agreement, as specified in (a) 48 CFR 12.212 of the FAR; or, if acquired for Department of Defense units, (b) 48 CFR 227-7202 of the DoD FAR Supplement; or sections succeeding thereto. Contractor/manufacturer is Silicon Graphics, Inc., 1600 Amphitheatre Pkwy 2E, Mountain View, CA 94043-1351. TRADEMARKS AND ATTRIBUTIONS Silicon Graphics, SGI, the SGI logo, InfiniteReality, IRIS, IRIX, Onyx, Onyx2, and OpenGL are registered trademarks and IRIS GL, OpenGL Performer, InfiniteReality2, Open Inventor, OpenGL Multipipe, Power Onyx, Reality Center, and SGI Reality Center are trademarks of Silicon Graphics, Inc. MIPS and R10000 are registered trademarks of MIPS Technologies, Inc. used under license by Silicon Graphics, Inc. Netscape is a trademark of Netscape Communications Corporation.
    [Show full text]
  • SGI Altix Applications Development and Optimization
    SGI Altix Applications Development and Optimization Part No.: AAPPL-0.9-L2.4-S-SD-W-DRAFT Release Date: May 15, 2003 2 RESTRICTION ON USE This document is protected by copyright and contains information proprietary to Silicon Graphics, Inc. Any copying, adaptation, distribution, public performance, or public display of this document without the express written consent of Silicon Graphics, Inc., is strictly prohibited. The receipt or possession of this document does not convey the rights to reproduce or distribute its contents, or to manufacture, use, or sell anything that it may describe, in whole or in part, without the specific written consent of Silicon Graphics, Inc. Copyright 1997-2000 Silicon Graphics, Inc. All rights reserved. U.S. GOVERNMENT RESTRICTED RIGHTS LEGEND Use, duplication, or disclosure of the data and information contained in this document by the Government is subject to restrictions as set forth in FAR 52.227-19(c)(2) or subparagraph (c)(1)(ii) of the Rights in Technical Data and Computer Software clause at DFARS 252.227-7013 and/or in similar or successor clauses in the FAR, or the DOD or NASA FAR Supplement. Unpublished rights reserved under the Copyright Laws of the United States. Contrac- tor/manufacturer is Silicon Graphics, Inc., 1600 Amphitheatre Pkwy., Mountain View, CA 94039-1351. The contents of this publication are subject to change without notice. PART NUMBER AAPPL-0.9-L2.4-S-SD-W-DRAFT, May 2003 RECORD OF REVISION Revision 0.9, Version 2.4, April 2003. SGI TRADEMARKS InfiniteReality, IRIX, Silicon Graphics, and the Silicon Graphics logo are registered trademarks, and Altix, Altix 3000, Origin, Origin 2000, Origin 300, Origin 3000, Power Challenge, Power ChallengeArray, NUMAflex and ProDev are trademarks of Silicon Graphics, Inc.
    [Show full text]
  • SGI® L1 and L2 Controller Software User's Guide
    SGI® L1 and L2 Controller Software User’s Guide 007-3938-004 CONTRIBUTORS Written by Linda Rae Sande Revised by Francisco Razo and Terry Schultz Illustrated by Dan Young Production by Terry Schultz Engineering contributions by Don Adams, Michael T. Brown, Dick Brownell, Jason Chang, Steve Hein, Jill Heitpas, Nancy Heller, Matt Hoy, Hao Pham, Craig Schultz, and Lisa Steinmetz. COPYRIGHT © 2002, 2003, 2004, 2005, Silicon Graphics, Inc. All rights reserved; provided portions may be copyright in third parties, as indicated elsewhere herein. No permission is granted to copy, distribute, or create derivative works from the contents of this electronic documentation in any manner, in whole or in part, without the prior written permission of Silicon Graphics, Inc. LIMITED RIGHTS LEGEND The software described in this document is “commercial computer software” provided with restricted rights (except as to included open/free source) as specified in the FAR 52.227-19 and/or the DFAR 227.7202, or successive sections. Use beyond license provisions is a violation of worldwide intellectual property laws, treaties and conventions. This document is provided with limited rights as defined in 52.227-14. TRADEMARKS AND ATTRIBUTIONS Silicon Graphics, SGI, the SGI logo, Altix, Onyx, and Origin are registered trademarks and Fuei, NUMAflex, NUMAlink, Prism, and SGIconsole are trademarks of Silicon Graphics, Inc., in the U.S. and/or other countries worldwide. All other trademarks mentioned herein are the property of their respective owners. New Features in This Guide This manual has been updated with information to support the SGI Altix 3700 Bx2 system. Major Documentation Changes The following sections were revised for this release: • Added information about the Silicon Graphics Prism Visualization System in the Introduction, Chapter 1, and Chapter 2.
    [Show full text]
  • Tessellation and Rendering of Trimmed NURBS Models in Scene Graph Systems
    Tessellation and rendering of trimmed NURBS models in scene graph systems Dissertation zur Erlangung des Doktorgrades (Dr. rer. nat.) der Mathematisch-Naturwissenschaftlichen Fakultat¨ der Rheinischen Friedrich-Wilhelms-Universitat¨ Bonn vorgelegt von Dipl.-Inform. Akos´ Balazs´ aus Budapest/Ungarn Munchen,¨ April 2008 Universitat¨ Bonn, Institut fur¨ Informatik II Romerstraße¨ 164, 53117 Bonn Angefertigt mit Genehmigung der Mathematisch-Naturwissenschaftlichen Fakultat¨ der Rheinischen Friedrich-Wilhelms Universitat¨ Bonn. Diese Dissertation ist auf dem Hochschulschriftenserver der ULB Bonn http://hss.ulb.uni-bonn.de/diss online elektronisch publiziert. Dekan: Prof. Dr. Armin B. Cremers 1. Referent: Prof. Dr. Reinhard Klein 2. Referent: Prof. Dr. Andreas Weber Tag der Promotion: 25.09.2008 Erscheinungsjahr: 2008 I To the memory of my father To my parents, for making all of this possible. II III Acknowledgements “Standing on the shoulders of giants” - Isaac Newton once wrote, and this sentence describes how I feel about the support many people have given me during the writing of this thesis. Acknowledging their support here is beyond doubt not enough to express my sincere appreciation for their help, yet, I hope they know what their backing has meant to me. First and foremost, I must thank my advisor Prof. Dr. Reinhard Klein, whose inspi- ration, patience and guidance made writing this thesis possible. His occasional nudges were also necessary to keep me on the right track and for this I cannot be grateful enough. I would like to thank
    [Show full text]
  • Application of General Purpose HPC Systems in HPEC David Alexander
    Application of General Purpose HPC Systems in HPEC David Alexander Silicon Graphics, Inc. Phone: (650) 933-1073 Fax: (650) 932-0663 Email: [email protected] Areas that this paper/presentation will address: * Reconfigurable Computing for Embedded Systems * High-Speed Interconnect Technologies Abstract: High performance embedded computing (HPEC) has traditionally been performed by systems designed specifically for the task. Recent years have seen the increasing application of general-purpose high performance computing (HPC) systems in embedded applications. General purpose HPC systems typically have a large user base which results in broad application SW and device driver availability, robust development and debugging tools, and revenue streams which support significant R&D funding of technologies to enhance HPC system performance and reliability. Various factors have prevented wider adoption of general purpose HPC systems in the embedded space...factors such as lack of dense, ruggedized packaging suitable for embedded applications, lack of real-time capabilities in general purpose operating systems [1], and performance/watt and performance/unit volume advantages that specialized systems have traditionally had over general purpose HPC systems. This presentation details plans for addressing these shortcomings through the deployment of a heterogeneous computing architecture which incorporates FPGA-based reconfigurable computing and I/O elements, system interconnect advancements leveraged from HPC system development, microprocessor and system advancements developed under DARPA's HPCS program, and the mapping of the system into packaging suitable for HPEC applications. Introduction and System Architectural Review SGI's ccNUMA (cache coherent non-uniform memory architecture) global shared memory system architecture is the basis of our general-purpose Origin [2] and Altix [3] HPC systems.
    [Show full text]
  • Opengl Shading Languag 2Nd Edition (Orange Book)
    OpenGL® Shading Language, Second Edition By Randi J. Rost ............................................... Publisher: Addison Wesley Professional Pub Date: January 25, 2006 Print ISBN-10: 0-321-33489-2 Print ISBN-13: 978-0-321-33489-3 Pages: 800 Table of Contents | Index "As the 'Red Book' is known to be the gold standard for OpenGL, the 'Orange Book' is considered to be the gold standard for the OpenGL Shading Language. With Randi's extensive knowledge of OpenGL and GLSL, you can be assured you will be learning from a graphics industry veteran. Within the pages of the second edition you can find topics from beginning shader development to advanced topics such as the spherical harmonic lighting model and more." David Tommeraasen, CEO/Programmer, Plasma Software "This will be the definitive guide for OpenGL shaders; no other book goes into this detail. Rost has done an excellent job at setting the stage for shader development, what the purpose is, how to do it, and how it all fits together. The book includes great examples and details, and good additional coverage of 2.0 changes!" Jeffery Galinovsky, Director of Emerging Market Platform Development, Intel Corporation "The coverage in this new edition of the book is pitched just right to help many new shader- writers get started, but with enough deep information for the 'old hands.'" Marc Olano, Assistant Professor, University of Maryland "This is a really great book on GLSLwell written and organized, very accessible, and with good real-world examples and sample code. The topics flow naturally and easily, explanatory code fragments are inserted in very logical places to illustrate concepts, and all in all, this book makes an excellent tutorial as well as a reference." John Carey, Chief Technology Officer, C.O.R.E.
    [Show full text]
  • 20 Years of Opengl
    20 Years of OpenGL Kurt Akeley © Copyright Khronos Group, 2010 - Page 1 So many deprecations! • Application-generated object names • Depth texture mode • Color index mode • Texture wrap mode • SL versions 1.10 and 1.20 • Texture borders • Begin / End primitive specification • Automatic mipmap generation • Edge flags • Fixed-function fragment processing • Client vertex arrays • Alpha test • Rectangles • Accumulation buffers • Current raster position • Pixel copying • Two-sided color selection • Auxiliary color buffers • Non-sprite points • Context framebuffer size queries • Wide lines and line stipple • Evaluators • Quad and polygon primitives • Selection and feedback modes • Separate polygon draw mode • Display lists • Polygon stipple • Hints • Pixel transfer modes and operation • Attribute stacks • Pixel drawing • Unified text string • Bitmaps • Token names and queries • Legacy pixel formats © Copyright Khronos Group, 2010 - Page 2 Technology and culture © Copyright Khronos Group, 2010 - Page 3 Technology © Copyright Khronos Group, 2010 - Page 4 OpenGL is an architecture Blaauw/Brooks OpenGL SGI Indy/Indigo/InfiniteReality Different IBM 360 30/40/50/65/75 NVIDIA GeForce, ATI implementations Amdahl Radeon, … Code runs equivalently on Top-level goal Compatibility all implementations Conformance tests, … It’s an architecture, whether Carefully planned, though Intentional design it was planned or not . mistakes were made Can vary amount of No feature subsetting Configuration resource (e.g., memory) Config attributes (e.g., FB) Not a formal
    [Show full text]
  • 3Dfx Oral History Panel Gordon Campbell, Scott Sellers, Ross Q. Smith, and Gary M. Tarolli
    3dfx Oral History Panel Gordon Campbell, Scott Sellers, Ross Q. Smith, and Gary M. Tarolli Interviewed by: Shayne Hodge Recorded: July 29, 2013 Mountain View, California CHM Reference number: X6887.2013 © 2013 Computer History Museum 3dfx Oral History Panel Shayne Hodge: OK. My name is Shayne Hodge. This is July 29, 2013 at the afternoon in the Computer History Museum. We have with us today the founders of 3dfx, a graphics company from the 1990s of considerable influence. From left to right on the camera-- I'll let you guys introduce yourselves. Gary Tarolli: I'm Gary Tarolli. Scott Sellers: I'm Scott Sellers. Ross Smith: Ross Smith. Gordon Campbell: And Gordon Campbell. Hodge: And so why don't each of you take about a minute or two and describe your lives roughly up to the point where you need to say 3dfx to continue describing them. Tarolli: All right. Where do you want us to start? Hodge: Birth. Tarolli: Birth. Oh, born in New York, grew up in rural New York. Had a pretty uneventful childhood, but excelled at math and science. So I went to school for math at RPI [Rensselaer Polytechnic Institute] in Troy, New York. And there is where I met my first computer, a good old IBM mainframe that we were just talking about before [this taping], with punch cards. So I wrote my first computer program there and sort of fell in love with computer. So I became a computer scientist really. So I took all their computer science courses, went on to Caltech for VLSI engineering, which is where I met some people that influenced my career life afterwards.
    [Show full text]
  • IRIS Performer™ Programmer's Guide
    IRIS Performer™ Programmer’s Guide Document Number 007-1680-030 CONTRIBUTORS Edited by Steven Hiatt Illustrated by Dany Galgani Production by Derrald Vogt Engineering contributions by Sharon Clay, Brad Grantham, Don Hatch, Jim Helman, Michael Jones, Martin McDonald, John Rohlf, Allan Schaffer, Chris Tanner, and Jenny Zhao © Copyright 1995, Silicon Graphics, Inc.— All Rights Reserved This document contains proprietary and confidential information of Silicon Graphics, Inc. The contents of this document may not be disclosed to third parties, copied, or duplicated in any form, in whole or in part, without the prior written permission of Silicon Graphics, Inc. RESTRICTED RIGHTS LEGEND Use, duplication, or disclosure of the technical data contained in this document by the Government is subject to restrictions as set forth in subdivision (c) (1) (ii) of the Rights in Technical Data and Computer Software clause at DFARS 52.227-7013 and/ or in similar or successor clauses in the FAR, or in the DOD or NASA FAR Supplement. Unpublished rights reserved under the Copyright Laws of the United States. Contractor/manufacturer is Silicon Graphics, Inc., 2011 N. Shoreline Blvd., Mountain View, CA 94039-7311. Indigo, IRIS, OpenGL, Silicon Graphics, and the Silicon Graphics logo are registered trademarks and Crimson, Elan Graphics, Geometry Pipeline, ImageVision Library, Indigo Elan, Indigo2, Indy, IRIS GL, IRIS Graphics Library, IRIS Indigo, IRIS InSight, IRIS Inventor, IRIS Performer, IRIX, Onyx, Personal IRIS, Power Series, RealityEngine, RealityEngine2, and Showcase are trademarks of Silicon Graphics, Inc. AutoCAD is a registered trademark of Autodesk, Inc. X Window System is a trademark of Massachusetts Institute of Technology.
    [Show full text]
  • PACKET 22 BOOKSTORE, TEXTBOOK CHAPTER Reading Graphics
    A.11 GRAPHICS CARDS, Historical Perspective (edited by J Wunderlich PhD in 2020) Graphics Pipeline Evolution 3D graphics pipeline hardware evolved from the large expensive systems of the early 1980s to small workstations and then to PC accelerators in the 1990s, to $X,000 graphics cards of the 2020’s During this period, three major transitions occurred: 1. Performance-leading graphics subsystems PRICE changed from $50,000 in 1980’s down to $200 in 1990’s, then up to $X,0000 in 2020’s. 2. PERFORMANCE increased from 50 million PIXELS PER SECOND in 1980’s to 1 billion pixels per second in 1990’’s and from 100,000 VERTICES PER SECOND to 10 million vertices per second in the 1990’s. In the 2020’s performance is measured more in FRAMES PER SECOND (FPS) 3. Hardware RENDERING evolved from WIREFRAME to FILLED POLYGONS, to FULL- SCENE TEXTURE MAPPING Fixed-Function Graphics Pipelines Throughout the early evolution, graphics hardware was configurable, but not programmable by the application developer. With each generation, incremental improvements were offered. But developers were growing more sophisticated and asking for more new features than could be reasonably offered as built-in fixed functions. The NVIDIA GeForce 3, described by Lindholm, et al. [2001], took the first step toward true general shader programmability. It exposed to the application developer what had been the private internal instruction set of the floating-point vertex engine. This coincided with the release of Microsoft’s DirectX 8 and OpenGL’s vertex shader extensions. Later GPUs, at the time of DirectX 9, extended general programmability and floating point capability to the pixel fragment stage, and made texture available at the vertex stage.
    [Show full text]