• 30000BC Palaeolithic peoples in central Europe and France record numbers on bones. • 5000BC A decimal number system is in use in Egypt. • 4000BC Babylonian and Egyptian calendars in use. • 3400BC The first symbols for numbers, simple straight lines, are used in Egypt. • 3000BC The abacus is developed in the Middle East and in areas around the Mediterranean. A somewhat different type of abacus is used in China. • 3000BC Hieroglyphic numerals in use in Egypt. • 3000BC Babylonians begin to use a sexagesimal number system for recording financial transactions. It is a place-value system without a zero place value. • 2000BC Harappans adopt a uniform decimal system of weights and measures. • 1950BC Babylonians solve quadratic equations .
• 1900BC The Moscow papyrus is written. It gives details of Egyptian geometry. • 1850BC Babylonians know Pythagoras 's Theorem. • 1800BC Babylonians use multiplication tables. • 1750BC The Babylonians solve linear and quadratic algebraic equations, compile tables of square and cube roots. They use Pythagoras 's theorem and use mathematics to extend knowledge of astronomy. • 1700BC The Rhind papyrus (sometimes called the Ahmes papyrus) is written. It shows that Egyptian mathematics has developed many techniques to solve problems. Multiplication is based on repeated doubling, and division uses successive halving. • 1360BC A decimal number system with no zero starts to be used in China. • 1000BC Chinese use counting boards for calculation. • 540BC Counting rods used in China. • 500BC The Babylonian sexagesimal number system is used to record and predict the positions of the Sun, Moon and planets.
Egyptian Numerals
Egyptian number system is additive. Mesopotamia Civilization
Above: Babylonian sexagesimal (base 60) number. It is the first positional number system. Left: Oldest cuneiform writing by Sumerian.
Babylonian numerals Chinese numerals
4359
Indian numerals
Greek number systems Roman Numerals
I 1 VI 6 L 50 II 2 VII 7 C 100 III 3 VIII 8 D 500 IV 4 IX 9 M 1000 V 5 X 10
MMMDCCCLXXVIII 3878
Mayan mathematics 250 AD to 900 AD, this period was built on top of a civilization which had lived in the region from about 2000 BC.
[8;14;3;1;12] represents 12 + 1 x 20 + 3 x 18 x 20 + 14 x 18 x 20 2 + 8 x 18 x 20 3 = 1253912.
The numerals from al-Sizji's treatise of 969 Abaci
Chinese Abacus
Boethius (Hindu-Arabic) vs Pythagoras (counting board)
Logarithm and Slide Rule
John Napier of Scotland developed the concept of logarithm around AD 1600.
Slide rule based on the property of logarithm was invented in the late 1700s. y If a =x, then y = log ax log ( u v) = log ( u) + log( v)
Decimal Numbers: Base 10
Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9
Example: 3271 = (3x10 3) + (2x10 2) + (7x10 1) + (1x10 0) Numbers: positional notation
• Number Base B ⇒ B symbols per digit: – Base 10 (Decimal): 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 Base 2 (Binary): 0, 1 • Number representation:
– d31 d30 ... d 1d0 is a 32 digit number × 31 × 30 × 1 × 0 – value = d31 ×× B + d30 ×× B + ... + d1 ×× B + d0 ×× B • Binary: 0,1 (In binary digits called “bits”) – 0b11010 = 1×××24 + 1×××23 + 0×××22 + 1×××21 + 0×××20 = 16 + 8 + 2 = 26 – Here 5 digit binary # turns into a 2 digit decimal # – Can we find a base that converts to binary easily?
#s often written 0b…
Hexadecimal Numbers: Base 16
• Hexadecimal: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F – Normal digits + 6 more from the alphabet – In C, written as 0x … (e.g., 0xFAB5) • Conversion: Binary ⇔Hex – 1 hex digit represents 16 decimal values – 4 binary digits represent 16 decimal values ⇒1 hex digit replaces 4 binary digits • One hex digit is a “ nibble ”. Two is a “ byte ” • Example: – 1010 1100 0011 (binary) = 0x_____ ?
Decimal vs. Hexadecimal vs. Binary
Examples: 00 0 0000 01 1 0001 1010 1100 0011 (binary) 02 2 0010 = 0xAC3 03 3 0011 04 4 0100 10111 (binary) 05 5 0101 = 0001 0111 (binary) 06 6 0110 = 0x17 07 7 0111 08 8 1000 0x3F9 09 9 1001 = 11 1111 1001 (binary) 10 A 1010 How do we convert between hex and 11 B 1011 Decimal? 12 C 1100 13 D 1101 14 E 1110 15 F 1111 What to do with representations of numbers? • Just what we do with numbers! – Add them – Subtract them – Multiply them 1 1 – Divide them 1 0 1 0 – Compare them • Example: 10 + 7 = 17 + 0 1 1 1 – …so simple to add in binary that we can build circuits to do it! – subtraction just as you would in decimal ------– Comparison: How do you tell if X > Y ? 1 0 0 0 1
Which base do we use? • Decimal: great for humans, especially when doing arithmetic • Hex: if human looking at long strings of binary numbers, its much easier to convert to hex and look 4 bits/symbol – Terrible for arithmetic on paper • Binary: what computers use; you will learn how computers do +, -, *, / – To a computer, numbers always binary – Regardless of how number is written: 32 ten == 32 10 == 0x20 == 100000 2 == 0b100000 – Use subscripts “ten”, “hex”, “two” in book, slides when might be confusing
BIG IDEA: Bits can represent anything!! • Characters? – 26 letters ⇒ 5 bits (2 5 = 32) – upper/lower case + punctuation ⇒ 7 bits (in 8) (“ASCII”) – standard code to cover all the world’s languages ⇒ 8,16,32 bits (“Unicode”) www.unicode.com • Logical values? – 0 ⇒ False, 1 ⇒ True • colors ? Ex: • locations / addresses? commands? • MEMORIZE: N bits ⇔ at most 2 N things
Red (00) Green (01) Blue (11) How to Represent Negative Numbers? • So far, un signed numbers • Obvious solution: define leftmost bit to be sign! – 0 ⇒ +, 1 ⇒ - – Rest of bits can be numerical value of number • Representation called sign and magnitude
• MIPS uses 32-bit integers. +1 ten would be: 0000 0000 0000 0000 0000 0000 0000 0001
• And –1ten in sign and magnitude would be: 1000 0000 0000 0000 0000 0000 0000 0001
Shortcomings of sign and magnitude? • Arithmetic circuit complicated – Special steps depending whether signs are the same or not • Also, two zeros
– 0x00000000 = +0 ten
– 0x80000000 = -0ten – What would two 0s mean for programming?
• Therefore sign and magnitude abandoned
Another try: complement the bits
• Example: 710 = 00111 2 -710 = 11000 2 • Called One’s Complement • Note: positive numbers have leading 0s, negative numbers have leadings 1s.
00000 00001... 01111 10000 ... 11110 11111
• What is -00000 ? Answer: 11111 • How many positive numbers in N bits? • How many negative ones? Shortcomings of One’s complement?
• Arithmetic still a somewhat complicated. • Still two zeros
– 0x00000000 = +0 ten
– 0xFFFFFFFF = -0ten • Although used for awhile on some computer products, one’s complement was eventually abandoned because another solution was better.
Standard Negative Number Representation
• What is result for unsigned numbers if tried to subtract large number from a small one? – Would try to borrow from string of leading 0s, so result would have a string of leading 1s » 3 - 4 ⇒ 00…0011 - 00…0100 = 11…1111 – With no obvious better alternative, pick representation that made the hardware simple – As with sign and magnitude, leading 0s ⇒ positive, leading 1s ⇒ negative » 000000...xxx is ≥ 0, 111111...xxx is < 0 » except 1…1111 is -1, not -0 (as in sign & mag.) • This representation is Two’s Complement
Sign and Magnitude
-7 +0 -6 1111 0000 +1 Example: N = 4 1110 0001 -5 +2 + 1101 0010
-4 1100 0011 +3 0 100 = + 4
-3 1011 0100 +4 1 100 = - 4 1010 0101 -2 +5 - 1001 0110 -1 1000 0111 +6 -0 +7 High order bit is sign: 0 = positive (or zero), 1 = negative
Remaining low order bits is the magnitude: 0 (000) thru 7 (111)
Number range for n bits = +/- 2n-1 - 1
Representations for 0? Operations: =, <, >, +, - ??? Ones Complement (algebraically)
N is positive number, then N is its negative 1's complement
4 N = (2 n - 1) - N 2 = 10000
-1 = 00001 Example: 1's complement of 7 1111
-7 = 0111
1000 -7 in 1's comp .
Bit manipulation:
simply complement each of the bits
0111 -> 1000
Ones Complement on the number wheel -0 +0 -1 1111 0000 +1 1110 0001 -2 +2 + 1101 0010
-3 1100 0011 +3 0 100 = + 4
-4 1011 0100 +4 1 011 = - 4 1010 0101 -5 +5 - 1001 0110 -6 1000 0111 +6 -7 +7
Subtraction implemented by addition & 1's complement Sign is easy to determine Closure under negation. If A can be represented, so can -A Still two representations of 0! If A = B then is A – B == 0 ? Addition is almost clockwise advance, like unsigned
Twos Complement number wheel
-1 +0 -2 1111 0000 +1 1110 0001 -3 +2 + like 1's comp 1101 0010 except shifted -4 1100 0011 +3 0 100 = + 4 one position clockwise -5 1011 0100 +4 1 100 = - 4 1010 0101 -6 +5 - 1001 0110 -7 1000 0111 +6 -8 +7 Easy to determine sign (0?) Only one representation for 0 Addition and subtraction just as in unsigned case Simple comparison: A < B iff A – B < 0 One more negative number than positive number - one number has no additive inverse Twos Complement (algebraically)
N* = 2 n -N 4 2 = 10000
Example: Twos complement of 7 sub 7 = 0111 1001 = repr. of -7
4 Example: Twos complement of -7 2 = 10000 sub -7 = 1001
0111 = repr. of 7 Bit manipulation:
Twos complement: take bitwise complement and add one
0111 -> 1000 + 1 -> 1001 (representation of -7)
1001 -> 0110 + 1 -> 0111 (representation of 7)
How is addition performed in each number system?
• Operands may be positive or negative
Sign Magnitude Addition
Operand have same sign: unsigned addition of magnitudes 4 0100 -4 1100 result sign bit is the same as the operands' + 3 0011 + (-3) 1011 sign 7 0111 -7 1111
Operands have different signs: subtract smaller from larger and keep sign of the larger
4 0100 -4 1100
- 3 1011 + 3 0011
1 0001 -1 1001 Ones complement addition
Perform unsigned addition, then add in the end-around carry
4 0100 -4 1011
+ 3 0011 + (-3) 1100
7 0111 -7 10111
End around carry 1
1000
4 0100 -4 1011
- 3 1100 + 3 0011
1 10000 -1 1110 End around carry 1
0001
When carry occurs
-0 +0 -1 1111 0000 +1 1110 0001 -2 +2 + 1101 0010
-3 1100 0011 +3 0 100 = + 4
-4 1011 0100 +4 1 011 = - 4 1010 0101 -5 +5 - 1001 0110 -6 1000 0111 +6 M – N where M > N -7 +7
-M - N
Why does end-around carry work?
Recall: N = (2 n - 1) - N
End-around carry work is equivalent to subtracting 2 n and adding 1
n n M - N = M + N = M + (2 - 1 - N) = (M - N) + 2 - 1 (when M > N)
n n -M + (-N) = M + N = (2 - M - 1) + (2 - N - 1) n-1 M + N < 2 n n = 2 + [2 - 1 - (M + N)] - 1 after end around carry: n = 2 - 1 - (M + N)
this is the correct form for representing -(M + N) in 1's comp! Twos Complement Addition
4 0100 Perform unsigned addition and -4 1100 Discard the carry out. + 3 0011 + (-3) 1101 7 0111 -7 11001 Overflow?
4 0100 -4 1100
- 3 1101 + 3 0011
1 10001 -1 1111
Simpler addition scheme makes twos complement the most common choice for integer number systems within digital systems
Twos Complement number wheel
-1 +0 -2 1111 0000 +1 1110 0001 -3 +2 + 1101 0010
-4 1100 0011 +3 0 100 = + 4
-5 1011 0100 +4 1 100 = - 4 1010 0101 -6 +5 - 1001 0110 -7 1000 0111 +6 -8 +7
-M + -N where N + M ≤ 2n-1
-M + N when N > M
2s Comp: ignore the carry out
M + N when N > M: n n M* + N = (2 - M) + N = 2 + (N - M) n Ignoring carry-out is just like subtracting 2
M + N where N + M ≤ 2n-1 n n -M + (-N) = M* + N* = (2 - M) + (2 - N) n n = 2 - (M + N) + 2
After ignoring the carry, this is just the right twos compl. representation for -(M + N)! 2s Complement Overflow
How can you tell an overflow occurred ? Add two positive numbers to get a negative number
or two negative numbers to get a positive number -1 +0 -1 +0 -2 1111 0000 +1 -2 1111 0000 +1 1110 1110 -3 0001 -3 0001 1101 +2 1101 +2 0010 0010 -4 -4 1100 0011 +3 1100 0011 +3 -5 1011 -5 1011 0100 +4 0100 +4 1010 1010 -6 0101 -6 0101 1001 +5 +5 0110 1001 0110 -7 1000 0111 +6 -7 1000 0111 +6 -8 +7 -8 +7
5 + 3 = -8! -7 - 2 = +7!
2s comp. Overflow Detection
0 1 1 1 1 0 0 0 5 0 1 0 1 -7 1 0 0 1
3 0 0 1 1 -2 1 1 0 0
-8 1 0 0 0 7 1 0 1 1 1 Overflow Overflow
0 0 0 0 1 1 1 1 5 0 1 0 1 -3 1 1 0 1
2 0 0 1 0 -5 1 0 1 1
7 0 1 1 1 -8 1 1 0 0 0
No overflow No overflow
Overflow occurs when carry in to sign does not equal carry out
Two’s Complement for N=32
0000 ... 0000 0000 0000 0000 two = 0ten 0000 ... 0000 0000 0000 0001 two = 1ten 0000 ... 0000 0000 0000 0010 two = 2ten . . . 0111 ... 1111 1111 1111 1101 two = 2,147,483,645 ten 0111 ... 1111 1111 1111 1110 two = 2,147,483,646 ten 0111 ... 1111 1111 1111 1111 two = 2,147,483,647 ten 1000 ... 0000 0000 0000 0000 two = –2,147,483,648 ten 1000 ... 0000 0000 0000 0001 two = –2,147,483,647 ten 1000 ... 0000 0000 0000 0010 two = –2,147,483,646 ten . . . 1111 ... 1111 1111 1111 1101 two = –3ten 1111 ... 1111 1111 1111 1110 two = –2ten 1111 ... 1111 1111 1111 1111 two = –1ten • One zero; 1st bit called sign bit
• 1 “extra” negative:no positive 2,147,483,648 ten Two’s Complement Formula • Can represent positive and negative numbers in terms of the bit value times a power of 2: 31 30 2 1 0 d31 x -(2 ) + d 30 x 2 + ... + d 2 x 2 + d 1 x 2 + d 0 x 2
• Example: 1101 two = 1x-(2 3) + 1x2 2 + 0x2 1 + 1x2 0 = -23 + 2 2 + 0 + 2 0 = -8 + 4 + 0 + 1 = -8 + 5
= -3ten
Two’s Complement shortcut: Negation • Change every 0 to 1 and 1 to 0 (invert or complement), then add 1 to the result • Proof: Sum of number and its (one’s) complement must be 111...111 two However, 111...111 two = -1ten Let x’ ⇒ one’s complement representation of x Then x + x’ = -1 ⇒ x + x’ + 1 = 0 ⇒ x’ + 1 = -x • Example: -3 to +3 to -3
• x : 1111 1111 1111 1111 1111 1111 1111 1101 two
• x’: 0000 0000 0000 0000 0000 0000 0000 0010 two
• +1: 0000 0000 0000 0000 0000 0000 0000 0011 two
• ()’: 1111 1111 1111 1111 1111 1111 1111 1100 two
• +1: 1111 1111 1111 1111 1111 1111 1111 1101 two
You should be able to do this in your head…
Two’s comp. shortcut: Sign extension
• Convert 2’s complement number rep. using n bits to more than n bits • Simply replicate the most significant bit (sign bit) of smaller to fill new bits –2’s comp. positive number has infinite 0s –2’s comp. negative number has infinite 1s –Binary representation hides leading bits; sign extension restores some of them
–16-bit -4ten to 32-bit:
1111 1111 1111 1100 two
1111 1111 1111 1111 1111 1111 1111 1100 two What if too big?
• Binary bit patterns above are simply representatives of numbers. Strictly speaking they are called “numerals”. • Numbers really have an ∞∞∞ number of digits – with almost all being same (00…0 or 11…1) except for a few of the rightmost digits – Just don’t normally show leading digits • If result of add (or -, *, / ) cannot be represented by these rightmost HW bits, overflow is said to have occurred.
00000 00001 00010 11110 11111 unsigned
Kilo, Mega, Giga, Tera, Peta, Exa, Zetta, Yotta physics.nist.gov/cuu/Units/binary.html
Name Abbr Factor SI size
Kilo K 210 = 1,024 10 3 = 1,000
Mega M 220 = 1,048,576 10 6 = 1,000,000
Giga G 230 = 1,073,741,824 10 9 = 1,000,000,000
Tera T 240 = 1,099,511,627,776 10 12 = 1,000,000,000,000
Peta P 250 = 1,125,899,906,842,624 10 15 = 1,000,000,000,000,000
Exa E 260 = 1,152,921,504,606,846,976 10 18 = 1,000,000,000,000,000,000
Zetta Z 270 = 1,180,591,620,717,411,303,424 10 21 = 1,000,000,000,000,000,000,000
Yotta Y 280 = 1,208,925,819,614,629,174,706,176 10 24 = 1,000,000,000,000,000,000,000,000
• Confusing! Common usage of “kilobyte” means 1024 bytes, but the “correct” SI value is 1000 bytes • Hard Disk manufacturers & Telecommunications are the only computing groups that use SI factors, so what is advertised as a 30 GB drive will actually only hold about 28 x 230 bytes, and a 1 Mbit/s connection transfers 10 6 bps.
kibi, mebi, gibi, tebi, pebi, exbi, zebi, yobi en.wikipedia.org/wiki/Binary_prefix
Name Abbr Factor
kibi Ki 210 = 1,024
mebi Mi 220 = 1,048,576
gibi Gi 230 = 1,073,741,824
tebi Ti 240 = 1,099,511,627,776
pebi Pi 250 = 1,125,899,906,842,624
exbi Ei 260 = 1,152,921,504,606,846,976
zebi Zi 270 = 1,180,591,620,717,411,303,424
yobi Yi 280 = 1,208,925,819,614,629,174,706,176
• International Electrotechnical Commission (IEC) in 1999 introduced these to specify binary quantities. – Names come from shortened versions of the original SI prefixes (same pronunciation) and bi is short for “binary”, but pronounced “bee” :-( – Now SI prefixes only have their base-10 meaning and never have a base-2 meaning. The way to remember #s
• What is 2 34 ? How many bits addresses (I.e., what’s ceil log 2 = lg of) 2.5 TiB? • Answer! 2 XY means… X=0 ⇒ --- X=1 ⇒ kibi ~10 3 X=2 ⇒ mebi ~10 6 Y=0 ⇒ 1 X=3 ⇒ gibi ~10 9 X=4 ⇒ tebi ~10 12 Y=1 ⇒ 2 X=5 ⇒ tebi ~10 15 X=6 ⇒ exbi ~10 18 Y=2 ⇒ 4 X=7 ⇒ zebi ~10 21 ⇒ X=8 ⇒ yobi ~10 24 Y=3 8 Y=4 ⇒ 16 Y=5 ⇒ 32 Y=6 ⇒ 64 Y=7 ⇒ 128 Y=8 ⇒ 256 Y=9 ⇒ 512 MEMORIZE!
Comparing the signed number systems Decimal S.M. 1’s comp. 2’s comp. • Here are all the 4-bit numbers 7 0111 0111 0111 in the different systems. 6 0110 0110 0110 • Positive numbers are the 5 0101 0101 0101 same in all three 4 0100 0100 0100 representations. 3 0011 0011 0011 • Signed magnitude and one’s 2 0010 0010 0010 complement have two ways 1 0001 0001 0001 of representing 0. This makes things more complicated. 0 0000 0000 0000 • Two’s complement has -0 1000 1111 — asymmetric ranges; there is -1 1001 1110 1111 one more negative number -2 1010 1101 1110 than positive number. Here, -3 1011 1100 1101 you can represent -8 but not -4 1100 1011 1100 +8. -5 1101 1010 1011 • However, two’s complement -6 1110 1001 1010 is preferred because it has -7 1111 1000 1001 only one 0, and its addition -8 — — 1000
algorithm is the simplest.
And in Conclusion... • We represent “things” in computers as particular bit patterns: N bits ⇒ 2N • Decimal for human calculations, binary for computers, hex to write binary more easily
• 1’s complement - mostly abandoned
• 2’s complement universal in computing: cannot avoid, so learn
• Overflow: numbers ∞∞∞; computers finite, errors! Numbers represented in memory
00000 • Memory is a place to store bits • A word is a fixed number of bits (eg, 32) at an address 101101100110 01110 • Addresses are naturally represented as unsigned numbers in C
11111 = 2 k - 1
Signed vs. Unsigned Variables
• Java just declares integers int – Uses two’s complement • C has declaration int also – Declares variable as a signed integer – Uses two’s complement • Also, C declaration unsigned int – Declares a unsigned integer – Treats 32-bit number as unsigned integer, so most significant bit is part of the number , not a sign bit
Binary Codes for Decimal Digits
There are over 8,000 ways that you can chose 10 elements from the 16 binary numbers of 4 bits. A few are useful:
Decimal 8,4,2,1 Excess3 8,4,-2,-1 0 0000 0011 0000 1 0001 0100 0111 2 0010 0101 0110 3 0011 0110 0101 4 0100 0111 0100 5 0101 1000 1011 6 0110 1001 1010 7 0111 1010 1001 8 1000 1011 1000 9 1001 1100 1111
Binary Coded Decimal (BCD)
Binary Coded Decimal or 8,4,2,1 Code. This code is the simplest, most intuitive binary code for decimal digits and uses the same weights as a binary number, but only encodes the first ten values from 0 to 9. Examples: 1001 is 8 + 1 = 9 0011 is 2 + 1 = 3 0100 is 4 1010 is an illegal code .
Other Decimal Codes
The Excess-3 Code adds binary 0011 to the BCD
code. The BCD (8,4, 2, 1) Code, and the (8,4,-2,-1) Code are examples of weighted
codes. Each bit has a "weight" associated with it and you can compute the decimal value by adding the weights where a 1 exists in the code-word.
Example: 1111 in (8,4, -2, -1) is 8 + 4 + ( -2) + ( -1) = 9
Warning: Conversion or Coding?
DO NOT mix up CONVERSION of a decimal number to a binary number with CODING a decimal number with a BINARY CODE.
13 10 = 1101 2 (This is CONVERSION )
13 ⇔ 00010011 (This is CODING ) Binary Addition: Half Adder
Ai 0 1 Ai 0 1 Ai Bi Sum Carry Bi Bi 0 0 0 0 0 0 1 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 1 1 1 0 1
Sum = Ai Bi + Ai Bi Carry = Ai Bi = Ai + Bi A i Sum
Bi Half-adder Schematic
Carry
But each bit position may have a carry in…
Full-Adder
1 A B CI S CO A B 0 0 1 1 Co Cin 0 0 0 0 0 CI 00 01 11 10 0 0 1 1 0 + 0 0 1 0 B 0 0 1 0 1 0 1 0 1 0 S 0 1 0 1 A 0 1 1 0 1 1 1 0 1 0 1 0 0 1 0 S 1 0 1 0 1 1 1 0 0 1 A B 1 1 1 1 1 CI 00 01 11 10 0 0 0 1 0 CO 1 S = CI xor A xor B 0 1 1 1
CO = B CI + A CI + A B = CI (A + B) + A B
Now we can connect them up to do multiple bits…
Ripple Carry
A3 B3 A2 B2 A1 B1 A0 B0
+ + + +
S3 C3 S2 C2 S1 C1 S0 Full Adder from Half Adders (little aside) Standard Approach: 6 Gates A A B B CI CO S CI A B
Alternative Implementation: 5 Gates
A + B A + B + CI A Half SSHalf S Adder A B Adder CI (A + B) B CO CO CI CO
A B + CI (A xor B) = A B + B CI + A CI
Delay in the Ripple Carry Adder
Critical delay: the propagation of carry from low to high order stages
@0 A @1 @N+1 late B arriving @0 signal @N CI CO @0 A @N+2 two gate delays B to compute CO @0 @1
C0
A 0 S0 @2 0 B C @2 4 stage 0 1 adder A 1 S1 @3 1 B 1 C2 @4
A 2 S @5 2 2 B 2 C3 @6
A 3 S3 @7 3 final sum and B 3 C4 @8 carry
Ripple Carry Timing Critical delay: the propagation of carry from low to high order stages
S0, C1 Valid S1, C2 Valid S2, C3 Valid S3, C4 Valid
1111 + 0001 worst case addition
T0 T2 T4 T6 T8 T0: Inputs to the adder are valid 2 delays to compute sum T2: Stage 0 carry out (C1) but last carry not ready T4: Stage 1 carry out (C2) until 6 delays later T6: Stage 2 carry out (C3)
T8: Stage 3 carry out (C4) Adders (cont.)
Ripple Adder b0 a0 c7 c6 c5 c4 c3 c2 c0 FA
s7 s6 c1 s0 Ripple adder is inherently slow because, in general s7 must wait for c7 which must wait for c6 …
T α n, Cost α n
How do we make it faster, perhaps with more cost? Classic approach: Carry Look-Ahead Or use a MUX !!!
Carry Select Adder
b7a7 b6a6 b5a5 b4 a4 0 b3a3 b2a2 b1 a1 b0 a0 c0 FA
s3 s2 s1 s0 c8 0 b7a7 b6a6 b5a5 b4 a4 1 1
FA
1 0 1 0 1 0 1 0
s7 s6 s5 s4
T = Tripple_adder / 2 + T MUX
COST = 1.5 * COST ripple_adder + (n+1) * COST MUX
Extended Carry Select Adder
b15-b12 a15-a12 b11-b8 a11-a8 b7-b4 a7-a4
b3-b0 a3-a0
4-bit Adder 4-bit Adder 4-bit Adder
1 1 1 cout 4-bit Adder cin 0 4-bit 0 4-bit 0 4-bit Adder Adder Adder
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
• What is the optimal # of blocks and # of bits/block? – If # blocks too large delay dominated by total mux delay – If # blocks too small delay dominated by adder delay per block
T α sqrt(N), N stages of N bits Cost ≈2*ripple + muxes Carry Select Adder Performance
b15-b12 a15-a12 b11-b8 a11-a8 b7-b4 a7-a4
b3-b0 a3-a0
4-bit Adder 4-bit Adder 4-bit Adder
cout 1 1 1 4-bit Adder cin 0 4-bit 0 4-bit 0 4-bit Adder Adder Adder
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
• Compare to ripple adder delay:
Ttotal = 2 sqrt(N) T FA –TFA, assuming T FA = T MUX
For ripple adder Ttotal = N T FA “cross-over” at N=3, Carry select faster for any value of N>3. • Is sqrt(N) really the optimum? – From right to left increase size of each block to better match delays – Ex: 64-bit adder, use block sizes [12 11 10 9 8 7 7] • How about recursively defined carry select?
What really happens with the carries
b0 a0 c7 c6 c5 c4 c3 c2 c0 FA
c1 s7 s6 s0
A B Cout S Carry action Ai 0 0 0 Cin kill Gi Bi 0 1 Cin ~Cin Propagate propagate 1 0 Cin ~Cin Ai Pi generate 1 1 1 Cin Bi
Carry Generate Gi = Ai Bi must generate carry when A = B = 1
Carry Propagate Pi = Ai xor Bi carry in will equal carry out here
All generates and propagates in parallel at first stage. No ripple.
Carry Look Ahead Logic
Carry Generate Gi = Ai Bi must generate carry when A = B = 1
Carry Propagate Pi = Ai xor Bi carry in will equal carry out here
Sum and Carry can be reexpressed in terms of generate/propagate:
Si = Ai xor Bi xor Ci = Pi xor Ci Ci Si Pi Ci+1 = Ai Bi + Ai Ci + Bi Ci
= Ai Bi + Ci (Ai + Bi) Gi = Ai Bi + Ci (Ai xor Bi) Ci Ci+1 = Gi + Ci Pi Pi All Carries in Parallel
Reexpress the carry logic for each of the bits: C1 = G0 + P0 C0
C2 = G1 + P1 C1 = G1 + P1 G0 + P1 P0 C0
C3 = G2 + P2 C2 = G2 + P2 G1 + P2 P1 G0 + P2 P1 P0 C0
C4 = G3 + P3 C3 = G3 + P3 G2 + P3 P2 G1 + P3 P2 P1 G0 + P3 P2 P1 P0 C0
Each of the carry equations can be implemented in a two-level logic network
Variables are the adder inputs and carry in to stage 0!
CLA Implementation
Ai Pi @ 1 gate delay Bi Adder with Propagate and Generate Outputs Ci Si @ 2 gate delays
Gi @ 1 gate delay Increasingly complex logic
C0 C0 C0 P0 C1 P0 P0 P1 P1 G0 P2 P2 P3 G0 P1 G0 C0 P2 P1 P0 P2 P1 G1 C3 P3 G0 P2 C2 G1 P1 P2 G2 P3 G1 C4 G2 P3
G3
How do we extend this to larger adders?
A15-12 B15-12 A11-8 B11-8 A7-4 B7-4 A3-0 B3-0 4 4 4 4 4 4 4 4
4 4 4 4
S15-12 S11-8 S7-4 S3-0
• Faster carry propagation – 4 bits at a time • But still linear • Can we get to log? • Compute propagate and generate for each adder BLOCK Cascaded Carry Lookahead
4 4 4 4 4 4 4 4
A [15-12] B[15-12] A [11-8] B[1 1-8] A [7-4] B[7-4] A [3-0] B[3-0] C16 C C C4 C 4-bit Adder 12 4-bit Adder 8 4-bit Adder 4-bit Adder 0 P G P G P G P G @0 4 @8 4 @8 4 @7 4 @4 S [15-12] S[1 1-8] S[7-4] S [3-0] @2 @3 @5 @2 @3 @5 @2 @3 @4 @2 @3
P3 G3 C3 P2 G2 C2 P1 G1 C1 P0 G 0 C 16 C0 C4 Lookahead Carry Unit C0 @5 @0 P3-0 G 3-0 @3 @5
4 bit adders with internal carry lookahead
second level carry lookahead unit, extends lookahead to 16 bits
One more level to 64 bits
Trade-offs in combinational logic design
• Time vs. Space Trade-offs
Doing things fast requires more logic and thus more space
Example: carry lookahead logic
• Simple with lots of gates vs complex with fewer
• Arithmetic Logic Units
Critical component of processor datapath Inner-most "loop" of most computer instructions
2s comp. Overflow Detection
0 1 1 1 1 0 0 0 5 0 1 0 1 -7 1 0 0 1
3 0 0 1 1 -2 1 1 0 0
-8 1 0 0 0 7 1 0 1 1 1 Overflow Overflow
0 0 0 0 1 1 1 1 5 0 1 0 1 -3 1 1 0 1
2 0 0 1 0 -5 1 0 1 1
7 0 1 1 1 -8 1 1 0 0 0
No overflow No overflow
Overflow occurs when carry in to sign does not equal carry out 2s Complement Adder/Subtractor
A 3 B 3 B3 A 2 B2 B2 A 1 B 1 B1 A 0 B 0 B0
0 1 Sel 0 1 Sel 0 1 Sel 0 1 Sel
A B A B A B A B
CO + CI CO + CI CO + CI CO + CI Add/Subtract
S S S S
S3 S2 S1 S0
Overflow
A - B = A + (-B) = A + B + 1
Summary
• Circuit design for unsigned addition – Full adder per bit slice – Delay limited by Carry Propagation » Ripple is algorithmically slow, but wires are short • Carry select – Simple, resource-intensive – Excellent layout • Carry look-ahead – Excellent asymptotic behavior – Great at the board level, but wire length effects are significant on chip • Digital number systems – How to represent negative numbers – Simple operations – Clean algorithmic properties • 2s complement is most widely used – Circuit for unsigned arithmetic – Subtract by complement and carry in – Overflow when cin xor cout of sign-bit is 1
Basic Arithmetic and the ALU
• Now – Integer multiplication » Booth’s algorithm – Integer division » Restoring, non-restoring – Floating point representation – Floating point addition, multiplication Multiplication 1 0 0 0 • Flashback to 3 rd grade – Multiplier x 1 0 0 1 – Multiplicand – Partial products 1 0 0 0 – Final sum • Base 10: 8 x 9 = 72 0 0 0 0 – PP: 8 + 0 + 0 + 64 = 72 • How wide is the result? 0 0 0 0 – log(n x m) = log(n) + log(m) – 32b x 32b = 64b result 1 0 0 0
1 0 0 1 0 0 0
Combinational Multiplier
• Generating partial products – 2:1 mux based on multiplier[i] selects multiplicand or 0x0 – 32 partial products (!) • Summing partial products – Build Wallace tree of CSA
Carry Save Adder
A + B => S
Save carries A + B => S, Cout
Use Cin A + B + C => S1, S2 (3# to 2# in parallel) Used in combinational multipliers by building a Wallace Tree
c b a
CSA
c s Wallace Tree
f e d c b a CSA CSA
CSA
CSA
Multicycle Multipliers
• Combinational multipliers – Very hardware-intensive – Integer multiply relatively rare – Not the right place to spend resources • Multicycle multipliers – Iterate through bits of multiplier – Conditionally add shifted multiplicand
1 0 0 0 Multiplier (F4.25) x 1 0 0 1 1 0 0 0
0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 Multiplier Start (F4.26)
Multiplier0 = 1 1. Test Multiplier0 = 0 Multiplier0
1a. Add multiplicand to product and place the result in Product register
1 0 0 0 x 1 0 0 1 2. Shift the Multiplicand register left 1 bit 1 0 0 0
0 0 0 0 3. Shift the Multiplier register right 1 bit 0 0 0 0
1 0 0 0 No: < 32 repetitions 32nd repetition? 1 0 0 1 0 0 0 Yes: 32 repetitions
Done
Multiplier Improvements
• Do we really need a 64-bit adder? – No, since low-order bits are not involved – Hence, just use a 32-bit adder » Shift product register right on every step • Do we really need a separate multiplier register? – No, since low-order bits of 64-bit product are initially unused – Hence, just store multiplier there initially
1 0 0 0 Multiplier (F4.31) x 1 0 0 1 1 0 0 0
0 0 0 0 Multiplicand 0 0 0 0 1 0 0 0 32 bits 1 0 0 1 0 0 0
32-bit ALU
Shift right Control Product Write test 64 bits Multiplier Start (F4.32)
Product0 = 1 1. Test Product0 = 0 P roduct0
1a. Add multiplicand to the left half of the product and place the result in the left half of the Product register
1 0 0 0 x 1 0 0 1 2. Shift the Product register right 1 bit 1 0 0 0 0 0 0 0
No: < 32 repetitions 0 0 0 0 32nd repetition? 1 0 0 0 Yes: 32 repetitions 1 0 0 1 0 0 0
D one
Signed Multiplication
• Recall – For p = a x b, if a<0 or b<0, then p < 0 – If a<0 and b<0, then p > 0 – Hence sign(p) = sign(a) xor sign(b) • Hence – Convert multiplier, multiplicand to positive number with (n-1) bits – Multiply positive numbers – Compute sign, convert product accordingly • Or, – Perform sign-extension on shifts for F4.31 design – Right answer falls out
Booth’s Encoding
• Recall grade school trick – When multiplying by 9: » Multiply by 10 (easy, just shift digits left) » Subtract once – E.g. » 123454 x 9 = 123454 x (10 – 1) = 1234540 – 123454 » Converts addition of six partial products to one shift and one subtraction • Booth’s algorithm applies same principle – Except no ‘9’ in binary, just ‘1’ and ‘0’ – So, it’s actually easier! Booth’s Encoding
• Search for a run of ‘1’ bits in the multiplier – E.g. ‘0110’ has a run of 2 ‘1’ bits in the middle – Multiplying by ‘0110’ (6 in decimal) is equivalent to multiplying by 8 and subtracting twice, since 6 x m = (8 – 2) x m = 8m – 2m • Hence, iterate right to left and: – Subtract multiplicand from product at first ‘1’ – Add multiplicand to product after first ‘1’ – Don’t do either for ‘1’ bits in the middle
Booth’s Algorithm
Current Bit to Explanation Example Operation bit right
1 0 Begins run of ‘1’ 0000111 10 00 Subtract
1 1 Middle of run of ‘1’ 000011 11 000 Nothing
0 1 End of a run of ‘1’ 000 01 111000 Add
0 0 Middle of a run of ‘0’ 000 01111000 Nothing
Integer Division
• Again, back to 3 rd grade
1 0 0 1 Quotient
Divisor 1 0 0 0 1 0 0 1 0 1 0 Dividend
- 1 0 0 0
1 0
1 0 1
1 0 1 0
- 1 0 0 0
1 0 Remainder Integer Division
• How does hardware know if division fits? – Condition: if remainder divisor – Use subtraction: (remainder – divisor) 0 • OK, so if it fits, what do we do?
– Remainder n+1 = Remainder n – divisor • What if it doesn’t fit? – Have to restore original remainder • Called restoring division
Start
1. Subtract the Divisor register from the Remainder register and place the Integer Division result in the Remainder register
(F4.40) > Remainder – 0 Remainder < 0 Test Remainder
2a. Shift the Quotient register to the left, 2b. Restore the original value by adding setting the new rightmost bit to 1 the Divisor register to the Remainder register and place the sum in the Remainder register. Also shift the Quotient register to the left, setting the 1 0 0 1 Quotient new least significant bit to 0
Divisor 1 0 0 0 1 0 0 1 0 1 0 Dividend
- 1 0 0 0
1 0 3. Shift the Divisor register right 1 bit
1 0 1
1 0 1 0 No: < 33 repetitions - 1 0 0 0 33rd repetition?
1 0 Remainder Yes: 33 repetitions
Done
1 0 0 1 Quotient Integer Division Divisor 1 0 0 0 1 0 0 1 0 1 0 Dividend - 1 0 0 0
1 0
1 0 1
1 0 1 0
- 1 0 0 0
1 0 Remainder
Divisor Shift right 64 bits
Quotient 64-bit ALU Shift left 32 bits
Remainder Control Write test 64 bits Division Improvements
• Skip first subtract – Can’t shift ‘1’ into quotient anyway – Hence shift first, then subtract » Undo extra shift at end • Hardware similar to multiplier – Can store quotient in remainder register – Only need 32b ALU » Shift remainder left vs. divisor right
S ta r t
Improved 1. Shift the Rem ainder register left 1 bit Divider 2. Subtract the Divisor register from the left half of the Remainder register and place the result in the left half of the (F4.40) Remainder register
Remainder –> 0 Remainder < 0 Test Rem ainder
3a. Shift the R e m a ind e r register to the 3b. Restore the original value by adding left, setting the new rightm ost bit to 1 the D ivisor register to the left half of the Remainder register and place the sum in the left half of the Rem ainder register. Also shift the R em ain d er reg ister to the left, setting the new rightmost bit to 0
No: < 32 repetitions 32nd repetition?
Yes: 32 repetitions
D o n e. Shift left half of Remainder right 1 bit
Improved Divider (F4.41)
Divisor
32 bits
32-bit ALU
Shift right Control Remainder Shift left test Write 64 bits Further Improvements
• Division still takes: – 2 ALU cycles per bit position » 1 to check for divisibility (subtract) » One to restore (if needed) • Can reduce to 1 cycle per bit – Called non-restoring division – Avoids restore of remainder when test fails
Non-restoring Division
• Consider remainder to be restored:
Ri = R i-1 – d < 0
– Since Ri is negative, we must restore it, right? – Well, maybe not. Consider next step i+1:
Ri+1 = 2 x (Ri) – d = 2 x (Ri – d) + d
• Hence, we can compute R i+1 by not restoring Ri, and adding d instead of subtracting d
– Same value for R i+1 results • Throughput of 1 bit per cycle
NR Division Example
Iteration Step Divisor Remainder Initial values 0010 0000 0111 0 Shift rem left 1 0010 0000 1110 2: Rem = Rem - Div 0010 1110 1110 1 3b: Rem < 0 ( add next ), sll 0 0010 1101 1100 2: Rem = Rem + Div 0010 1111 1100 2 3b: Rem < 0 ( add next ), sll 0 0010 1111 1000 2: Rem = Rem + Div 0010 0001 1000 3 3a: Rem > 0 ( sub next ), sll 1 0010 0011 0001 Rem = Rem – Div 0010 0001 0001 4 Rem > 0 ( sub next ), sll 1 0010 0010 0011 Shift Rem right by 1 0010 0001 0011 2’s Complement Number “line”: N = 5 00000 N-1 11111 00001 • 2 non-negatives 11110 00010 • 2N-1 negatives -1 0 1 11101 -2 2 • one zero 11100 -3 • how many -4 positives? ......
-15 -16 15 10001 10000 01111 00000 00001... 01111 10000 ... 11110 11111
So what about subtraction?
+15 +0 • Develop subtraction +14 1111 0000 +1 1110 0001 circuit using the same +13 +2 process 1101 - 0010 – Truth table for each bit slice +12 +3 1100 0011 – Borrow in from slice of lesser significance +11 1011 0100 +4 – Borrow out to slice of greater 1010 0101 significance +10 +5 1001 0110 – Very much like carry chain +9 1000 0111 +6 • Homework exercise +8 +7
Finite representation?
+15 +0
1111 0000 +1 • What happens when +14 N 1110 0001 A + B > 2 - 1 ? +13 - +2 – Overflow 1101 0010 – Detect? +12 +3 1100 0011 » Carry out
+11 1011 0100 +4 • What happens when
1010 0101 A - B < 0 ? +10 +5 – Negative numbers? 1001 0110 +9 1000 0111 +6 – Borrow out? +8 +7 Number Systems • Desirable properties: – Efficient encoding (2 n bit patterns. How many numbers?) – Positive and negative » Closure (almost) under addition and subtraction • Except when overflow » Representation of positive numbers same in most systems » Major differences are in how negative numbers are represented – Efficient operations » Comparison: =, <, > » Addition, Subtraction » Detection of overflow – Algebraic properties? » Closure under negation? » A == B iff A – B == 0 • Three Major schemes: – sign and magnitude – ones complement – twos complement – (excess notation)
Booth’s Encoding
• Really just a new way to encode numbers – Normally positionally weighted as 2 n – With Booth, each position has a sign bit – Can be extended to multiple bits
0 1 1 0 Binary +1 0 -1 0 1-bit Booth +2 -2 2-bit Booth
2-bits/cycle Booth Multiplier
• For every pair of multiplier bits – If Booth’s encoding is ‘-2’ » Shift multiplicand left by 1, then subtract – If Booth’s encoding is ‘-1’ » Subtract – If Booth’s encoding is ‘0’ » Do nothing – If Booth’s encoding is ‘1’ » Add – If Booth’s encoding is ‘2’ » Shift multiplicand left by 1, then add Booth’s Example
• Negative multiplicand: -6 x 6 = -36 1010 x 0110, 0110 in Booth’s encoding is +0-0 Hence:
1111 1010 x 0 0000 0000
1111 0100 x –1 0000 1100
1110 1000 x 0 0000 0000
1101 0000 x +1 1101 0000
Final Sum: 1101 1100 (-36)
Booth’s Example
• Negative multiplier: -6 x -2 = 12 1010 x 1110, 1110 in Booth’s encoding is 00-0 Hence:
1111 1010 x 0 0000 0000
1111 0100 x –1 0000 1100
1110 1000 x 0 0000 0000
1101 0000 x 0 0000 0000
Final Sum: 0000 1100 (-12)