Two Fast Amplifiers for the Readout of LGAD Detectors

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ABACUS : Two fast amplifiers for the readout of LGAD detectors. Abstract : The design of a single particle counter for Low Gain Avalanche Diode (LGAD) therapeutical proton beams based on Low Gain Avalanche Diodes optimized for very fast signals is carried on in the framework of the INFN MoveIt research project. Fast signal shaping front-end electronics is mandatory in this application in order to deal with particle rates of the order of hundreds of MHz. Two preamplifier architectures, one based on a fast Charge Sensitive Amplifier with self-reset capabilities and a second one based on a Trans-Impedance Amplifier have been developed in a commercial CMOS 0.11 µm technology and Two detectors under test : length 15 mm, width 80 µm, pitch 146 µm and length 30 mm, width submitted to the foundry. 150 µm, pitch 216 µm Input capacitance C ~ 3-6 pF D Signal (protons) : 4-150 fC (with gain 15) Signal (carbon ions) : 30-150 fC (with gain 1) Requirement : fast counting rate (100 MHz or better → fast rise time CSA-based readout channel not sufficient,the full signal shape must be short. Two configurations under evaluation : 1. Charge Sensitive Amplifier (CSA) 2. TransImpedance Amplifier (TIA) CSA : fast rising time and lower noise than TIA, but the falling edge can be slow → self reset capability TIA : faster but also higher noise. Trade off between bandwidth, open loop gain and input capacitance 1. CSA preamplfier 6. CML driver 2. OTA buffer 7. Threshold tuning DAC (6-bit) 1 A 3. Discriminator stage 1 8. Pulse generator f −3dB≈ 2π RF CD 4. Discriminator stage 2 9. Recovery block 5. Single-ended to diff converter 10. Inverters TIA-based readout channel Transimpedance Amplifier architectures Two stages core amplifier with global Single stage core amplifier driven by resistive feedback : a current buffer : 1. Transimpedance preamplifier ✔ Higher open loop gain ✔ TIA input capacitance independent from 2. Gain stage ✗ Sensitive to input capacitance variations detector capacitance 3. Discriminator ✗ Differential input ✔ Single ended input 4. CML driver ✗ No gain on the first stage 5. Discriminator differential threshold generator Simulation result examples Summary and outlook Two 24-channels prototypes for the fast count of particles crossing a Input data obtained from Weightfield2 LGAD silicon detector have been designed and produced. and GEANT simulations for the The first prototype is based on a charge sensitive amplier with self-reset predicted environment. The second prototype is based on a transimpedance amplifier Average particle rate per channel are architecture. Two sub-version of this design have been realized. 50, 100, 150, 200 and 250 MHz. Both designs have been made in a CMOS 0.11 µm technology powered at 1.2 V The power consumption is of the order of 20 mW/channel. Prototype tests will start on Fall 2018 Post layout simulations detail for the CSA channel for 100 and 200 MHz and 60 MeV and 250 MeV proton energy. a INFN sezione di Torino, 10125 Torino, Italy c,a b,a a Post layout simulations for the TIA v1 R. Cirio , F. Fausti , G. Mazza , b Politecnico di Torino, 10129 Torino, Italy c,a b,a c,a channel at 200 MHz rate. Proton energy V. Monaco , J. Olave , R. Sacchi c Università di Torino, Dipartimento di Fisica, 10125 250 MeV. Torino, Italy.

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